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GET /api/patches/91566/?format=api
{ "id": 91566, "url": "https://patches.dpdk.org/api/patches/91566/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210415105821.826132-1-yuying.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210415105821.826132-1-yuying.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210415105821.826132-1-yuying.zhang@intel.com", "date": "2021-04-15T10:58:21", "name": "[v3] net/ice: support flow priority for DCF switch filter", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "83d59d45de0783e2db8583b33f110e5c0eb80e90", "submitter": { "id": 1844, "url": "https://patches.dpdk.org/api/people/1844/?format=api", "name": "Zhang, Yuying", "email": "yuying.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210415105821.826132-1-yuying.zhang@intel.com/mbox/", "series": [ { "id": 16409, "url": "https://patches.dpdk.org/api/series/16409/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16409", "date": "2021-04-15T10:58:21", "name": "[v3] net/ice: support flow priority for DCF switch filter", "version": 3, "mbox": "https://patches.dpdk.org/series/16409/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/91566/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/91566/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0D786A0C3F;\n\tThu, 15 Apr 2021 13:09:03 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8EB191621A4;\n\tThu, 15 Apr 2021 13:09:02 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id 61D7A1621A1\n for <dev@dpdk.org>; Thu, 15 Apr 2021 13:09:00 +0200 (CEST)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 15 Apr 2021 04:08:59 -0700", "from dpdk-yyzhang2.sh.intel.com ([10.67.117.129])\n by fmsmga005.fm.intel.com with ESMTP; 15 Apr 2021 04:08:58 -0700" ], "IronPort-SDR": [ "\n CpM/iEsgvSgbb8ywh/BtASXvk/LjGOd2yHs9bWJRxXDD66hfMlqq1a8RrooLTpo/5wecYJOscl\n 2jPXgn7/3crw==", "\n yF2wB4M+NBPOzsEUDDvdjZxsFw1+8yqQYdeN6NYouq6bvHcfs0v02oJddL/b94gQnZhKauMwO+\n IKQICAuTmnkw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9954\"; a=\"182331334\"", "E=Sophos;i=\"5.82,223,1613462400\"; d=\"scan'208\";a=\"182331334\"", "E=Sophos;i=\"5.82,223,1613462400\"; d=\"scan'208\";a=\"615607948\"" ], "X-ExtLoop1": "1", "From": "Yuying Zhang <yuying.zhang@intel.com>", "To": "dev@dpdk.org,\n\tqi.z.zhang@intel.com", "Cc": "Yuying Zhang <yuying.zhang@intel.com>", "Date": "Thu, 15 Apr 2021 10:58:21 +0000", "Message-Id": "<20210415105821.826132-1-yuying.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210317070243.136145-1-yuying.zhang@intel.com>", "References": "<20210317070243.136145-1-yuying.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3] net/ice: support flow priority for DCF switch\n filter", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Support rte flow priority attribute for DCF switch filter.\nThe rules with same patterns couldn't be created at the same\ntime since they were related to the same recipe. This patch\nsupports flow priority to create different recipes for this\nsituation. Only priority 0 and 1 are supported and higher value\ndenotes higher priority.\n\nfor example:\n1. flow create 0 priority 0 ingress pattern eth / ipv4 dst is\n192.168.0.1 / end actions vf id 1 / end\n2. flow create 0 priority 1 ingress pattern eth / ipv4 dst is\n192.168.0.2 / end actions vf id 2 / end\n\nThese two rules can be created at the same time in DCF switch filter.\nAnd priority of rule 2 is higher.\n\nSigned-off-by: Yuying Zhang <yuying.zhang@intel.com>\n---\n doc/guides/rel_notes/release_21_05.rst | 1 +\n drivers/net/ice/ice_acl_filter.c | 1 +\n drivers/net/ice/ice_fdir_filter.c | 1 +\n drivers/net/ice/ice_generic_flow.c | 18 ++++++++++--------\n drivers/net/ice/ice_generic_flow.h | 1 +\n drivers/net/ice/ice_hash.c | 2 ++\n drivers/net/ice/ice_switch_filter.c | 14 +++++++++-----\n 7 files changed, 25 insertions(+), 13 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst\nindex 3bd775772f..462a43fdb6 100644\n--- a/doc/guides/rel_notes/release_21_05.rst\n+++ b/doc/guides/rel_notes/release_21_05.rst\n@@ -125,6 +125,7 @@ New Features\n * **Updated Intel ice driver.**\n \n * Added Intel ice support on Windows.\n+ * Added flow priority support for DCF switch filter.\n \n * **Updated Marvell OCTEON TX2 ethdev driver.**\n \ndiff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c\nindex 9e06e8a3de..33756099c6 100644\n--- a/drivers/net/ice/ice_acl_filter.c\n+++ b/drivers/net/ice/ice_acl_filter.c\n@@ -904,6 +904,7 @@ ice_acl_parse(struct ice_adapter *ad,\n \t uint32_t array_len,\n \t const struct rte_flow_item pattern[],\n \t const struct rte_flow_action actions[],\n+\t uint32_t priority __rte_unused,\n \t void **meta,\n \t struct rte_flow_error *error)\n {\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex 92e18d59cc..3b8ea32b1a 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -1997,6 +1997,7 @@ ice_fdir_parse(struct ice_adapter *ad,\n \t uint32_t array_len,\n \t const struct rte_flow_item pattern[],\n \t const struct rte_flow_action actions[],\n+\t uint32_t priority __rte_unused,\n \t void **meta,\n \t struct rte_flow_error *error)\n {\ndiff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c\nindex 8704812622..261f0b78e4 100644\n--- a/drivers/net/ice/ice_generic_flow.c\n+++ b/drivers/net/ice/ice_generic_flow.c\n@@ -1774,6 +1774,7 @@ enum rte_flow_item_type pattern_eth_ipv6_pfcp[] = {\n typedef struct ice_flow_engine * (*parse_engine_t)(struct ice_adapter *ad,\n \t\tstruct rte_flow *flow,\n \t\tstruct ice_parser_list *parser_list,\n+\t\tuint32_t priority,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n \t\tstruct rte_flow_error *error);\n@@ -1965,11 +1966,10 @@ ice_flow_valid_attr(struct ice_adapter *ad,\n \t} else {\n \t\t*ice_pipeline_stage =\n \t\t\tICE_FLOW_CLASSIFY_STAGE_DISTRIBUTOR_ONLY;\n-\t\t/* Not supported */\n-\t\tif (attr->priority) {\n+\t\tif (attr->priority > 1) {\n \t\t\trte_flow_error_set(error, EINVAL,\n \t\t\t\t\tRTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,\n-\t\t\t\t\tattr, \"Not support priority.\");\n+\t\t\t\t\tattr, \"Only support priority 0 and 1.\");\n \t\t\treturn -rte_errno;\n \t\t}\n \t}\n@@ -2240,6 +2240,7 @@ static struct ice_flow_engine *\n ice_parse_engine_create(struct ice_adapter *ad,\n \t\tstruct rte_flow *flow,\n \t\tstruct ice_parser_list *parser_list,\n+\t\tuint32_t priority,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n \t\tstruct rte_flow_error *error)\n@@ -2255,7 +2256,7 @@ ice_parse_engine_create(struct ice_adapter *ad,\n \t\tif (parser_node->parser->parse_pattern_action(ad,\n \t\t\t\tparser_node->parser->array,\n \t\t\t\tparser_node->parser->array_len,\n-\t\t\t\tpattern, actions, &meta, error) < 0)\n+\t\t\t\tpattern, actions, priority, &meta, error) < 0)\n \t\t\tcontinue;\n \n \t\tengine = parser_node->parser->engine;\n@@ -2273,6 +2274,7 @@ static struct ice_flow_engine *\n ice_parse_engine_validate(struct ice_adapter *ad,\n \t\tstruct rte_flow *flow __rte_unused,\n \t\tstruct ice_parser_list *parser_list,\n+\t\tuint32_t priority,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n \t\tstruct rte_flow_error *error)\n@@ -2285,7 +2287,7 @@ ice_parse_engine_validate(struct ice_adapter *ad,\n \t\tif (parser_node->parser->parse_pattern_action(ad,\n \t\t\t\tparser_node->parser->array,\n \t\t\t\tparser_node->parser->array_len,\n-\t\t\t\tpattern, actions, NULL, error) < 0)\n+\t\t\t\tpattern, actions, priority, NULL, error) < 0)\n \t\t\tcontinue;\n \n \t\tengine = parser_node->parser->engine;\n@@ -2335,7 +2337,7 @@ ice_flow_process_filter(struct rte_eth_dev *dev,\n \t\treturn ret;\n \n \t*engine = ice_parse_engine(ad, flow, &pf->rss_parser_list,\n-\t\t\tpattern, actions, error);\n+\t\t\tattr->priority, pattern, actions, error);\n \tif (*engine != NULL)\n \t\treturn 0;\n \n@@ -2343,11 +2345,11 @@ ice_flow_process_filter(struct rte_eth_dev *dev,\n \tcase ICE_FLOW_CLASSIFY_STAGE_DISTRIBUTOR_ONLY:\n \tcase ICE_FLOW_CLASSIFY_STAGE_DISTRIBUTOR:\n \t\t*engine = ice_parse_engine(ad, flow, &pf->dist_parser_list,\n-\t\t\t\tpattern, actions, error);\n+\t\t\t\tattr->priority, pattern, actions, error);\n \t\tbreak;\n \tcase ICE_FLOW_CLASSIFY_STAGE_PERMISSION:\n \t\t*engine = ice_parse_engine(ad, flow, &pf->perm_parser_list,\n-\t\t\t\tpattern, actions, error);\n+\t\t\t\tattr->priority, pattern, actions, error);\n \t\tbreak;\n \tdefault:\n \t\treturn -EINVAL;\ndiff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h\nindex 9f422e5925..a4d0b6671d 100644\n--- a/drivers/net/ice/ice_generic_flow.h\n+++ b/drivers/net/ice/ice_generic_flow.h\n@@ -515,6 +515,7 @@ typedef int (*parse_pattern_action_t)(struct ice_adapter *ad,\n \t\tuint32_t array_len,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n+\t\tuint32_t priority,\n \t\tvoid **meta,\n \t\tstruct rte_flow_error *error);\n \ndiff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c\nindex e56cdf9941..f2b17197be 100644\n--- a/drivers/net/ice/ice_hash.c\n+++ b/drivers/net/ice/ice_hash.c\n@@ -102,6 +102,7 @@ ice_hash_parse_pattern_action(struct ice_adapter *ad,\n \t\t\tuint32_t array_len,\n \t\t\tconst struct rte_flow_item pattern[],\n \t\t\tconst struct rte_flow_action actions[],\n+\t\t\tuint32_t priority,\n \t\t\tvoid **meta,\n \t\t\tstruct rte_flow_error *error);\n \n@@ -985,6 +986,7 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad,\n \t\t\tuint32_t array_len,\n \t\t\tconst struct rte_flow_item pattern[],\n \t\t\tconst struct rte_flow_action actions[],\n+\t\t\tuint32_t priority __rte_unused,\n \t\t\tvoid **meta,\n \t\t\tstruct rte_flow_error *error)\n {\ndiff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c\nindex 0bf3660677..a69ff7ce82 100644\n--- a/drivers/net/ice/ice_switch_filter.c\n+++ b/drivers/net/ice/ice_switch_filter.c\n@@ -1343,6 +1343,7 @@ ice_switch_inset_get(const struct rte_flow_item pattern[],\n static int\n ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,\n \t\t\t const struct rte_flow_action *actions,\n+\t\t\t uint32_t priority,\n \t\t\t struct rte_flow_error *error,\n \t\t\t struct ice_adv_rule_info *rule_info)\n {\n@@ -1390,7 +1391,7 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,\n \trule_info->sw_act.src = rule_info->sw_act.vsi_handle;\n \trule_info->sw_act.flag = ICE_FLTR_RX;\n \trule_info->rx = 1;\n-\trule_info->priority = 5;\n+\trule_info->priority = priority + 5;\n \n \treturn 0;\n }\n@@ -1398,6 +1399,7 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,\n static int\n ice_switch_parse_action(struct ice_pf *pf,\n \t\tconst struct rte_flow_action *actions,\n+\t\tuint32_t priority,\n \t\tstruct rte_flow_error *error,\n \t\tstruct ice_adv_rule_info *rule_info)\n {\n@@ -1468,7 +1470,7 @@ ice_switch_parse_action(struct ice_pf *pf,\n \trule_info->sw_act.vsi_handle = vsi->idx;\n \trule_info->rx = 1;\n \trule_info->sw_act.src = vsi->idx;\n-\trule_info->priority = 5;\n+\trule_info->priority = priority + 5;\n \n \treturn 0;\n \n@@ -1540,6 +1542,7 @@ ice_switch_parse_pattern_action(struct ice_adapter *ad,\n \t\tuint32_t array_len,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n+\t\tuint32_t priority,\n \t\tvoid **meta,\n \t\tstruct rte_flow_error *error)\n {\n@@ -1630,10 +1633,11 @@ ice_switch_parse_pattern_action(struct ice_adapter *ad,\n \t\tgoto error;\n \n \tif (ad->hw.dcf_enabled)\n-\t\tret = ice_switch_parse_dcf_action((void *)ad, actions, error,\n-\t\t\t\t\t\t &rule_info);\n+\t\tret = ice_switch_parse_dcf_action((void *)ad, actions, priority,\n+\t\t\t\t\t\t error, &rule_info);\n \telse\n-\t\tret = ice_switch_parse_action(pf, actions, error, &rule_info);\n+\t\tret = ice_switch_parse_action(pf, actions, priority, error,\n+\t\t\t\t\t &rule_info);\n \n \tif (ret)\n \t\tgoto error;\n", "prefixes": [ "v3" ] }