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GET /api/patches/91500/?format=api
{ "id": 91500, "url": "https://patches.dpdk.org/api/patches/91500/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1618451359-20693-17-git-send-email-timothy.mcdaniel@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1618451359-20693-17-git-send-email-timothy.mcdaniel@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1618451359-20693-17-git-send-email-timothy.mcdaniel@intel.com", "date": "2021-04-15T01:49:08", "name": "[v4,16/27] event/dlb2: add v2.5 queue depth functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "37fe30cf4cd9de37425789699d365c50de681b99", "submitter": { "id": 826, "url": "https://patches.dpdk.org/api/people/826/?format=api", "name": "Timothy McDaniel", "email": "timothy.mcdaniel@intel.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1618451359-20693-17-git-send-email-timothy.mcdaniel@intel.com/mbox/", "series": [ { "id": 16383, "url": "https://patches.dpdk.org/api/series/16383/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16383", "date": "2021-04-15T01:48:52", "name": "Add DLB v2.5", "version": 4, "mbox": "https://patches.dpdk.org/series/16383/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/91500/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/91500/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BFA23A0562;\n\tThu, 15 Apr 2021 03:52:38 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A75AE161E84;\n\tThu, 15 Apr 2021 03:50:56 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id AFBD8161E27\n for <dev@dpdk.org>; Thu, 15 Apr 2021 03:50:40 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Apr 2021 18:50:40 -0700", "from txasoft-yocto.an.intel.com ([10.123.72.192])\n by orsmga003.jf.intel.com with ESMTP; 14 Apr 2021 18:50:39 -0700" ], "IronPort-SDR": [ "\n VaPwHLrd2A4DzAmb+6cY3jWgqAYzL3mf7Q7k02nnJGSyWpDRcxoLQy/rVq41+q2kEOWx170mdq\n 9It5nn+iUgkA==", "\n LDXMfQ1SsJeOIgN0P29SdKuMHjdgzAKHPyEJj75yzApiKKs/K5YZ0mwZkWh6SYHOAT9w5DyVMc\n Zm07rwBurLFg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9954\"; a=\"215272813\"", "E=Sophos;i=\"5.82,223,1613462400\"; d=\"scan'208\";a=\"215272813\"", "E=Sophos;i=\"5.82,223,1613462400\"; d=\"scan'208\";a=\"382569875\"" ], "X-ExtLoop1": "1", "From": "Timothy McDaniel <timothy.mcdaniel@intel.com>", "To": "", "Cc": "dev@dpdk.org, erik.g.carrillo@intel.com, harry.van.haaren@intel.com,\n jerinj@marvell.com, thomas@monjalon.net", "Date": "Wed, 14 Apr 2021 20:49:08 -0500", "Message-Id": "<1618451359-20693-17-git-send-email-timothy.mcdaniel@intel.com>", "X-Mailer": "git-send-email 1.7.10", "In-Reply-To": "<1618451359-20693-1-git-send-email-timothy.mcdaniel@intel.com>", "References": "<20210316221857.2254-2-timothy.mcdaniel@intel.com>\n <1618451359-20693-1-git-send-email-timothy.mcdaniel@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 16/27] event/dlb2: add v2.5 queue depth\n functions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Update the low level hardware functions responsible for\ngetting the queue depth. The command arguments are also\nvalidated.\n\nThe logic is very similar to what was done for v2.0,\nbut the new combined register map for v2.0 and v2.5\nuses new register names and bit names. Additionally,\nnew register access macros are used so that the code\ncan perform the correct action, based on the hardware.\n\nSigned-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>\n---\n drivers/event/dlb2/pf/base/dlb2_resource.c | 160 ------------------\n .../event/dlb2/pf/base/dlb2_resource_new.c | 135 +++++++++++++++\n 2 files changed, 135 insertions(+), 160 deletions(-)", "diff": "diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c b/drivers/event/dlb2/pf/base/dlb2_resource.c\nindex 1e66ebf50..8c1d8c782 100644\n--- a/drivers/event/dlb2/pf/base/dlb2_resource.c\n+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c\n@@ -65,17 +65,6 @@ static inline void dlb2_flush_csr(struct dlb2_hw *hw)\n \tDLB2_CSR_RD(hw, DLB2_SYS_TOTAL_VAS);\n }\n \n-static u32 dlb2_dir_queue_depth(struct dlb2_hw *hw,\n-\t\t\t\tstruct dlb2_dir_pq_pair *queue)\n-{\n-\tunion dlb2_lsp_qid_dir_enqueue_cnt r0;\n-\n-\tr0.val = DLB2_CSR_RD(hw,\n-\t\t\t DLB2_LSP_QID_DIR_ENQUEUE_CNT(queue->id.phys_id));\n-\n-\treturn r0.field.count;\n-}\n-\n static void dlb2_ldb_port_cq_enable(struct dlb2_hw *hw,\n \t\t\t\t struct dlb2_ldb_port *port)\n {\n@@ -108,24 +97,6 @@ static void dlb2_ldb_port_cq_disable(struct dlb2_hw *hw,\n \tdlb2_flush_csr(hw);\n }\n \n-static u32 dlb2_ldb_queue_depth(struct dlb2_hw *hw,\n-\t\t\t\tstruct dlb2_ldb_queue *queue)\n-{\n-\tunion dlb2_lsp_qid_aqed_active_cnt r0;\n-\tunion dlb2_lsp_qid_atm_active r1;\n-\tunion dlb2_lsp_qid_ldb_enqueue_cnt r2;\n-\n-\tr0.val = DLB2_CSR_RD(hw,\n-\t\t\t DLB2_LSP_QID_AQED_ACTIVE_CNT(queue->id.phys_id));\n-\tr1.val = DLB2_CSR_RD(hw,\n-\t\t\t DLB2_LSP_QID_ATM_ACTIVE(queue->id.phys_id));\n-\n-\tr2.val = DLB2_CSR_RD(hw,\n-\t\t\t DLB2_LSP_QID_LDB_ENQUEUE_CNT(queue->id.phys_id));\n-\n-\treturn r0.field.count + r1.field.count + r2.field.count;\n-}\n-\n static struct dlb2_ldb_queue *\n dlb2_get_ldb_queue_from_id(struct dlb2_hw *hw,\n \t\t\t u32 id,\n@@ -1204,134 +1175,3 @@ int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw,\n \treturn 0;\n }\n \n-static struct dlb2_dir_pq_pair *\n-dlb2_get_domain_used_dir_pq(struct dlb2_hw *hw,\n-\t\t\t u32 id,\n-\t\t\t bool vdev_req,\n-\t\t\t struct dlb2_hw_domain *domain)\n-{\n-\tstruct dlb2_list_entry *iter;\n-\tstruct dlb2_dir_pq_pair *port;\n-\tRTE_SET_USED(iter);\n-\n-\tif (id >= DLB2_MAX_NUM_DIR_PORTS(hw->ver))\n-\t\treturn NULL;\n-\n-\tDLB2_DOM_LIST_FOR(domain->used_dir_pq_pairs, port, iter)\n-\t\tif ((!vdev_req && port->id.phys_id == id) ||\n-\t\t (vdev_req && port->id.virt_id == id))\n-\t\t\treturn port;\n-\n-\treturn NULL;\n-}\n-\n-static struct dlb2_ldb_queue *\n-dlb2_get_domain_ldb_queue(u32 id,\n-\t\t\t bool vdev_req,\n-\t\t\t struct dlb2_hw_domain *domain)\n-{\n-\tstruct dlb2_list_entry *iter;\n-\tstruct dlb2_ldb_queue *queue;\n-\tRTE_SET_USED(iter);\n-\n-\tif (id >= DLB2_MAX_NUM_LDB_QUEUES)\n-\t\treturn NULL;\n-\n-\tDLB2_DOM_LIST_FOR(domain->used_ldb_queues, queue, iter)\n-\t\tif ((!vdev_req && queue->id.phys_id == id) ||\n-\t\t (vdev_req && queue->id.virt_id == id))\n-\t\t\treturn queue;\n-\n-\treturn NULL;\n-}\n-\n-static void dlb2_log_get_dir_queue_depth(struct dlb2_hw *hw,\n-\t\t\t\t\t u32 domain_id,\n-\t\t\t\t\t u32 queue_id,\n-\t\t\t\t\t bool vdev_req,\n-\t\t\t\t\t unsigned int vf_id)\n-{\n-\tDLB2_HW_DBG(hw, \"DLB get directed queue depth:\\n\");\n-\tif (vdev_req)\n-\t\tDLB2_HW_DBG(hw, \"(Request from VF %d)\\n\", vf_id);\n-\tDLB2_HW_DBG(hw, \"\\tDomain ID: %d\\n\", domain_id);\n-\tDLB2_HW_DBG(hw, \"\\tQueue ID: %d\\n\", queue_id);\n-}\n-\n-int dlb2_hw_get_dir_queue_depth(struct dlb2_hw *hw,\n-\t\t\t\tu32 domain_id,\n-\t\t\t\tstruct dlb2_get_dir_queue_depth_args *args,\n-\t\t\t\tstruct dlb2_cmd_response *resp,\n-\t\t\t\tbool vdev_req,\n-\t\t\t\tunsigned int vdev_id)\n-{\n-\tstruct dlb2_dir_pq_pair *queue;\n-\tstruct dlb2_hw_domain *domain;\n-\tint id;\n-\n-\tid = domain_id;\n-\n-\tdlb2_log_get_dir_queue_depth(hw, domain_id, args->queue_id,\n-\t\t\t\t vdev_req, vdev_id);\n-\n-\tdomain = dlb2_get_domain_from_id(hw, id, vdev_req, vdev_id);\n-\tif (domain == NULL) {\n-\t\tresp->status = DLB2_ST_INVALID_DOMAIN_ID;\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tid = args->queue_id;\n-\n-\tqueue = dlb2_get_domain_used_dir_pq(hw, id, vdev_req, domain);\n-\tif (queue == NULL) {\n-\t\tresp->status = DLB2_ST_INVALID_QID;\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tresp->id = dlb2_dir_queue_depth(hw, queue);\n-\n-\treturn 0;\n-}\n-\n-static void dlb2_log_get_ldb_queue_depth(struct dlb2_hw *hw,\n-\t\t\t\t\t u32 domain_id,\n-\t\t\t\t\t u32 queue_id,\n-\t\t\t\t\t bool vdev_req,\n-\t\t\t\t\t unsigned int vf_id)\n-{\n-\tDLB2_HW_DBG(hw, \"DLB get load-balanced queue depth:\\n\");\n-\tif (vdev_req)\n-\t\tDLB2_HW_DBG(hw, \"(Request from VF %d)\\n\", vf_id);\n-\tDLB2_HW_DBG(hw, \"\\tDomain ID: %d\\n\", domain_id);\n-\tDLB2_HW_DBG(hw, \"\\tQueue ID: %d\\n\", queue_id);\n-}\n-\n-int dlb2_hw_get_ldb_queue_depth(struct dlb2_hw *hw,\n-\t\t\t\tu32 domain_id,\n-\t\t\t\tstruct dlb2_get_ldb_queue_depth_args *args,\n-\t\t\t\tstruct dlb2_cmd_response *resp,\n-\t\t\t\tbool vdev_req,\n-\t\t\t\tunsigned int vdev_id)\n-{\n-\tstruct dlb2_hw_domain *domain;\n-\tstruct dlb2_ldb_queue *queue;\n-\n-\tdlb2_log_get_ldb_queue_depth(hw, domain_id, args->queue_id,\n-\t\t\t\t vdev_req, vdev_id);\n-\n-\tdomain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);\n-\tif (domain == NULL) {\n-\t\tresp->status = DLB2_ST_INVALID_DOMAIN_ID;\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tqueue = dlb2_get_domain_ldb_queue(args->queue_id, vdev_req, domain);\n-\tif (queue == NULL) {\n-\t\tresp->status = DLB2_ST_INVALID_QID;\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tresp->id = dlb2_ldb_queue_depth(hw, queue);\n-\n-\treturn 0;\n-}\ndiff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.c b/drivers/event/dlb2/pf/base/dlb2_resource_new.c\nindex e806a60ac..6a5af0c1e 100644\n--- a/drivers/event/dlb2/pf/base/dlb2_resource_new.c\n+++ b/drivers/event/dlb2/pf/base/dlb2_resource_new.c\n@@ -5904,3 +5904,138 @@ dlb2_hw_start_domain(struct dlb2_hw *hw,\n \n \treturn 0;\n }\n+\n+static void dlb2_log_get_dir_queue_depth(struct dlb2_hw *hw,\n+\t\t\t\t\t u32 domain_id,\n+\t\t\t\t\t u32 queue_id,\n+\t\t\t\t\t bool vdev_req,\n+\t\t\t\t\t unsigned int vf_id)\n+{\n+\tDLB2_HW_DBG(hw, \"DLB get directed queue depth:\\n\");\n+\tif (vdev_req)\n+\t\tDLB2_HW_DBG(hw, \"(Request from VF %d)\\n\", vf_id);\n+\tDLB2_HW_DBG(hw, \"\\tDomain ID: %d\\n\", domain_id);\n+\tDLB2_HW_DBG(hw, \"\\tQueue ID: %d\\n\", queue_id);\n+}\n+\n+/**\n+ * dlb2_hw_get_dir_queue_depth() - returns the depth of a directed queue\n+ * @hw: dlb2_hw handle for a particular device.\n+ * @domain_id: domain ID.\n+ * @args: queue depth args\n+ * @resp: response structure.\n+ * @vdev_req: indicates whether this request came from a vdev.\n+ * @vdev_id: If vdev_req is true, this contains the vdev's ID.\n+ *\n+ * This function returns the depth of a directed queue.\n+ *\n+ * A vdev can be either an SR-IOV virtual function or a Scalable IOV virtual\n+ * device.\n+ *\n+ * Return:\n+ * Returns 0 upon success, < 0 otherwise. If an error occurs, resp->status is\n+ * assigned a detailed error code from enum dlb2_error. If successful, resp->id\n+ * contains the depth.\n+ *\n+ * Errors:\n+ * EINVAL - Invalid domain ID or queue ID.\n+ */\n+int dlb2_hw_get_dir_queue_depth(struct dlb2_hw *hw,\n+\t\t\t\tu32 domain_id,\n+\t\t\t\tstruct dlb2_get_dir_queue_depth_args *args,\n+\t\t\t\tstruct dlb2_cmd_response *resp,\n+\t\t\t\tbool vdev_req,\n+\t\t\t\tunsigned int vdev_id)\n+{\n+\tstruct dlb2_dir_pq_pair *queue;\n+\tstruct dlb2_hw_domain *domain;\n+\tint id;\n+\n+\tid = domain_id;\n+\n+\tdlb2_log_get_dir_queue_depth(hw, domain_id, args->queue_id,\n+\t\t\t\t vdev_req, vdev_id);\n+\n+\tdomain = dlb2_get_domain_from_id(hw, id, vdev_req, vdev_id);\n+\tif (!domain) {\n+\t\tresp->status = DLB2_ST_INVALID_DOMAIN_ID;\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tid = args->queue_id;\n+\n+\tqueue = dlb2_get_domain_used_dir_pq(hw, id, vdev_req, domain);\n+\tif (!queue) {\n+\t\tresp->status = DLB2_ST_INVALID_QID;\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tresp->id = dlb2_dir_queue_depth(hw, queue);\n+\n+\treturn 0;\n+}\n+\n+static void dlb2_log_get_ldb_queue_depth(struct dlb2_hw *hw,\n+\t\t\t\t\t u32 domain_id,\n+\t\t\t\t\t u32 queue_id,\n+\t\t\t\t\t bool vdev_req,\n+\t\t\t\t\t unsigned int vf_id)\n+{\n+\tDLB2_HW_DBG(hw, \"DLB get load-balanced queue depth:\\n\");\n+\tif (vdev_req)\n+\t\tDLB2_HW_DBG(hw, \"(Request from VF %d)\\n\", vf_id);\n+\tDLB2_HW_DBG(hw, \"\\tDomain ID: %d\\n\", domain_id);\n+\tDLB2_HW_DBG(hw, \"\\tQueue ID: %d\\n\", queue_id);\n+}\n+\n+/**\n+ * dlb2_hw_get_ldb_queue_depth() - returns the depth of a load-balanced queue\n+ * @hw: dlb2_hw handle for a particular device.\n+ * @domain_id: domain ID.\n+ * @args: queue depth args\n+ * @resp: response structure.\n+ * @vdev_req: indicates whether this request came from a vdev.\n+ * @vdev_id: If vdev_req is true, this contains the vdev's ID.\n+ *\n+ * This function returns the depth of a load-balanced queue.\n+ *\n+ * A vdev can be either an SR-IOV virtual function or a Scalable IOV virtual\n+ * device.\n+ *\n+ * Return:\n+ * Returns 0 upon success, < 0 otherwise. If an error occurs, resp->status is\n+ * assigned a detailed error code from enum dlb2_error. If successful, resp->id\n+ * contains the depth.\n+ *\n+ * Errors:\n+ * EINVAL - Invalid domain ID or queue ID.\n+ */\n+int dlb2_hw_get_ldb_queue_depth(struct dlb2_hw *hw,\n+\t\t\t\tu32 domain_id,\n+\t\t\t\tstruct dlb2_get_ldb_queue_depth_args *args,\n+\t\t\t\tstruct dlb2_cmd_response *resp,\n+\t\t\t\tbool vdev_req,\n+\t\t\t\tunsigned int vdev_id)\n+{\n+\tstruct dlb2_hw_domain *domain;\n+\tstruct dlb2_ldb_queue *queue;\n+\n+\tdlb2_log_get_ldb_queue_depth(hw, domain_id, args->queue_id,\n+\t\t\t\t vdev_req, vdev_id);\n+\n+\tdomain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);\n+\tif (!domain) {\n+\t\tresp->status = DLB2_ST_INVALID_DOMAIN_ID;\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tqueue = dlb2_get_domain_ldb_queue(args->queue_id, vdev_req, domain);\n+\tif (!queue) {\n+\t\tresp->status = DLB2_ST_INVALID_QID;\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tresp->id = dlb2_ldb_queue_depth(hw, queue);\n+\n+\treturn 0;\n+}\n", "prefixes": [ "v4", "16/27" ] }