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GET /api/patches/91458/?format=api
{ "id": 91458, "url": "https://patches.dpdk.org/api/patches/91458/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210414125700.12940-2-getelson@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210414125700.12940-2-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210414125700.12940-2-getelson@nvidia.com", "date": "2021-04-14T12:56:59", "name": "[v4,1/2] ethdev: add packet integrity checks", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "681c81218e4fa93795601e1071fd48b9f9f51f80", "submitter": { "id": 1882, "url": "https://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210414125700.12940-2-getelson@nvidia.com/mbox/", "series": [ { "id": 16371, "url": "https://patches.dpdk.org/api/series/16371/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16371", "date": "2021-04-14T12:56:58", "name": "add packet integrity checks", "version": 4, "mbox": "https://patches.dpdk.org/series/16371/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/91458/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/91458/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E6447A0562;\n\tWed, 14 Apr 2021 15:00:10 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A35D0161AC0;\n\tWed, 14 Apr 2021 15:00:07 +0200 (CEST)", "from NAM02-BL2-obe.outbound.protection.outlook.com\n (mail-eopbgr750043.outbound.protection.outlook.com [40.107.75.43])\n by mails.dpdk.org (Postfix) with ESMTP id 31A9C4013F\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<orika@nvidia.com>", "CC": "<ajit.khaparde@broadcom.com>, <andrew.rybchenko@oktetlabs.ru>,\n <dev@dpdk.org>, <ferruh.yigit@intel.com>, <jerinj@marvell.com>,\n <jerinjacobk@gmail.com>, <olivier.matz@6wind.com>, <thomas@monjalon.net>,\n <viacheslavo@nvidia.com>, <getelson@nvidia.com>, <matan@nvidia.com>,\n <rasland@nvidia.com>", "Date": "Wed, 14 Apr 2021 15:56:59 +0300", "Message-ID": "<20210414125700.12940-2-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210414125700.12940-1-getelson@nvidia.com>", "References": "\n <DM6PR12MB4987D87E9B87A07F2D85B562D6759@DM6PR12MB4987.namprd12.prod.outlook.com>\n <20210414125700.12940-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.145.6]", "X-ClientProxiedBy": "HQMAIL105.nvidia.com (172.20.187.12) To\n DRHQMAIL107.nvidia.com (10.27.9.16)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "9c1b91b4-0eb9-4a2c-3ed0-08d8ff45383b", "X-MS-TrafficTypeDiagnostic": "BYAPR12MB4728:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <BYAPR12MB472830FDE05EAD83B108657EA54E9@BYAPR12MB4728.namprd12.prod.outlook.com>", "X-MS-Exchange-Transport-Forked": "True", "X-MS-Oob-TLC-OOBClassifiers": "OLM:10000;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n sDAFKjiPZj1ZurFH4mCJ2eg/Lv9WjaNZOkmqdglKuf6LOL/L+d92r5P/zR0LXWMHpzsbI6JTJWg318cqK9y/6UhUE4odigKJrUou0/i1dk14ruQsdFP+3tXBZKllu67thanKLo5M1R8qzVVFMNcQny7/82mz/qJvZakE6//S5domN3g6JZefHWpqYtdzTcOJgPNr48NSFJHfsDRARyFOcUEhlnRDkkrStolBnFpOIN3Lv2/DxyafVfjNFtkJztlq4UkUjBfpgx2bmPziSVtflucMGw7huAmxS6d6iMQgLooZDKHdIgdWQc1ExQlbwRPX3SVpDjw/PigL/4ilm2vOY1YGgyBauptdr5iSLvSlNMC6sHxuq58DmQzKPYKqFcl0EFcDSs73o4XDYBt5VvEeh6F+TNIgmtIgDV/a9sa85LKkjYSTIiRluqmI4VoY12yWfyOTY3HeA6RPfh8njVxF63PgeomKvH/05hmo25e8OQRgIciNJ392vzhx0YNc37QFdYEZnx5lly5rqqrvaizQZ3gwkfE918RStEv21/v8Mh7ThK2c2qtECmQ5z4v4Zoj9AxrsSZogcYe5Mk/uycqp+pB7HAroe3LPtIuyBGODn+xJXkyry0mU1G8X3VNSBRVaSiL4UYhPSBPUND9vaC2vXT4iFxB8SmeghtsbuRBlIG4=", "X-Forefront-Antispam-Report": "CIP:216.228.112.36; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid05.nvidia.com; CAT:NONE;\n SFS:(4636009)(136003)(376002)(396003)(39860400002)(346002)(46966006)(36840700001)(1076003)(16526019)(55016002)(186003)(83380400001)(336012)(316002)(8676002)(70586007)(107886003)(4326008)(356005)(6666004)(6636002)(6862004)(2616005)(426003)(82310400003)(36906005)(8936002)(7636003)(36860700001)(37006003)(6286002)(82740400003)(7696005)(26005)(70206006)(47076005)(2906002)(5660300002)(478600001)(86362001)(54906003)(36756003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "14 Apr 2021 13:00:03.2659 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 9c1b91b4-0eb9-4a2c-3ed0-08d8ff45383b", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.36];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT067.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BYAPR12MB4728", "Subject": "[dpdk-dev] [PATCH v4 1/2] ethdev: add packet integrity checks", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ori Kam <orika@nvidia.com>\n\nCurrently, DPDK application can offload the checksum check,\nand report it in the mbuf.\n\nHowever, as more and more applications are offloading some or all\nlogic and action to the HW, there is a need to check the packet\nintegrity so the right decision can be taken.\n\nThe application logic can be positive meaning if the packet is\nvalid jump / do actions, or negative if packet is not valid\njump to SW / do actions (like drop) a, and add default flow\n(match all in low priority) that will direct the miss packet\nto the miss path.\n\nSince currently rte_flow works in positive way the assumption is\nthat the positive way will be the common way in this case also.\n\nWhen thinking what is the best API to implement such feature,\nwe need to considure the following (in no specific order):\n1. API breakage.\n2. Simplicity.\n3. Performance.\n4. HW capabilities.\n5. rte_flow limitation.\n6. Flexibility.\n\nFirst option: Add integrity flags to each of the items.\nFor example add checksum_ok to ipv4 item.\n\nPros:\n1. No new rte_flow item.\n2. Simple in the way that on each item the app can see\nwhat checks are available.\n\nCons:\n1. API breakage.\n2. increase number of flows, since app can't add global rule and\n must have dedicated flow for each of the flow combinations, for example\n matching on icmp traffic or UDP/TCP traffic with IPv4 / IPv6 will\n result in 5 flows.\n\nSecond option: dedicated item\n\nPros:\n1. No API breakage, and there will be no for some time due to having\n extra space. (by using bits)\n2. Just one flow to support the icmp or UDP/TCP traffic with IPv4 /\n IPv6.\n3. Simplicity application can just look at one place to see all possible\n checks.\n4. Allow future support for more tests.\n\nCons:\n1. New item, that holds number of fields from different items.\n\nFor starter the following bits are suggested:\n1. packet_ok - means that all HW checks depending on packet layer have\n passed. This may mean that in some HW such flow should be splited to\n number of flows or fail.\n2. l2_ok - all check for layer 2 have passed.\n3. l3_ok - all check for layer 3 have passed. If packet doesn't have\n l3 layer this check should fail.\n4. l4_ok - all check for layer 4 have passed. If packet doesn't\n have l4 layer this check should fail.\n5. l2_crc_ok - the layer 2 crc is O.K.\n6. ipv4_csum_ok - IPv4 checksum is O.K. it is possible that the\n IPv4 checksum will be O.K. but the l3_ok will be 0. it is not\n possible that checksum will be 0 and the l3_ok will be 1.\n7. l4_csum_ok - layer 4 checksum is O.K.\n8. l3_len_OK - check that the reported layer 3 len is smaller than the\n frame len.\n\nExample of usage:\n1. check packets from all possible layers for integrity.\n flow create integrity spec packet_ok = 1 mask packet_ok = 1 .....\n\n2. Check only packet with layer 4 (UDP / TCP)\n flow create integrity spec l3_ok = 1, l4_ok = 1 mask l3_ok = 1 l4_ok = 1\n\nSigned-off-by: Ori Kam <orika@nvidia.com>\n---\n doc/guides/prog_guide/rte_flow.rst | 19 ++++++++++\n doc/guides/rel_notes/release_21_05.rst | 5 +++\n lib/librte_ethdev/rte_flow.h | 48 ++++++++++++++++++++++++++\n 3 files changed, 72 insertions(+)", "diff": "diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst\nindex e1b93ecedf..4b8723b84c 100644\n--- a/doc/guides/prog_guide/rte_flow.rst\n+++ b/doc/guides/prog_guide/rte_flow.rst\n@@ -1398,6 +1398,25 @@ Matches a eCPRI header.\n - ``hdr``: eCPRI header definition (``rte_ecpri.h``).\n - Default ``mask`` matches nothing, for all eCPRI messages.\n \n+Item: ``PACKET_INTEGRITY_CHECKS``\n+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n+\n+Matches packet integrity.\n+Some devices require pre-enabling for this item before using it.\n+\n+- ``level``: the encapsulation level that should be checked. level 0 means the\n+ default PMD mode (Can be inner most / outermost). value of 1 means outermost\n+ and higher value means inner header. See also RSS level.\n+- ``packet_ok``: All HW packet integrity checks have passed based on the max\n+ layer of the packet.\n+- ``l2_ok``: all layer 2 HW integrity checks passed.\n+- ``l3_ok``: all layer 3 HW integrity checks passed.\n+- ``l4_ok``: all layer 4 HW integrity checks passed.\n+- ``l2_crc_ok``: layer 2 crc check passed.\n+- ``ipv4_csum_ok``: ipv4 checksum check passed.\n+- ``l4_csum_ok``: layer 4 checksum check passed.\n+- ``l3_len_ok``: the layer 3 len is smaller than the frame len.\n+\n Actions\n ~~~~~~~\n \ndiff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst\nindex a0b907994a..986f749384 100644\n--- a/doc/guides/rel_notes/release_21_05.rst\n+++ b/doc/guides/rel_notes/release_21_05.rst\n@@ -168,6 +168,11 @@ New Features\n the events across multiple stages.\n * This also reduced the scheduling overhead on a event device.\n \n+* **Added packet integrity match to RTE flow rules.**\n+\n+ * Added ``PACKET_INTEGRITY_CHECKS`` flow item.\n+ * Added ``rte_flow_item_integrity`` data structure.\n+\n * **Updated testpmd.**\n \n * Added a command line option to configure forced speed for Ethernet port.\ndiff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h\nindex c476a0f59d..aa50a8d2bf 100644\n--- a/lib/librte_ethdev/rte_flow.h\n+++ b/lib/librte_ethdev/rte_flow.h\n@@ -551,6 +551,16 @@ enum rte_flow_item_type {\n \t * See struct rte_flow_item_geneve_opt\n \t */\n \tRTE_FLOW_ITEM_TYPE_GENEVE_OPT,\n+\n+\t/**\n+\t * [META]\n+\t *\n+\t * Matches on packet integrity.\n+\t * Some devices require pre-enabling for this item before using it.\n+\t *\n+\t * See struct rte_flow_item_integrity.\n+\t */\n+\tRTE_FLOW_ITEM_TYPE_INTEGRITY,\n };\n \n /**\n@@ -1685,6 +1695,44 @@ rte_flow_item_geneve_opt_mask = {\n };\n #endif\n \n+__extension__\n+struct rte_flow_item_integrity {\n+\tuint32_t level;\n+\t/**< Packet encapsulation level the item should apply to.\n+\t * @see rte_flow_action_rss\n+\t */\n+\tunion {\n+\t\tstruct {\n+\t\t\tuint64_t packet_ok:1;\n+\t\t\t/** The packet is valid after passing all HW checks. */\n+\t\t\tuint64_t l2_ok:1;\n+\t\t\t/**< L2 layer is valid after passing all HW checks. */\n+\t\t\tuint64_t l3_ok:1;\n+\t\t\t/**< L3 layer is valid after passing all HW checks. */\n+\t\t\tuint64_t l4_ok:1;\n+\t\t\t/**< L4 layer is valid after passing all HW checks. */\n+\t\t\tuint64_t l2_crc_ok:1;\n+\t\t\t/**< L2 layer crc is valid. */\n+\t\t\tuint64_t ipv4_csum_ok:1;\n+\t\t\t/**< IPv4 layer checksum is valid. */\n+\t\t\tuint64_t l4_csum_ok:1;\n+\t\t\t/**< L4 layer checksum is valid. */\n+\t\t\tuint64_t l3_len_ok:1;\n+\t\t\t/**< The l3 len is smaller than the frame len. */\n+\t\t\tuint64_t reserved:56;\n+\t\t};\n+\t\tuint64_t value;\n+\t};\n+};\n+\n+#ifndef __cplusplus\n+static const struct rte_flow_item_integrity\n+rte_flow_item_integrity_mask = {\n+\t.level = 0,\n+\t.value = 0,\n+};\n+#endif\n+\n /**\n * Matching pattern item definition.\n *\n", "prefixes": [ "v4", "1/2" ] }