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GET /api/patches/90310/?format=api
{ "id": 90310, "url": "https://patches.dpdk.org/api/patches/90310/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210401094739.22714-22-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210401094739.22714-22-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210401094739.22714-22-ndabilpuram@marvell.com", "date": "2021-04-01T09:47:08", "name": "[v2,21/52] common/cnxk: add nix MAC operations support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "56b5712b2cc67b99595c261b3568df1bddadcad8", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210401094739.22714-22-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 16050, "url": "https://patches.dpdk.org/api/series/16050/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16050", "date": "2021-04-01T09:46:47", "name": "Add Marvell CNXK common driver", "version": 2, "mbox": "https://patches.dpdk.org/series/16050/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/90310/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/90310/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3AB5EA0548;\n\tThu, 1 Apr 2021 11:51:14 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 07924140F27;\n\tThu, 1 Apr 2021 11:49:12 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 08BD7140F1E\n for <dev@dpdk.org>; Thu, 1 Apr 2021 11:49:10 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 1319fRbS014984 for <dev@dpdk.org>; Thu, 1 Apr 2021 02:49:10 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 37n28j1wwd-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 01 Apr 2021 02:49:10 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 1 Apr 2021 02:49:08 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 1 Apr 2021 02:49:08 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 3BD933F703F;\n Thu, 1 Apr 2021 02:49:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=vAFHcbf/lvX5GCg9Zo6+qaZRf9F6iROWKE1AmkuLHgI=;\n b=YI0nNEsJ4DsEeJ/xyT1QY7G9wIE8lywcots6MID/2at8W79TajTaGY+NvOcBQcKdR7V2\n 7apwdVwsWe4DQFpjbAD4GBnEnDy6hU5C1+IQwHZzdHxfJShzEkX2kzZBS2liO2QbvB3R\n SKgw9cGgSyPlCtOOaTGeYsY4nKM2xb2E5neN/PkFoxBOywTKAQ8WzGlMJmXPCz5qq5QO\n 1aoILjfR5hMkTXxUD8fKNVXtxJ5toVJoET8n1Jk3R1cZ/d1IBrDGb1rFPBsRKoLrVynW\n 0havIq9IRaUiSwb+9W0h7XwTCjjcTxupxMalbPs1/IeLZWMrZTpXLaAz5WC5nNYXpjGd yw==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>", "Date": "Thu, 1 Apr 2021 15:17:08 +0530", "Message-ID": "<20210401094739.22714-22-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210401094739.22714-1-ndabilpuram@marvell.com>", "References": "<20210305133918.8005-1-ndabilpuram@marvell.com>\n <20210401094739.22714-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "2LZOVYFTpwa-r6lqxTEb5bJ_oibgzvS5", "X-Proofpoint-GUID": "2LZOVYFTpwa-r6lqxTEb5bJ_oibgzvS5", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761\n definitions=2021-04-01_04:2021-03-31,\n 2021-04-01 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 21/52] common/cnxk: add nix MAC operations\n support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nAdd support to different MAC related operations such as\nMAC address set/get, link set/get, link status callback,\netc.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_nix.h | 41 ++++++\n drivers/common/cnxk/roc_nix_mac.c | 298 ++++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map | 15 ++\n 4 files changed, 355 insertions(+)\n create mode 100644 drivers/common/cnxk/roc_nix_mac.c", "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 1f1dc8f..79b6fe7 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -23,6 +23,7 @@ sources = files('roc_dev.c',\n \t\t'roc_model.c',\n \t\t'roc_nix.c',\n \t\t'roc_nix_irq.c',\n+\t\t'roc_nix_mac.c',\n \t\t'roc_nix_queue.c',\n \t\t'roc_npa.c',\n \t\t'roc_npa_debug.c',\ndiff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 8027e6d..66e0bfa 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -100,6 +100,23 @@ struct roc_nix_sq {\n \tvoid *fc;\n };\n \n+struct roc_nix_link_info {\n+\tuint64_t status : 1;\n+\tuint64_t full_duplex : 1;\n+\tuint64_t lmac_type_id : 4;\n+\tuint64_t speed : 20;\n+\tuint64_t autoneg : 1;\n+\tuint64_t fec : 2;\n+\tuint64_t port : 8;\n+};\n+\n+/* Link status update callback */\n+typedef void (*link_status_t)(struct roc_nix *roc_nix,\n+\t\t\t struct roc_nix_link_info *link);\n+\n+/* PTP info update callback */\n+typedef int (*ptp_info_update_t)(struct roc_nix *roc_nix, bool enable);\n+\n struct roc_nix {\n \t/* Input parameters */\n \tstruct plt_pci_device *pci_dev;\n@@ -152,6 +169,30 @@ void __roc_api roc_nix_unregister_queue_irqs(struct roc_nix *roc_nix);\n int __roc_api roc_nix_register_cq_irqs(struct roc_nix *roc_nix);\n void __roc_api roc_nix_unregister_cq_irqs(struct roc_nix *roc_nix);\n \n+/* MAC */\n+int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);\n+int __roc_api roc_nix_mac_link_event_start_stop(struct roc_nix *roc_nix,\n+\t\t\t\t\t\tbool start);\n+int __roc_api roc_nix_mac_loopback_enable(struct roc_nix *roc_nix, bool enable);\n+int __roc_api roc_nix_mac_addr_set(struct roc_nix *roc_nix,\n+\t\t\t\t const uint8_t addr[]);\n+int __roc_api roc_nix_mac_max_entries_get(struct roc_nix *roc_nix);\n+int __roc_api roc_nix_mac_addr_add(struct roc_nix *roc_nix, uint8_t addr[]);\n+int __roc_api roc_nix_mac_addr_del(struct roc_nix *roc_nix, uint32_t index);\n+int __roc_api roc_nix_mac_promisc_mode_enable(struct roc_nix *roc_nix,\n+\t\t\t\t\t int enable);\n+int __roc_api roc_nix_mac_link_state_set(struct roc_nix *roc_nix, uint8_t up);\n+int __roc_api roc_nix_mac_link_info_set(struct roc_nix *roc_nix,\n+\t\t\t\t\tstruct roc_nix_link_info *link_info);\n+int __roc_api roc_nix_mac_link_info_get(struct roc_nix *roc_nix,\n+\t\t\t\t\tstruct roc_nix_link_info *link_info);\n+int __roc_api roc_nix_mac_mtu_set(struct roc_nix *roc_nix, uint16_t mtu);\n+int __roc_api roc_nix_mac_max_rx_len_set(struct roc_nix *roc_nix,\n+\t\t\t\t\t uint16_t maxlen);\n+int __roc_api roc_nix_mac_link_cb_register(struct roc_nix *roc_nix,\n+\t\t\t\t\t link_status_t link_update);\n+void __roc_api roc_nix_mac_link_cb_unregister(struct roc_nix *roc_nix);\n+\n /* Queue */\n int __roc_api roc_nix_rq_init(struct roc_nix *roc_nix, struct roc_nix_rq *rq,\n \t\t\t bool ena);\ndiff --git a/drivers/common/cnxk/roc_nix_mac.c b/drivers/common/cnxk/roc_nix_mac.c\nnew file mode 100644\nindex 0000000..682d5a7\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_nix_mac.c\n@@ -0,0 +1,298 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+static inline struct mbox *\n+nix_to_mbox(struct nix *nix)\n+{\n+\tstruct dev *dev = &nix->dev;\n+\n+\treturn dev->mbox;\n+}\n+\n+int\n+roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tif (start)\n+\t\tmbox_alloc_msg_cgx_start_rxtx(mbox);\n+\telse\n+\t\tmbox_alloc_msg_cgx_stop_rxtx(mbox);\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_link_event_start_stop(struct roc_nix *roc_nix, bool start)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tif (start)\n+\t\tmbox_alloc_msg_cgx_start_linkevents(mbox);\n+\telse\n+\t\tmbox_alloc_msg_cgx_stop_linkevents(mbox);\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_loopback_enable(struct roc_nix *roc_nix, bool enable)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\n+\tif (enable && roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tif (enable)\n+\t\tmbox_alloc_msg_cgx_intlbk_enable(mbox);\n+\telse\n+\t\tmbox_alloc_msg_cgx_intlbk_disable(mbox);\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_addr_set(struct roc_nix *roc_nix, const uint8_t addr[])\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct cgx_mac_addr_set_or_get *req;\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tif (dev_active_vfs(&nix->dev))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\treq = mbox_alloc_msg_cgx_mac_addr_set(mbox);\n+\tmbox_memcpy(req->mac_addr, addr, PLT_ETHER_ADDR_LEN);\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_max_entries_get(struct roc_nix *roc_nix)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct cgx_max_dmac_entries_get_rsp *rsp;\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tint rc;\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tmbox_alloc_msg_cgx_mac_max_entries_get(mbox);\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn rsp->max_dmac_filters ? rsp->max_dmac_filters : 1;\n+}\n+\n+int\n+roc_nix_mac_addr_add(struct roc_nix *roc_nix, uint8_t addr[])\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct cgx_mac_addr_add_req *req;\n+\tstruct cgx_mac_addr_add_rsp *rsp;\n+\tint rc;\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tif (dev_active_vfs(&nix->dev))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\treq = mbox_alloc_msg_cgx_mac_addr_add(mbox);\n+\tmbox_memcpy(req->mac_addr, addr, PLT_ETHER_ADDR_LEN);\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc < 0)\n+\t\treturn rc;\n+\n+\treturn rsp->index;\n+}\n+\n+int\n+roc_nix_mac_addr_del(struct roc_nix *roc_nix, uint32_t index)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct cgx_mac_addr_del_req *req;\n+\tint rc = -ENOSPC;\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\treq = mbox_alloc_msg_cgx_mac_addr_del(mbox);\n+\tif (req == NULL)\n+\t\treturn rc;\n+\treq->index = index;\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_promisc_mode_enable(struct roc_nix *roc_nix, int enable)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\n+\tif (roc_nix_is_vf_or_sdp(roc_nix))\n+\t\treturn NIX_ERR_OP_NOTSUP;\n+\n+\tif (enable)\n+\t\tmbox_alloc_msg_cgx_promisc_enable(mbox);\n+\telse\n+\t\tmbox_alloc_msg_cgx_promisc_disable(mbox);\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_link_info_get(struct roc_nix *roc_nix,\n+\t\t\t struct roc_nix_link_info *link_info)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct cgx_link_info_msg *rsp;\n+\tint rc;\n+\n+\tmbox_alloc_msg_cgx_get_linkinfo(mbox);\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tlink_info->status = rsp->link_info.link_up;\n+\tlink_info->full_duplex = rsp->link_info.full_duplex;\n+\tlink_info->lmac_type_id = rsp->link_info.lmac_type_id;\n+\tlink_info->speed = rsp->link_info.speed;\n+\tlink_info->autoneg = rsp->link_info.an;\n+\tlink_info->fec = rsp->link_info.fec;\n+\tlink_info->port = rsp->link_info.port;\n+\n+\treturn 0;\n+}\n+\n+int\n+roc_nix_mac_link_state_set(struct roc_nix *roc_nix, uint8_t up)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct cgx_set_link_state_msg *req;\n+\tint rc = -ENOSPC;\n+\n+\treq = mbox_alloc_msg_cgx_set_link_state(mbox);\n+\tif (req == NULL)\n+\t\treturn rc;\n+\treq->enable = up;\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_link_info_set(struct roc_nix *roc_nix,\n+\t\t\t struct roc_nix_link_info *link_info)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct cgx_set_link_mode_req *req;\n+\tint rc;\n+\n+\trc = roc_nix_mac_link_state_set(roc_nix, link_info->status);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treq = mbox_alloc_msg_cgx_set_link_mode(mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\treq->args.speed = link_info->speed;\n+\treq->args.duplex = link_info->full_duplex;\n+\treq->args.an = link_info->autoneg;\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_mtu_set(struct roc_nix *roc_nix, uint16_t mtu)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct nix_frs_cfg *req;\n+\tbool sdp_link = false;\n+\tint rc = -ENOSPC;\n+\n+\tif (roc_nix_is_sdp(roc_nix))\n+\t\tsdp_link = true;\n+\n+\treq = mbox_alloc_msg_nix_set_hw_frs(mbox);\n+\tif (req == NULL)\n+\t\treturn rc;\n+\treq->maxlen = mtu;\n+\treq->update_smq = true;\n+\treq->sdp_link = sdp_link;\n+\n+\trc = mbox_process(mbox);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Save MTU for later use */\n+\tnix->mtu = mtu;\n+\treturn 0;\n+}\n+\n+int\n+roc_nix_mac_max_rx_len_set(struct roc_nix *roc_nix, uint16_t maxlen)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct mbox *mbox = nix_to_mbox(nix);\n+\tstruct nix_frs_cfg *req;\n+\tbool sdp_link = false;\n+\tint rc = -ENOSPC;\n+\n+\tif (roc_nix_is_sdp(roc_nix))\n+\t\tsdp_link = true;\n+\n+\treq = mbox_alloc_msg_nix_set_hw_frs(mbox);\n+\tif (req == NULL)\n+\t\treturn rc;\n+\treq->sdp_link = sdp_link;\n+\treq->maxlen = maxlen;\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_nix_mac_link_cb_register(struct roc_nix *roc_nix, link_status_t link_update)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\n+\tif (link_update == NULL)\n+\t\treturn NIX_ERR_PARAM;\n+\n+\tdev->ops->link_status_update = (link_info_t)link_update;\n+\treturn 0;\n+}\n+\n+void\n+roc_nix_mac_link_cb_unregister(struct roc_nix *roc_nix)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\n+\tdev->ops->link_status_update = NULL;\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 4998635..79500cc 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -29,6 +29,21 @@ INTERNAL {\n \troc_nix_is_vf_or_sdp;\n \troc_nix_lf_alloc;\n \troc_nix_lf_free;\n+\troc_nix_mac_addr_add;\n+\troc_nix_mac_addr_del;\n+\troc_nix_mac_addr_set;\n+\troc_nix_mac_link_cb_register;\n+\troc_nix_mac_link_cb_unregister;\n+\troc_nix_mac_link_event_start_stop;\n+\troc_nix_mac_link_info_get;\n+\troc_nix_mac_link_info_set;\n+\troc_nix_mac_link_state_set;\n+\troc_nix_mac_loopback_enable;\n+\troc_nix_mac_max_entries_get;\n+\troc_nix_mac_max_rx_len_set;\n+\troc_nix_mac_mtu_set;\n+\troc_nix_mac_promisc_mode_enable;\n+\troc_nix_mac_rxtx_start_stop;\n \troc_nix_max_pkt_len;\n \troc_nix_ras_intr_ena_dis;\n \troc_nix_register_cq_irqs;\n", "prefixes": [ "v2", "21/52" ] }