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GET /api/patches/88247/?format=api
{ "id": 88247, "url": "https://patches.dpdk.org/api/patches/88247/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210225182250.1149592-9-thomas@monjalon.net/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210225182250.1149592-9-thomas@monjalon.net>", "list_archive_url": "https://inbox.dpdk.org/dev/20210225182250.1149592-9-thomas@monjalon.net", "date": "2021-02-25T18:22:41", "name": "[v5,08/17] bus/pci: support I/O port operations with musl", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cf013f92dd69b9b065291c8189499c951d513f18", "submitter": { "id": 685, "url": "https://patches.dpdk.org/api/people/685/?format=api", "name": "Thomas Monjalon", "email": "thomas@monjalon.net" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210225182250.1149592-9-thomas@monjalon.net/mbox/", "series": [ { "id": 15388, "url": "https://patches.dpdk.org/api/series/15388/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=15388", "date": "2021-02-25T18:22:33", "name": "Alpine/musl build support", "version": 5, "mbox": "https://patches.dpdk.org/series/15388/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/88247/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/88247/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 18581A034F;\n\tThu, 25 Feb 2021 19:24:21 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 70A4D160878;\n\tThu, 25 Feb 2021 19:23:40 +0100 (CET)", "from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com\n [66.111.4.26]) by mails.dpdk.org (Postfix) with ESMTP id 46C0E160862;\n Thu, 25 Feb 2021 19:23:39 +0100 (CET)", "from compute2.internal (compute2.nyi.internal [10.202.2.42])\n by mailout.nyi.internal (Postfix) with ESMTP id E14975C00C5;\n Thu, 25 Feb 2021 13:23:38 -0500 (EST)", "from mailfrontend1 ([10.202.2.162])\n by compute2.internal (MEProxy); Thu, 25 Feb 2021 13:23:38 -0500", "from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184])\n by mail.messagingengine.com (Postfix) with ESMTPA id B08C824005C;\n Thu, 25 Feb 2021 13:23:37 -0500 (EST)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding; s=fm3; bh=jkmR8jre9iG6r\n 4EPvIelfidmLMPcmV65reNxetXbfb0=; b=f1GIqfvbg4jG37+sBLiAiMdQb6uVw\n d3qvupIidUIJryruaBA2HwX2rcPgkfpz8fNmi6Z/R3DAhg4m0vF9w97PWrDPvCBO\n rQbWoPc16R08Y8BYKrpe7UYwoNxINv39VTYaQOkbd+Kd0fhMneJfgmSZVoXiydMA\n jqa4zvkNsmkQHwkqDvVcF57EJ54f3pUJtvSAJmQYCdJwqvJEuw7OT5p3njz7sNpm\n eDn4S+H1+drjDItrWYX+sU3lFwI9DTVVAxQFDf5HCxDw/T9Us6CsubtbhVE1oNz8\n Of6jy60AOeCoSys63Jjml19qJNa4Omz/T/e6wsDNgR0oo1FNs4syzckdQ==", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n messagingengine.com; h=cc:content-transfer-encoding:date:from\n :in-reply-to:message-id:mime-version:references:subject:to\n :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=\n fm2; bh=jkmR8jre9iG6r4EPvIelfidmLMPcmV65reNxetXbfb0=; b=MCDeaMEr\n H89qWOZPV5Qop2SnG0GBcsGkBe5qXUfTBIPrLhpYL78+8m7DsUzI7t32TuCkVBO4\n uzEoVmKVkxkeXcg3VKMhEHb9/B5Yp/4jP42EGEp/Gq47CltvyJ7H8gUCpQMO1eJp\n 9mWfKLRZI8eYSMTLOjhTEk1Ztpw8xvkeQgt7y3CsGz6aPP0uLkIVrG2FAkLXr69B\n S+/fDrh7Ckl5hbSEfsVsGZ0pf02vzPS6XrKdvIuG5nEWzbMiDM7hzBgBJiocTdLk\n pAbvTvTcGFGiBP2qi81o92EjqWM5Mh/08z79r9d2kPwEV4OD4XbqEsnRa5ttZmuz\n aUWO7Lmf8ksVkg==" ], "X-ME-Sender": "<xms:Kus3YFa06hebuPfhx8cvhlhiWSJLkqwUF5FslF3N-ZvShTk6EMN6Zw>\n <xme:Kus3YFt8KcTlyWEaIydUITcb4D341fR6iXqHQU0QmpKoucFnMxEC1h7Tgnhw_M72C\n XswpYMnuwssatvM2g>", "X-ME-Proxy-Cause": "\n gggruggvucftvghtrhhoucdtuddrgeduledrkeelgdduudegucetufdoteggodetrfdotf\n fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen\n uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne\n cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefvhhhomhgr\n shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg\n ftrfgrthhtvghrnhepvdehgfeivdejgedtveehfefhteelfefgieevgfffveefjeegtdfg\n uedthedtgeevnecukfhppeejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghruf\n hiiigvpeegnecurfgrrhgrmhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghl\n ohhnrdhnvght", "X-ME-Proxy": "<xmx:Kus3YPODvb_TrEgugHFlluUvfwrGAzTfyPRhdURs-V1J-pLVyWSaog>\n <xmx:Kus3YE6fcdUt8BfKG5jqNeFJ82sF4_GT1wkmUlGUBBK9qRUdbDF9pg>\n <xmx:Kus3YNRecYRE-at9Ligugd8Hxf3ZcoOJEEpFSSj5P0wfWyh1Vv_Obg>\n <xmx:Kus3YFjcVSi5BGYb3RTz1-L8C5YODYoBBP2TCad410fRccrcUJHiog>", "From": "Thomas Monjalon <thomas@monjalon.net>", "To": "dev@dpdk.org", "Cc": "ncopa@alpinelinux.org, stable@dpdk.org,\n Ferruh Yigit <ferruh.yigit@intel.com>,\n David Marchand <david.marchand@6wind.com>,\n Yuanhan Liu <yuanhan.liu@linux.intel.com>", "Date": "Thu, 25 Feb 2021 19:22:41 +0100", "Message-Id": "<20210225182250.1149592-9-thomas@monjalon.net>", "X-Mailer": "git-send-email 2.30.1", "In-Reply-To": "<20210225182250.1149592-1-thomas@monjalon.net>", "References": "<20190313170657.16688-1-ncopa@alpinelinux.org>\n <20210225182250.1149592-1-thomas@monjalon.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 08/17] bus/pci: support I/O port operations\n with musl", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Natanael Copa <ncopa@alpinelinux.org>\n\nAdd a fallback for non-GNU libc systems like musl libc for the\nnon-standard functions outl_p, outw_p and outb_p.\n\nThis solves the following buildtime errors when building with musl libc:\npci_uio.c:(.text+0xaa1): undefined reference to `outw_p'\npci_uio.c:(.text+0xac5): undefined reference to `outl_p'\npci_uio.c:(.text+0xadf): undefined reference to `outb_p'\n\nThe non-x86 case are handled with macros to factor out various ifdefs.\n\nBugzilla ID: 35\nFixes: 756ce64b1ecd (\"eal: introduce PCI ioport API\")\nCc: stable@dpdk.org\n\nSigned-off-by: Natanael Copa <ncopa@alpinelinux.org>\nSigned-off-by: Thomas Monjalon <thomas@monjalon.net>\n---\n drivers/bus/pci/linux/pci_uio.c | 91 ++++++++++++++++++++++-----------\n 1 file changed, 61 insertions(+), 30 deletions(-)", "diff": "diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c\nindex f3305a2f28..1294f505be 100644\n--- a/drivers/bus/pci/linux/pci_uio.c\n+++ b/drivers/bus/pci/linux/pci_uio.c\n@@ -489,6 +489,16 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,\n }\n #endif\n \n+#ifdef RTE_ARCH_X86\n+#define pci_uio_inl(reg) inl(reg)\n+#define pci_uio_inw(reg) inw(reg)\n+#define pci_uio_inb(reg) inb(reg)\n+#else /* !RTE_ARCH_X86 */\n+#define pci_uio_inl(reg) (*(volatile uint32_t *)(reg))\n+#define pci_uio_inw(reg) (*(volatile uint16_t *)(reg))\n+#define pci_uio_inb(reg) (*(volatile uint8_t *)(reg))\n+#endif\n+\n void\n pci_uio_ioport_read(struct rte_pci_ioport *p,\n \t\t void *data, size_t len, off_t offset)\n@@ -500,29 +510,62 @@ pci_uio_ioport_read(struct rte_pci_ioport *p,\n \tfor (d = data; len > 0; d += size, reg += size, len -= size) {\n \t\tif (len >= 4) {\n \t\t\tsize = 4;\n-#if defined(RTE_ARCH_X86)\n-\t\t\t*(uint32_t *)d = inl(reg);\n-#else\n-\t\t\t*(uint32_t *)d = *(volatile uint32_t *)reg;\n-#endif\n+\t\t\t*(uint32_t *)d = pci_uio_inl(reg);\n \t\t} else if (len >= 2) {\n \t\t\tsize = 2;\n-#if defined(RTE_ARCH_X86)\n-\t\t\t*(uint16_t *)d = inw(reg);\n-#else\n-\t\t\t*(uint16_t *)d = *(volatile uint16_t *)reg;\n-#endif\n+\t\t\t*(uint16_t *)d = pci_uio_inw(reg);\n \t\t} else {\n \t\t\tsize = 1;\n-#if defined(RTE_ARCH_X86)\n-\t\t\t*d = inb(reg);\n-#else\n-\t\t\t*d = *(volatile uint8_t *)reg;\n-#endif\n+\t\t\t*d = pci_uio_inb(reg);\n \t\t}\n \t}\n }\n \n+#ifdef RTE_ARCH_X86\n+static inline void\n+pci_uio_outl_p(unsigned int value, unsigned short int port)\n+{\n+#ifdef __GLIBC__\n+\toutl_p(value, port);\n+#else\n+\t__asm__ __volatile__ (\"outl %0,%w1\\noutb %%al,$0x80\" : : \"a\" (value),\n+\t\t\t \"Nd\" (port));\n+#endif\n+}\n+#else /* !RTE_ARCH_X86 */\n+#define pci_uio_outl_p(value, reg) (*(volatile uint32_t *)(reg) = (value))\n+#endif\n+\n+#ifdef RTE_ARCH_X86\n+static inline void\n+pci_uio_outw_p(unsigned short int value, unsigned short int port)\n+{\n+#ifdef __GLIBC__\n+\toutw_p(value, port);\n+#else\n+\t__asm__ __volatile__ (\"outw %w0,%w1\\noutb %%al,$0x80\" : : \"a\" (value),\n+\t\t\t \"Nd\" (port));\n+#endif\n+}\n+#else /* !RTE_ARCH_X86 */\n+#define pci_uio_outw_p(value, reg) (*(volatile uint16_t *)(reg) = (value))\n+#endif\n+\n+#ifdef RTE_ARCH_X86\n+static inline void\n+pci_uio_outb_p(unsigned char value, unsigned short int port)\n+{\n+#ifdef __GLIBC__\n+\toutb_p(value, port);\n+#else\n+\t__asm__ __volatile__ (\"outb %b0,%w1\\noutb %%al,$0x80\" : : \"a\" (value),\n+\t\t\t \"Nd\" (port));\n+#endif\n+}\n+#else /* !RTE_ARCH_X86 */\n+#define pci_uio_outb_p(value, reg) (*(volatile uint8_t *)(reg) = (value))\n+#endif\n+\n void\n pci_uio_ioport_write(struct rte_pci_ioport *p,\n \t\t const void *data, size_t len, off_t offset)\n@@ -534,25 +577,13 @@ pci_uio_ioport_write(struct rte_pci_ioport *p,\n \tfor (s = data; len > 0; s += size, reg += size, len -= size) {\n \t\tif (len >= 4) {\n \t\t\tsize = 4;\n-#if defined(RTE_ARCH_X86)\n-\t\t\toutl_p(*(const uint32_t *)s, reg);\n-#else\n-\t\t\t*(volatile uint32_t *)reg = *(const uint32_t *)s;\n-#endif\n+\t\t\tpci_uio_outl_p(*(const uint32_t *)s, reg);\n \t\t} else if (len >= 2) {\n \t\t\tsize = 2;\n-#if defined(RTE_ARCH_X86)\n-\t\t\toutw_p(*(const uint16_t *)s, reg);\n-#else\n-\t\t\t*(volatile uint16_t *)reg = *(const uint16_t *)s;\n-#endif\n+\t\t\tpci_uio_outw_p(*(const uint16_t *)s, reg);\n \t\t} else {\n \t\t\tsize = 1;\n-#if defined(RTE_ARCH_X86)\n-\t\t\toutb_p(*s, reg);\n-#else\n-\t\t\t*(volatile uint8_t *)reg = *s;\n-#endif\n+\t\t\tpci_uio_outb_p(*s, reg);\n \t\t}\n \t}\n }\n", "prefixes": [ "v5", "08/17" ] }