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GET /api/patches/88009/?format=api
{ "id": 88009, "url": "https://patches.dpdk.org/api/patches/88009/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210219101422.19121-7-rmody@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210219101422.19121-7-rmody@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210219101422.19121-7-rmody@marvell.com", "date": "2021-02-19T10:14:21", "name": "[6/7] net/qede: add support for new HW", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d12bbf95033f5aa3e3963933e724c05a60ee04be", "submitter": { "id": 1211, "url": "https://patches.dpdk.org/api/people/1211/?format=api", "name": "Rasesh Mody", "email": "rmody@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210219101422.19121-7-rmody@marvell.com/mbox/", "series": [ { "id": 15303, "url": "https://patches.dpdk.org/api/series/15303/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=15303", "date": "2021-02-19T10:14:15", "name": "net/qede: add support for new HW", "version": 1, "mbox": "https://patches.dpdk.org/series/15303/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/88009/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/88009/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 13FCFA054A;\n\tFri, 19 Feb 2021 11:15:29 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C878E1608DD;\n\tFri, 19 Feb 2021 11:15:22 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 06AC91608DB\n for <dev@dpdk.org>; Fri, 19 Feb 2021 11:15:20 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 11JAF0bB019430; Fri, 19 Feb 2021 02:15:20 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 36sesvvtd0-7\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Fri, 19 Feb 2021 02:15:20 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 19 Feb 2021 02:15:05 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Fri, 19 Feb 2021 02:15:05 -0800", "from irv1user08.caveonetworks.com (unknown [10.104.116.105])\n by maili.marvell.com (Postfix) with ESMTP id ADC2F3F7043;\n Fri, 19 Feb 2021 02:15:05 -0800 (PST)", "(from rmody@localhost)\n by irv1user08.caveonetworks.com (8.14.4/8.14.4/Submit) id 11JAF5ik019203;\n Fri, 19 Feb 2021 02:15:05 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=mFZQD+ViSO8Re7Fs6zq4AU0dEl0jgI1JtzbfBMGpCV8=;\n b=c5a2R6TDwhcA5ZGD/rWeLoPWMckD01hiiIUm+7wNglg2u9zPChVCOZl9zPTFKV6AFVqv\n 5H9pq278Kvj/Y/1KhUq7eAkaPARy4az8MKkbCWl7KgEMsEuc9/+wxbLrMA77bpOOzjXY\n CbKj07aDHow1ZWfv7X9ZseoXjLZwctDM/Ug98VhW3AT2xS1tB43TTfjsV6Enz4R7e5Dj\n r0MSiTyi4UwQuZ5LWSylJeIiU1WEYoVMGGDneBaoWzToWpPTVroNJjDUA7w7yFhI7Wn+\n u2cAKpMpakTBha3LPDrpBYj+BfqpCd27Fucvdo9rveVU4RZOHqEWg0PoLV12M841uPvJ pw==", "X-Authentication-Warning": "irv1user08.caveonetworks.com: rmody set sender to\n rmody@marvell.com using -f", "From": "Rasesh Mody <rmody@marvell.com>", "To": "<jerinj@marvell.com>, <ferruh.yigit@intel.com>", "CC": "Rasesh Mody <rmody@marvell.com>, <dev@dpdk.org>,\n <GR-Everest-DPDK-Dev@marvell.com>, Igor Russkikh <irusskikh@marvell.com>", "Date": "Fri, 19 Feb 2021 02:14:21 -0800", "Message-ID": "<20210219101422.19121-7-rmody@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20210219101422.19121-1-rmody@marvell.com>", "References": "<20210219101422.19121-1-rmody@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761\n definitions=2021-02-19_04:2021-02-18,\n 2021-02-19 signatures=0", "Subject": "[dpdk-dev] [PATCH 6/7] net/qede: add support for new HW", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds PMD support for new hardware (adding new PCI IDs)\n50xxx family of Marvell fastlinq adapters. The PMD version is\nupdated to 3.0.0.1.\n\nSigned-off-by: Rasesh Mody <rmody@marvell.com>\nSigned-off-by: Igor Russkikh <irusskikh@marvell.com>\n---\n drivers/net/qede/qede_debug.c | 3 +--\n drivers/net/qede/qede_ethdev.c | 8 +++++++-\n drivers/net/qede/qede_ethdev.h | 11 +++++++----\n 3 files changed, 15 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/qede/qede_debug.c b/drivers/net/qede/qede_debug.c\nindex 085d0532b..ca2879432 100644\n--- a/drivers/net/qede/qede_debug.c\n+++ b/drivers/net/qede/qede_debug.c\n@@ -8099,8 +8099,7 @@ void qed_dbg_pf_init(struct ecore_dev *edev)\n \t/* Debug values are after init values.\n \t * The offset is the first dword of the file.\n \t */\n-\t/* TBD: change hardcoded value to offset from FW file */\n-\tdbg_values = (const u8 *)edev->firmware + 1337296;\n+\tdbg_values = (const u8 *)edev->firmware + sizeof(u32);\n \n \tfor_each_hwfn(edev, i) {\n \t\tqed_dbg_set_bin_ptr(&edev->hwfns[i], dbg_values);\ndiff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex 668821dcb..8b151e907 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -374,7 +374,7 @@ static void qede_print_adapter_info(struct rte_eth_dev *dev)\n \tDP_INFO(edev, \"**************************************************\\n\");\n \tDP_INFO(edev, \" %-20s: %s\\n\", \"DPDK version\", rte_version());\n \tDP_INFO(edev, \" %-20s: %s %c%d\\n\", \"Chip details\",\n-\t\t ECORE_IS_BB(edev) ? \"BB\" : \"AH\",\n+\t\t ECORE_IS_E5(edev) ? \"AHP\" : ECORE_IS_BB(edev) ? \"BB\" : \"AH\",\n \t\t 'A' + edev->chip_rev,\n \t\t (int)edev->chip_metal);\n \tsnprintf(ver_str, QEDE_PMD_DRV_VER_STR_SIZE, \"%s\",\n@@ -2811,6 +2811,9 @@ static const struct rte_pci_id pci_id_qedevf_map[] = {\n \t{\n \t\tQEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_IOV)\n \t},\n+\t{\n+\t\tQEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_E5_IOV)\n+\t},\n \t{.vendor_id = 0,}\n };\n \n@@ -2846,6 +2849,9 @@ static const struct rte_pci_id pci_id_qede_map[] = {\n \t{\n \t\tQEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_AH_25G)\n \t},\n+\t{\n+\t\tQEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_QLOGIC_E5)\n+\t},\n \t{.vendor_id = 0,}\n };\n \ndiff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h\nindex da4b87f5e..d065069a9 100644\n--- a/drivers/net/qede/qede_ethdev.h\n+++ b/drivers/net/qede/qede_ethdev.h\n@@ -45,9 +45,9 @@\n /* Driver versions */\n #define QEDE_PMD_DRV_VER_STR_SIZE NAME_SIZE /* 128 */\n #define QEDE_PMD_VER_PREFIX\t\t\"QEDE PMD\"\n-#define QEDE_PMD_VERSION_MAJOR\t\t2\n-#define QEDE_PMD_VERSION_MINOR\t 11\n-#define QEDE_PMD_VERSION_REVISION 3\n+#define QEDE_PMD_VERSION_MAJOR\t\t3\n+#define QEDE_PMD_VERSION_MINOR\t 0\n+#define QEDE_PMD_VERSION_REVISION 0\n #define QEDE_PMD_VERSION_PATCH\t 1\n \n #define QEDE_PMD_DRV_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) \".\" \\\n@@ -109,6 +109,8 @@\n #define CHIP_NUM_AH_40G\t\t\t 0x8072\n #define CHIP_NUM_AH_25G\t\t\t 0x8073\n #define CHIP_NUM_AH_IOV\t\t\t 0x8090\n+#define CHIP_NUM_E5\t\t\t 0x8170\n+#define CHIP_NUM_E5_IOV\t\t\t 0x8190\n \n #define PCI_DEVICE_ID_QLOGIC_NX2_57980E CHIP_NUM_57980E\n #define PCI_DEVICE_ID_QLOGIC_NX2_57980S CHIP_NUM_57980S\n@@ -123,7 +125,8 @@\n #define PCI_DEVICE_ID_QLOGIC_AH_40G CHIP_NUM_AH_40G\n #define PCI_DEVICE_ID_QLOGIC_AH_25G CHIP_NUM_AH_25G\n #define PCI_DEVICE_ID_QLOGIC_AH_IOV CHIP_NUM_AH_IOV\n-\n+#define PCI_DEVICE_ID_QLOGIC_E5 CHIP_NUM_E5\n+#define PCI_DEVICE_ID_QLOGIC_E5_IOV CHIP_NUM_E5_IOV\n \n \n extern char qede_fw_file[];\n", "prefixes": [ "6/7" ] }