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GET /api/patches/87761/?format=api
{ "id": 87761, "url": "https://patches.dpdk.org/api/patches/87761/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210204195853.13411-7-aboyer@pensando.io/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210204195853.13411-7-aboyer@pensando.io>", "list_archive_url": "https://inbox.dpdk.org/dev/20210204195853.13411-7-aboyer@pensando.io", "date": "2021-02-04T19:58:45", "name": "[06/14] net/ionic: cut down queue structure", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7de44b90e4f80422ea730aeb9a1084947a1de5bc", "submitter": { "id": 2036, "url": "https://patches.dpdk.org/api/people/2036/?format=api", "name": "Andrew Boyer", "email": "aboyer@pensando.io" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210204195853.13411-7-aboyer@pensando.io/mbox/", "series": [ { "id": 15176, "url": "https://patches.dpdk.org/api/series/15176/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=15176", "date": "2021-02-04T19:58:39", "name": "net/ionic: struct optimizations, fixes", "version": 1, "mbox": "https://patches.dpdk.org/series/15176/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/87761/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/87761/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9E837A0524;\n\tThu, 4 Feb 2021 20:59:58 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A4F69240802;\n\tThu, 4 Feb 2021 20:59:31 +0100 (CET)", "from mail-pg1-f180.google.com (mail-pg1-f180.google.com\n [209.85.215.180])\n by mails.dpdk.org (Postfix) with ESMTP id 63C542407EC\n for <dev@dpdk.org>; Thu, 4 Feb 2021 20:59:30 +0100 (CET)", "by mail-pg1-f180.google.com with SMTP id z21so2884336pgj.4\n for <dev@dpdk.org>; Thu, 04 Feb 2021 11:59:30 -0800 (PST)", "from driver-dev1.pensando.io ([12.226.153.42])\n by smtp.gmail.com with ESMTPSA id r14sm7757915pgi.27.2021.02.04.11.59.28\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 04 Feb 2021 11:59:28 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references;\n bh=8zx+A9hRf0VaJNIYhT0ZA57inJkSaD+LcVfJm98kn1o=;\n b=4uREDx+BapDXxA9H5ibropbiAYPUqLLcn7HzJaxrOoe8oI2SnYUeB2kMoAvMCObnRe\n YhnDKviMgPSnRGtUH2JmQthdHixC/Ge9vF62TYK24DgKb6WkJ88WpviUwtRMiupak7pz\n lsynpwDXhb9F6TDF22gP2BosiUDn0Y7/5+ag/NPqmFhmVBZe6TwM71fHuhhX8sphdD82\n 95gqfk+tcg8m4zz1WXDJYzAGMRRYmcoGgGDhZDiUZRpJY3ba9zW5kzRbeUoNCk7qJoBL\n KTTbqSAAcKZzXbBsONJmGIz5cpY7ieiLJXp9ohTRMTt9xqls/ae7o26qpCdaN92AEqaz\n 8qFA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references;\n bh=8zx+A9hRf0VaJNIYhT0ZA57inJkSaD+LcVfJm98kn1o=;\n b=bTEZseWJ4fXbDoA+KnrP2PIncKD6KgX2JZOdY20sC379f26/NrGGfiIHBVPj8G7NWk\n 6ov1mUa+hasDBbyWbkcBaRrSf7wjgcpQRNJXteWUGx8AZBeTEzm5Sn5n2avH0qE+RbJZ\n TD+ESsD2KCdwWmHAy/hyotjbmf78acEdQN72vka+tRgUv0X9tmgbQca5yeE6ySk6QZCl\n tcknq6ct3k6LzNgFMTJOE9sEc+hIPp9fB5mkSS3xSxGkJ3bzydPfwkfBNlQ4Qst/HTjh\n +FJGUD1SlU5ewoBA9Zu+jfLybh0TMtDwfdrEkz0v9BPXhXSexmhWnpsPwOaeRJ84kit7\n cIQA==", "X-Gm-Message-State": "AOAM5327qz6bdO9+n6epipEbW0wIbeT1aEjVbEyz716FEJpYBJWppFH/\n ilSPoXbib+MG4/EW0SL/5gT1eOEAyKUfJA==", "X-Google-Smtp-Source": "\n ABdhPJxGZLgVv18s5curoTygM31oJ48jSkvClXm8mOAUgGvOn7IrwlFaf7HVsBmuopEtedWpTQCUZA==", "X-Received": "by 2002:a62:e807:0:b029:1cd:405d:f01f with SMTP id\n c7-20020a62e8070000b02901cd405df01fmr1082742pfi.74.1612468769287;\n Thu, 04 Feb 2021 11:59:29 -0800 (PST)", "From": "Andrew Boyer <aboyer@pensando.io>", "To": "dev@dpdk.org", "Cc": "Alfredo Cardigliano <cardigliano@ntop.org>,\n Andrew Boyer <aboyer@pensando.io>", "Date": "Thu, 4 Feb 2021 11:58:45 -0800", "Message-Id": "<20210204195853.13411-7-aboyer@pensando.io>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210204195853.13411-1-aboyer@pensando.io>", "References": "<20210204195853.13411-1-aboyer@pensando.io>", "Subject": "[dpdk-dev] [PATCH 06/14] net/ionic: cut down queue structure", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This will conserve resources.\n\nRename ionic_qcq_alloc() arg from 'base' to 'type_name' for clarity.\n\nSigned-off-by: Andrew Boyer <aboyer@pensando.io>\n---\n drivers/net/ionic/ionic_dev.c | 14 +++-------\n drivers/net/ionic/ionic_dev.h | 34 ++++++++++-------------\n drivers/net/ionic/ionic_lif.c | 49 ++++++++++++++++++++++------------\n drivers/net/ionic/ionic_main.c | 4 +--\n drivers/net/ionic/ionic_rxtx.c | 8 +++---\n 5 files changed, 56 insertions(+), 53 deletions(-)", "diff": "diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c\nindex 97fb8acf9b..cfaf4abc23 100644\n--- a/drivers/net/ionic/ionic_dev.c\n+++ b/drivers/net/ionic/ionic_dev.c\n@@ -405,26 +405,20 @@ ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,\n }\n \n int\n-ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,\n-\t struct ionic_queue *q, uint32_t index, uint32_t num_descs,\n-\t size_t desc_size, size_t sg_desc_size)\n+ionic_q_init(struct ionic_queue *q, uint32_t index, uint16_t num_descs)\n {\n \tuint32_t ring_size;\n \n-\tif (desc_size == 0 || !rte_is_power_of_2(num_descs))\n+\tif (!rte_is_power_of_2(num_descs))\n \t\treturn -EINVAL;\n \n \tring_size = rte_log2_u32(num_descs);\n-\n \tif (ring_size < 2 || ring_size > 16)\n \t\treturn -EINVAL;\n \n-\tq->lif = lif;\n-\tq->idev = idev;\n \tq->index = index;\n \tq->num_descs = num_descs;\n-\tq->desc_size = desc_size;\n-\tq->sg_desc_size = sg_desc_size;\n+\tq->size_mask = num_descs - 1;\n \tq->head_idx = 0;\n \tq->tail_idx = 0;\n \n@@ -450,7 +444,7 @@ ionic_q_post(struct ionic_queue *q, bool ring_doorbell, void *cb_arg)\n {\n \tq->info[q->head_idx] = cb_arg;\n \n-\tq->head_idx = (q->head_idx + 1) & (q->num_descs - 1);\n+\tq->head_idx = Q_NEXT_TO_POST(q, 1);\n \n \tif (ring_doorbell)\n \t\tionic_q_flush(q);\ndiff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h\nindex 511d0bc7aa..0d1aff776b 100644\n--- a/drivers/net/ionic/ionic_dev.h\n+++ b/drivers/net/ionic/ionic_dev.h\n@@ -136,25 +136,21 @@ struct ionic_dev {\n #define IONIC_INFO_PTR(_q, _i)\t(&(_q)->info[IONIC_INFO_IDX((_q), _i)])\n \n struct ionic_queue {\n-\tstruct ionic_dev *idev;\n-\tstruct ionic_lif *lif;\n-\tuint32_t index;\n-\tuint32_t type;\n-\tuint32_t hw_index;\n-\tuint32_t hw_type;\n+\tuint16_t num_descs;\n+\tuint16_t head_idx;\n+\tuint16_t tail_idx;\n+\tuint16_t size_mask;\n+\tuint8_t type;\n+\tuint8_t hw_type;\n \tvoid *base;\n \tvoid *sg_base;\n+\tstruct ionic_doorbell __iomem *db;\n \tvoid **info;\n+\n+\tuint32_t index;\n+\tuint32_t hw_index;\n \trte_iova_t base_pa;\n \trte_iova_t sg_base_pa;\n-\tuint32_t tail_idx;\n-\tuint32_t head_idx;\n-\tuint32_t num_descs;\n-\tuint32_t desc_size;\n-\tuint32_t sg_desc_size;\n-\tuint32_t qid;\n-\tuint32_t qtype;\n-\tstruct ionic_doorbell __iomem *db;\n };\n \n #define IONIC_INTR_NONE\t\t(-1)\n@@ -221,22 +217,20 @@ struct ionic_doorbell __iomem *ionic_db_map(struct ionic_lif *lif,\n \n int ionic_cq_init(struct ionic_cq *cq, uint16_t num_descs);\n void ionic_cq_map(struct ionic_cq *cq, void *base, rte_iova_t base_pa);\n-typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, uint32_t cq_desc_index,\n+typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, uint16_t cq_desc_index,\n \t\tvoid *cb_arg);\n uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,\n \tionic_cq_cb cb, void *cb_arg);\n \n-int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,\n-\tstruct ionic_queue *q, uint32_t index, uint32_t num_descs,\n-\tsize_t desc_size, size_t sg_desc_size);\n+int ionic_q_init(struct ionic_queue *q, uint32_t index, uint16_t num_descs);\n void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);\n void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);\n void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, void *cb_arg);\n \n-static inline uint32_t\n+static inline uint16_t\n ionic_q_space_avail(struct ionic_queue *q)\n {\n-\tuint32_t avail = q->tail_idx;\n+\tuint16_t avail = q->tail_idx;\n \n \tif (q->head_idx >= avail)\n \t\tavail += q->num_descs - q->head_idx - 1;\ndiff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c\nindex 462a526935..fcd6fca9a3 100644\n--- a/drivers/net/ionic/ionic_lif.c\n+++ b/drivers/net/ionic/ionic_lif.c\n@@ -34,7 +34,7 @@ int\n ionic_qcq_enable(struct ionic_qcq *qcq)\n {\n \tstruct ionic_queue *q = &qcq->q;\n-\tstruct ionic_lif *lif = q->lif;\n+\tstruct ionic_lif *lif = qcq->lif;\n \tstruct ionic_admin_ctx ctx = {\n \t\t.pending_work = true,\n \t\t.cmd.q_control = {\n@@ -52,7 +52,7 @@ int\n ionic_qcq_disable(struct ionic_qcq *qcq)\n {\n \tstruct ionic_queue *q = &qcq->q;\n-\tstruct ionic_lif *lif = q->lif;\n+\tstruct ionic_lif *lif = qcq->lif;\n \tstruct ionic_admin_ctx ctx = {\n \t\t.pending_work = true,\n \t\t.cmd.q_control = {\n@@ -585,16 +585,17 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)\n }\n \n static int\n-ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,\n+ionic_qcq_alloc(struct ionic_lif *lif,\n+\t\tuint8_t type,\n \t\tuint32_t index,\n-\t\tconst char *base, uint32_t flags,\n-\t\tuint32_t num_descs,\n-\t\tuint32_t desc_size,\n-\t\tuint32_t cq_desc_size,\n-\t\tuint32_t sg_desc_size,\n+\t\tconst char *type_name,\n+\t\tuint16_t flags,\n+\t\tuint16_t num_descs,\n+\t\tuint16_t desc_size,\n+\t\tuint16_t cq_desc_size,\n+\t\tuint16_t sg_desc_size,\n \t\tstruct ionic_qcq **qcq)\n {\n-\tstruct ionic_dev *idev = &lif->adapter->idev;\n \tstruct ionic_qcq *new;\n \tuint32_t q_size, cq_size, sg_size, total_size;\n \tvoid *q_base, *cq_base, *sg_base;\n@@ -642,8 +643,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,\n \n \tnew->q.type = type;\n \n-\terr = ionic_q_init(lif, idev, &new->q, index, num_descs,\n-\t\tdesc_size, sg_desc_size);\n+\terr = ionic_q_init(&new->q, index, num_descs);\n \tif (err) {\n \t\tIONIC_PRINT(ERR, \"Queue initialization failed\");\n \t\tgoto err_out_free_info;\n@@ -656,7 +656,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,\n \t}\n \n \tnew->base_z = rte_eth_dma_zone_reserve(lif->eth_dev,\n-\t\tbase /* name */, index /* queue_idx */,\n+\t\ttype_name, index /* queue_idx */,\n \t\ttotal_size, IONIC_ALIGN, socket_id);\n \n \tif (!new->base_z) {\n@@ -727,7 +727,11 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs,\n \tint err = -ENOMEM;\n \n \tflags = IONIC_QCQ_F_SG;\n-\terr = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, index, \"rx\", flags,\n+\terr = ionic_qcq_alloc(lif,\n+\t\tIONIC_QTYPE_RXQ,\n+\t\tindex,\n+\t\t\"rx\",\n+\t\tflags,\n \t\tnrxq_descs,\n \t\tsizeof(struct ionic_rxq_desc),\n \t\tsizeof(struct ionic_rxq_comp),\n@@ -749,7 +753,11 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs,\n \tint err = -ENOMEM;\n \n \tflags = IONIC_QCQ_F_SG;\n-\terr = ionic_qcq_alloc(lif, IONIC_QTYPE_TXQ, index, \"tx\", flags,\n+\terr = ionic_qcq_alloc(lif,\n+\t\tIONIC_QTYPE_TXQ,\n+\t\tindex,\n+\t\t\"tx\",\n+\t\tflags,\n \t\tntxq_descs,\n \t\tsizeof(struct ionic_txq_desc),\n \t\tsizeof(struct ionic_txq_comp),\n@@ -770,7 +778,11 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif)\n \tint err = -ENOMEM;\n \n \tflags = 0;\n-\terr = ionic_qcq_alloc(lif, IONIC_QTYPE_ADMINQ, 0, \"admin\", flags,\n+\terr = ionic_qcq_alloc(lif,\n+\t\tIONIC_QTYPE_ADMINQ,\n+\t\t0,\n+\t\t\"admin\",\n+\t\tflags,\n \t\tIONIC_ADMINQ_LENGTH,\n \t\tsizeof(struct ionic_admin_cmd),\n \t\tsizeof(struct ionic_admin_comp),\n@@ -790,7 +802,10 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif)\n \tuint32_t flags = 0;\n \tint err = -ENOMEM;\n \n-\terr = ionic_qcq_alloc(lif, IONIC_QTYPE_NOTIFYQ, 0, \"notify\",\n+\terr = ionic_qcq_alloc(lif,\n+\t\tIONIC_QTYPE_NOTIFYQ,\n+\t\t0,\n+\t\t\"notify\",\n \t\tflags,\n \t\tIONIC_NOTIFYQ_LENGTH,\n \t\tsizeof(struct ionic_notifyq_cmd),\n@@ -1216,7 +1231,7 @@ ionic_lif_handle_fw_down(struct ionic_lif *lif)\n }\n \n static bool\n-ionic_notifyq_cb(struct ionic_cq *cq, uint32_t cq_desc_index, void *cb_arg)\n+ionic_notifyq_cb(struct ionic_cq *cq, uint16_t cq_desc_index, void *cb_arg)\n {\n \tunion ionic_notifyq_comp *cq_desc_base = cq->base;\n \tunion ionic_notifyq_comp *cq_desc = &cq_desc_base[cq_desc_index];\ndiff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c\nindex c9c0123d6a..b358a76f06 100644\n--- a/drivers/net/ionic/ionic_main.c\n+++ b/drivers/net/ionic/ionic_main.c\n@@ -146,7 +146,7 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)\n }\n \n static bool\n-ionic_adminq_service(struct ionic_cq *cq, uint32_t cq_desc_index,\n+ionic_adminq_service(struct ionic_cq *cq, uint16_t cq_desc_index,\n \t\tvoid *cb_arg __rte_unused)\n {\n \tstruct ionic_admin_comp *cq_desc_base = cq->base;\n@@ -174,7 +174,7 @@ ionic_adminq_service(struct ionic_cq *cq, uint32_t cq_desc_index,\n \t\t}\n \n \t\tcurr_q_tail_idx = q->tail_idx;\n-\t\tq->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);\n+\t\tq->tail_idx = Q_NEXT_TO_SRVC(q, 1);\n \t} while (curr_q_tail_idx != stop_index);\n \n \treturn true;\ndiff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c\nindex 107b1cb091..ce38651559 100644\n--- a/drivers/net/ionic/ionic_rxtx.c\n+++ b/drivers/net/ionic/ionic_rxtx.c\n@@ -98,7 +98,7 @@ ionic_tx_flush(struct ionic_qcq *txq)\n \t\twhile (q->tail_idx != comp_index) {\n \t\t\tinfo = IONIC_INFO_PTR(q, q->tail_idx);\n \n-\t\t\tq->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);\n+\t\t\tq->tail_idx = Q_NEXT_TO_SRVC(q, 1);\n \n \t\t\t/* Prefetch the next 4 descriptors */\n \t\t\tif ((q->tail_idx & 0x3) == 0)\n@@ -540,7 +540,7 @@ ionic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \twhile (nb_tx < nb_pkts) {\n \t\tlast = (nb_tx == (nb_pkts - 1));\n \n-\t\tnext_q_head_idx = (q->head_idx + 1) & (q->num_descs - 1);\n+\t\tnext_q_head_idx = Q_NEXT_TO_POST(q, 1);\n \t\tif ((next_q_head_idx & 0x3) == 0) {\n \t\t\tstruct ionic_txq_desc *desc_base = q->base;\n \t\t\trte_prefetch0(&desc_base[next_q_head_idx]);\n@@ -647,7 +647,7 @@ ionic_rx_empty(struct ionic_queue *q)\n \t\tmbuf = info[0];\n \t\trte_mempool_put(rxq->mb_pool, mbuf);\n \n-\t\tq->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);\n+\t\tq->tail_idx = Q_NEXT_TO_SRVC(q, 1);\n \t}\n }\n \n@@ -1055,7 +1055,7 @@ ionic_rxq_service(struct ionic_qcq *rxq, uint32_t work_to_do,\n \t\t\tmore = (q->tail_idx != cq_desc->comp_index);\n \n \t\t\tcurr_q_tail_idx = q->tail_idx;\n-\t\t\tq->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);\n+\t\t\tq->tail_idx = Q_NEXT_TO_SRVC(q, 1);\n \n \t\t\t/* Prefetch the next 4 descriptors */\n \t\t\tif ((q->tail_idx & 0x3) == 0)\n", "prefixes": [ "06/14" ] }