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GET /api/patches/87504/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 87504,
    "url": "https://patches.dpdk.org/api/patches/87504/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210129001640.1251-5-pnalla@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210129001640.1251-5-pnalla@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210129001640.1251-5-pnalla@marvell.com",
    "date": "2021-01-29T00:16:31",
    "name": "[v6,04/12] net/octeontx_ep: add device init and uninit",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "7d0d026d5d525e76dd74f2a08928e3dc551f3fe7",
    "submitter": {
        "id": 2074,
        "url": "https://patches.dpdk.org/api/people/2074/?format=api",
        "name": "Pradeep Nalla",
        "email": "pnalla@marvell.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210129001640.1251-5-pnalla@marvell.com/mbox/",
    "series": [
        {
            "id": 15004,
            "url": "https://patches.dpdk.org/api/series/15004/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=15004",
            "date": "2021-01-28T15:22:09",
            "name": "Octeon Tx/Tx2 Endpoint pmd",
            "version": 5,
            "mbox": "https://patches.dpdk.org/series/15004/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/87504/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/87504/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C2028A09E4;\n\tFri, 29 Jan 2021 01:17:10 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C041722A056;\n\tFri, 29 Jan 2021 01:16:55 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id E98B122A047\n for <dev@dpdk.org>; Fri, 29 Jan 2021 01:16:48 +0100 (CET)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 10T0GTFC009156; Thu, 28 Jan 2021 16:16:48 -0800",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 36b1xpp5s2-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 28 Jan 2021 16:16:48 -0800",
            "from SC-EXCH02.marvell.com (10.93.176.82) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 28 Jan 2021 16:16:46 -0800",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH02.marvell.com\n (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 28 Jan 2021 16:16:45 -0800",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 28 Jan 2021 16:16:45 -0800",
            "from sburla-PowerEdge-T630.caveonetworks.com (unknown\n [10.106.27.217])\n by maili.marvell.com (Postfix) with ESMTP id 49F873F7041;\n Thu, 28 Jan 2021 16:16:45 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=PsOpCFB9jK+ipRHog31r1OiIfcKXBd4gUsHFUbAQPgQ=;\n b=N9VWM1/3gea9Yd0r4Ym+Uh0aIexnBjVsGBIbLsY9Y4SXVdhuPhWC2cDVFxrpJptm1IOM\n i7PfgKfYOOTzXrcXv+GPHvWNfcIhbg0gL1NKXrdcLGxz5hmzCuWGxpEPtiV9u2WSPXl7\n KgFsn8fZRf6DNKZ3gH+efpA+Ttl0BZE1Q5anKNs6syC52I+oiWND6/tma2YPVZeZS6RH\n xeSU1n3fQjzxwGHdIzHIk518KTu1ZJUrEnKILf//A0+jGfUeVfogQXB6dxni5lCusvhu\n b9PmlIfbNc4nzTjXgUABgjU21kGl4y0ckdgi9N59gM1Q8RRBiB9D7p3D2P7zMfRMwmcN pw==",
        "From": "Nalla Pradeep <pnalla@marvell.com>",
        "To": "Nalla Pradeep <pnalla@marvell.com>, Radha Mohan Chintakuntla\n <radhac@marvell.com>, Veerasenareddy Burru <vburru@marvell.com>, \"Anatoly\n Burakov\" <anatoly.burakov@intel.com>",
        "CC": "<jerinj@marvell.com>, <sburla@marvell.com>, <dev@dpdk.org>",
        "Date": "Thu, 28 Jan 2021 16:16:31 -0800",
        "Message-ID": "<20210129001640.1251-5-pnalla@marvell.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20210128152220.214485-1-pnalla@marvell.com>",
        "References": "<20210128152220.214485-1-pnalla@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737\n definitions=2021-01-28_12:2021-01-28,\n 2021-01-28 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v6 04/12] net/octeontx_ep: add device init and\n uninit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add basic init and uninit function which includes\ninitializing fields of ethdev private structure.\n\nSigned-off-by: Nalla Pradeep <pnalla@marvell.com>\n---\n drivers/net/octeontx_ep/otx_ep_common.h | 24 +++++++-\n drivers/net/octeontx_ep/otx_ep_ethdev.c | 75 +++++++++++++++++++++++--\n 2 files changed, 93 insertions(+), 6 deletions(-)",
    "diff": "diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h\nindex 35ea99a79..1324eb144 100644\n--- a/drivers/net/octeontx_ep/otx_ep_common.h\n+++ b/drivers/net/octeontx_ep/otx_ep_common.h\n@@ -4,11 +4,33 @@\n #ifndef _OTX_EP_COMMON_H_\n #define _OTX_EP_COMMON_H_\n \n+#define otx_ep_info(fmt, args...)\t\t\t\t\\\n+\trte_log(RTE_LOG_DEBUG, otx_net_ep_loginfo,\t\t\\\n+\t\t\"%s():%u \" fmt \"\\n\",\t\t\t\t\\\n+\t\t__func__, __LINE__, ##args)\n+\n+#define otx_ep_err(fmt, args...)\t\t\t\t\\\n+\trte_log(RTE_LOG_DEBUG, otx_net_ep_logerr,\t\t\\\n+\t\t\"%s():%u \" fmt \"\\n\",\t\t\t\t\\\n+\t\t__func__, __LINE__, ##args)\n+\n+#define otx_ep_dbg(fmt, args...)\t\t\t\t\\\n+\trte_log(RTE_LOG_DEBUG, otx_net_ep_logdbg,\t\t\\\n+\t\t\"%s():%u \" fmt \"\\n\",\t\t\t\t\\\n+\t\t__func__, __LINE__, ##args)\n+\n /* OTX_EP EP VF device data structure */\n struct otx_ep_device {\n \t/* PCI device pointer */\n \tstruct rte_pci_device *pdev;\n-\n+\tuint16_t chip_id;\n \tstruct rte_eth_dev *eth_dev;\n+\tint port_id;\n+\t/* Memory mapped h/w address */\n+\tuint8_t *hw_addr;\n };\n+\n+extern int otx_net_ep_logdbg;\n+extern int otx_net_ep_logerr;\n+extern int otx_net_ep_loginfo;\n #endif  /* _OTX_EP_COMMON_H_ */\ndiff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c\nindex fc4356013..2c457134e 100644\n--- a/drivers/net/octeontx_ep/otx_ep_ethdev.c\n+++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c\n@@ -8,20 +8,81 @@\n #include \"otx_ep_common.h\"\n #include \"otx_ep_vf.h\"\n \n+#define OTX_EP_DEV(_eth_dev)            ((_eth_dev)->data->dev_private)\n static int\n-otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)\n+otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)\n {\n-\tRTE_SET_USED(eth_dev);\n+\tstruct rte_pci_device *pdev = otx_epvf->pdev;\n+\tuint32_t dev_id = pdev->id.device_id;\n+\tint ret = 0;\n \n-\treturn -ENODEV;\n+\tswitch (dev_id) {\n+\tcase PCI_DEVID_OCTEONTX_EP_VF:\n+\t\totx_epvf->chip_id = dev_id;\n+\t\tbreak;\n+\tcase PCI_DEVID_OCTEONTX2_EP_NET_VF:\n+\tcase PCI_DEVID_CN98XX_EP_NET_VF:\n+\t\totx_epvf->chip_id = dev_id;\n+\t\tbreak;\n+\tdefault:\n+\t\totx_ep_err(\"Unsupported device\\n\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (!ret)\n+\t\totx_ep_info(\"OTX_EP dev_id[%d]\\n\", dev_id);\n+\n+\treturn ret;\n+}\n+\n+/* OTX_EP VF device initialization */\n+static int\n+otx_epdev_init(struct otx_ep_device *otx_epvf)\n+{\n+\tint ret = 0;\n+\n+\tret = otx_ep_chip_specific_setup(otx_epvf);\n+\tif (ret) {\n+\t\totx_ep_err(\"Chip specific setup failed\\n\");\n+\t\tgoto setup_fail;\n+\t}\n+\n+setup_fail:\n+\treturn ret;\n+}\n+\n+static int\n+otx_ep_eth_dev_uninit(__rte_unused struct rte_eth_dev *eth_dev)\n+{\n+\treturn 0;\n }\n \n static int\n otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)\n {\n-\tRTE_SET_USED(eth_dev);\n+\tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);\n+\tstruct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);\n+\tstruct rte_ether_addr vf_mac_addr;\n+\n+\t/* Single process support */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\totx_epvf->eth_dev = eth_dev;\n+\totx_epvf->port_id = eth_dev->data->port_id;\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"otx_ep\", RTE_ETHER_ADDR_LEN, 0);\n+\tif (eth_dev->data->mac_addrs == NULL) {\n+\t\totx_ep_err(\"MAC addresses memory allocation failed\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\trte_eth_random_addr(vf_mac_addr.addr_bytes);\n+\trte_ether_addr_copy(&vf_mac_addr, eth_dev->data->mac_addrs);\n+\totx_epvf->hw_addr = pdev->mem_resource[0].addr;\n+\totx_epvf->pdev = pdev;\n+\n+\totx_epdev_init(otx_epvf);\n \n-\treturn -ENODEV;\n+\treturn 0;\n }\n \n static int\n@@ -43,6 +104,7 @@ otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)\n /* Set of PCI devices this driver supports */\n static const struct rte_pci_id pci_id_otx_ep_map[] = {\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_EP_NET_VF) },\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) },\n \t{ .vendor_id = 0, /* sentinel */ }\n };\n@@ -57,3 +119,6 @@ static struct rte_pci_driver rte_otx_ep_pmd = {\n RTE_PMD_REGISTER_PCI(net_otx_ep, rte_otx_ep_pmd);\n RTE_PMD_REGISTER_PCI_TABLE(net_otx_ep, pci_id_otx_ep_map);\n RTE_PMD_REGISTER_KMOD_DEP(net_otx_ep, \"* igb_uio | vfio-pci\");\n+RTE_LOG_REGISTER(otx_net_ep_logdbg, pmd.net.octeontx_ep, DEBUG);\n+RTE_LOG_REGISTER(otx_net_ep_logerr, pmd.net.octeontx_ep, ERR);\n+RTE_LOG_REGISTER(otx_net_ep_loginfo, pmd.net.octeontx_ep, INFO);\n",
    "prefixes": [
        "v6",
        "04/12"
    ]
}