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GET /api/patches/87485/?format=api
{ "id": 87485, "url": "https://patches.dpdk.org/api/patches/87485/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210128152220.214485-4-pnalla@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210128152220.214485-4-pnalla@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210128152220.214485-4-pnalla@marvell.com", "date": "2021-01-28T15:22:12", "name": "[v5,03/11] net/octeontx_ep: add device init and uninit", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "1364a42f41bc4a8ba22024e851388ca9b92bc438", "submitter": { "id": 2074, "url": "https://patches.dpdk.org/api/people/2074/?format=api", "name": "Pradeep Nalla", "email": "pnalla@marvell.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210128152220.214485-4-pnalla@marvell.com/mbox/", "series": [ { "id": 15005, "url": "https://patches.dpdk.org/api/series/15005/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=15005", "date": "2021-01-28T15:22:12", "name": null, "version": 5, "mbox": "https://patches.dpdk.org/series/15005/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/87485/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/87485/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4BBA1A09E4;\n\tThu, 28 Jan 2021 16:23:48 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 87D261889EA;\n\tThu, 28 Jan 2021 16:23:37 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 779B44067A\n for <dev@dpdk.org>; Thu, 28 Jan 2021 16:23:32 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 10SFKYt5014565; Thu, 28 Jan 2021 07:23:31 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 368j1ufcns-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 28 Jan 2021 07:23:31 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 28 Jan 2021 07:23:30 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 28 Jan 2021 07:23:29 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 28 Jan 2021 07:23:29 -0800", "from sburla-Super-Server.caveonetworks.com (unknown [10.106.27.196])\n by maili.marvell.com (Postfix) with ESMTP id 9783B3F703F;\n Thu, 28 Jan 2021 07:23:29 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=GaQhB0wwf0CZINCadfqJZL4KdI9+6QOaBV0KwW5uNV0=;\n b=W2GM2qM7bAbY9/5wOcGDE94WVMO0gCxD93KIKTcdtWgiTUok7FrJHoX9U4N7wWLSvoPX\n FB7fKxqtTegPpjg4MR8/rzTQB19ii4ID3MbWB1vKW0v+CxofX26FKoXmQehgm4kYdZGo\n VJPfxjMNRAcjYZmJDKMJJScHE2mcECdbwv5FQL7TLPSFO4luaQogteB9owMsVmvrB5vO\n OZPKeyx5ZXMtRD3uCqdOTCA6zaZFl80tcvjNKIy9vBNOnA04odsjIkK4XnjPZ8BnkRTB\n sonGPmeoPUFZ3AnqGg4TRLzc38rzsu2qbgxC8hXLaBh9OSQKnzzaunyLbW0ALiZx3xbl BQ==", "From": "Nalla Pradeep <pnalla@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n <ndabilpuram@marvell.com>, Nalla Pradeep <pnalla@marvell.com>, \"Radha Mohan\n Chintakuntla\" <radhac@marvell.com>, Veerasenareddy Burru\n <vburru@marvell.com>, Anatoly Burakov <anatoly.burakov@intel.com>", "CC": "<sburla@marvell.com>, <dev@dpdk.org>", "Date": "Thu, 28 Jan 2021 07:22:12 -0800", "Message-ID": "<20210128152220.214485-4-pnalla@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210118093602.5449-1-pnalla@marvell.com>", "References": "<20210118093602.5449-1-pnalla@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737\n definitions=2021-01-28_11:2021-01-28,\n 2021-01-28 signatures=0", "Subject": "[dpdk-dev] [PATCH v5 03/11] net/octeontx_ep: add device init and\n uninit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add basic init and uninit function which includes\ninitializing fields of ethdev private structure.\n\nSigned-off-by: Nalla Pradeep <pnalla@marvell.com>\n---\n drivers/common/octeontx2/otx2_common.h | 2 +-\n drivers/net/octeontx_ep/otx_ep_common.h | 19 ++++++-\n drivers/net/octeontx_ep/otx_ep_ethdev.c | 72 +++++++++++++++++++++++--\n 3 files changed, 86 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h\nindex 96021eda2..cd52e098e 100644\n--- a/drivers/common/octeontx2/otx2_common.h\n+++ b/drivers/common/octeontx2/otx2_common.h\n@@ -136,7 +136,7 @@ extern int otx2_logtype_ree;\n #define PCI_DEVID_OCTEONTX2_RVU_CPT_VF\t\t0xA0FE\n #define PCI_DEVID_OCTEONTX2_RVU_AF_VF\t\t0xA0f8\n #define PCI_DEVID_OCTEONTX2_DPI_VF\t\t0xA081\n-#define PCI_DEVID_OCTEONTX2_EP_VF\t\t0xB203 /* OCTEON TX2 EP mode */\n+#define PCI_DEVID_OCTEONTX2_EP_NET_VF\t\t0xB203 /* OCTEON TX2 EP mode */\n /* OCTEON TX2 98xx EP mode */\n #define PCI_DEVID_CN98XX_EP_NET_VF\t\t0xB103\n #define PCI_DEVID_OCTEONTX2_EP_RAW_VF\t\t0xB204 /* OCTEON TX2 EP mode */\ndiff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h\nindex 35ea99a79..0d6484c87 100644\n--- a/drivers/net/octeontx_ep/otx_ep_common.h\n+++ b/drivers/net/octeontx_ep/otx_ep_common.h\n@@ -4,11 +4,28 @@\n #ifndef _OTX_EP_COMMON_H_\n #define _OTX_EP_COMMON_H_\n \n+#define otx_ep_info(fmt, args...)\t\t\t\t\\\n+\tRTE_LOG(INFO, PMD, fmt \"\\n\", ## args)\n+\n+#define otx_ep_err(fmt, args...)\t\t\t\t\\\n+\tRTE_LOG(ERR, PMD, \"%s():%u \" fmt \"\\n\",\t\t\t\\\n+\t\t__func__, __LINE__, ## args)\n+\n+#define otx_ep_dbg(fmt, args...)\t\t\t\t\\\n+\trte_log(RTE_LOG_DEBUG, otx_net_ep_logtype,\t\t\\\n+\t\t\"%s():%u \" fmt \"\\n\",\t\t\t\t\\\n+\t\t__func__, __LINE__, ##args)\n+\n /* OTX_EP EP VF device data structure */\n struct otx_ep_device {\n \t/* PCI device pointer */\n \tstruct rte_pci_device *pdev;\n-\n+\tuint16_t chip_id;\n \tstruct rte_eth_dev *eth_dev;\n+\tint port_id;\n+\t/* Memory mapped h/w address */\n+\tuint8_t *hw_addr;\n };\n+\n+extern int otx_net_ep_logtype;\n #endif /* _OTX_EP_COMMON_H_ */\ndiff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c\nindex fc4356013..07cf07464 100644\n--- a/drivers/net/octeontx_ep/otx_ep_ethdev.c\n+++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c\n@@ -8,20 +8,81 @@\n #include \"otx_ep_common.h\"\n #include \"otx_ep_vf.h\"\n \n+#define OTX_EP_DEV(_eth_dev) ((_eth_dev)->data->dev_private)\n static int\n-otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)\n+otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)\n {\n-\tRTE_SET_USED(eth_dev);\n+\tstruct rte_pci_device *pdev = otx_epvf->pdev;\n+\tuint32_t dev_id = pdev->id.device_id;\n+\tint ret = 0;\n \n-\treturn -ENODEV;\n+\tswitch (dev_id) {\n+\tcase PCI_DEVID_OCTEONTX_EP_VF:\n+\t\totx_epvf->chip_id = dev_id;\n+\t\tbreak;\n+\tcase PCI_DEVID_OCTEONTX2_EP_NET_VF:\n+\tcase PCI_DEVID_CN98XX_EP_NET_VF:\n+\t\totx_epvf->chip_id = dev_id;\n+\t\tbreak;\n+\tdefault:\n+\t\totx_ep_err(\"Unsupported device\\n\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (!ret)\n+\t\totx_ep_info(\"OTX_EP dev_id[%d]\\n\", dev_id);\n+\n+\treturn ret;\n+}\n+\n+/* OTX_EP VF device initialization */\n+static int\n+otx_epdev_init(struct otx_ep_device *otx_epvf)\n+{\n+\tint ret = 0;\n+\n+\tret = otx_ep_chip_specific_setup(otx_epvf);\n+\tif (ret) {\n+\t\totx_ep_err(\"Chip specific setup failed\\n\");\n+\t\tgoto setup_fail;\n+\t}\n+\n+setup_fail:\n+\treturn ret;\n+}\n+\n+static int\n+otx_ep_eth_dev_uninit(__rte_unused struct rte_eth_dev *eth_dev)\n+{\n+\treturn 0;\n }\n \n static int\n otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)\n {\n-\tRTE_SET_USED(eth_dev);\n+\tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);\n+\tstruct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);\n+\tstruct rte_ether_addr vf_mac_addr;\n+\n+\t/* Single process support */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\totx_epvf->eth_dev = eth_dev;\n+\totx_epvf->port_id = eth_dev->data->port_id;\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"otx_ep\", RTE_ETHER_ADDR_LEN, 0);\n+\tif (eth_dev->data->mac_addrs == NULL) {\n+\t\totx_ep_err(\"MAC addresses memory allocation failed\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\trte_eth_random_addr(vf_mac_addr.addr_bytes);\n+\trte_ether_addr_copy(eth_dev->data->mac_addrs, &vf_mac_addr);\n+\totx_epvf->hw_addr = pdev->mem_resource[0].addr;\n+\totx_epvf->pdev = pdev;\n+\n+\totx_epdev_init(otx_epvf);\n \n-\treturn -ENODEV;\n+\treturn 0;\n }\n \n static int\n@@ -43,6 +104,7 @@ otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)\n /* Set of PCI devices this driver supports */\n static const struct rte_pci_id pci_id_otx_ep_map[] = {\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_EP_NET_VF) },\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) },\n \t{ .vendor_id = 0, /* sentinel */ }\n };\n", "prefixes": [ "v5", "03/11" ] }