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GET /api/patches/87378/?format=api
{ "id": 87378, "url": "https://patches.dpdk.org/api/patches/87378/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210126214000.57909-2-pnalla@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210126214000.57909-2-pnalla@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210126214000.57909-2-pnalla@marvell.com", "date": "2021-01-26T21:39:51", "name": "[v4,02/11] net/octeontx_ep: add ethdev probe and remove", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "1d69aa8c94d709586cf9833045fe92f748b76f25", "submitter": { "id": 2074, "url": "https://patches.dpdk.org/api/people/2074/?format=api", "name": "Pradeep Nalla", "email": "pnalla@marvell.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210126214000.57909-2-pnalla@marvell.com/mbox/", "series": [ { "id": 14964, "url": "https://patches.dpdk.org/api/series/14964/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14964", "date": "2021-01-26T21:39:51", "name": "[v4,01/11] net/octeontx_ep: add build and doc infrastructure", "version": 4, "mbox": "https://patches.dpdk.org/series/14964/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/87378/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/87378/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7D83DA052A;\n\tTue, 26 Jan 2021 22:41:14 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 61A0D140D12;\n\tTue, 26 Jan 2021 22:41:14 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 29FA3140CE8\n for <dev@dpdk.org>; Tue, 26 Jan 2021 22:41:11 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 10QLdtsd030340 for <dev@dpdk.org>; Tue, 26 Jan 2021 13:41:11 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 368m6uhem4-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 26 Jan 2021 13:41:11 -0800", "from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 26 Jan 2021 13:41:09 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 26 Jan 2021 13:41:08 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 26 Jan 2021 13:41:09 -0800", "from sburla-Super-Server.caveonetworks.com (unknown [10.106.27.196])\n by maili.marvell.com (Postfix) with ESMTP id BB6223F7043;\n Tue, 26 Jan 2021 13:41:08 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=Xq1bxuLjoQS698VKrAfPQZ0y3ujBWhsN9+55CIFPNrY=;\n b=NqRFKQ0gnXFkpDcdO8DTftDmHgAspxv5exopsyZGW+wbp5Ay1teXFhCz0Pz64dJN6U4B\n CwYCyGZQnNBi7CbYKolJtdzZoNwaKqSr6ZhHAQavCpJIo2HqzPL2lXPeC+0Afs9OS2Of\n idB3o1ZmvDez7Xq/u/vRNeGAqcE6jLhyPWRo8VA3Ew3tPgmiVBq5PzfQiM6M8uml/WOz\n xUJp1aEucXFbLGUwExUmutKcTBBEScT4XF6HcnwyOP0o6N0MDKz+1MIhzeO/BPcPdplF\n hrPNKxC6xkUJ3HgDP17TCHRKcgwbmQEi6uI1Lj4lVfaKUTrGMxV7YivhxBVNJl5N5K7l PA==", "From": "Nalla Pradeep <pnalla@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n <ndabilpuram@marvell.com>, Nalla Pradeep <pnalla@marvell.com>, \"Radha Mohan\n Chintakuntla\" <radhac@marvell.com>,\n Veerasenareddy Burru <vburru@marvell.com>", "CC": "<sburla@marvell.com>, <dev@dpdk.org>", "Date": "Tue, 26 Jan 2021 13:39:51 -0800", "Message-ID": "<20210126214000.57909-2-pnalla@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210126214000.57909-1-pnalla@marvell.com>", "References": "<20210126214000.57909-1-pnalla@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737\n definitions=2021-01-26_11:2021-01-26,\n 2021-01-26 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 02/11] net/octeontx_ep: add ethdev probe and\n remove", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "add basic PCIe ethdev probe and remove.\n\nSigned-off-by: Nalla Pradeep <pnalla@marvell.com>\n---\n drivers/common/octeontx2/otx2_common.h | 5 +-\n drivers/net/octeontx_ep/meson.build | 2 +\n drivers/net/octeontx_ep/otx_ep_common.h | 14 +++++\n drivers/net/octeontx_ep/otx_ep_ethdev.c | 62 +++++++++++++++++++++++\n drivers/net/octeontx_ep/otx_ep_vf.h | 9 ++++\n drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 6 +--\n 6 files changed, 94 insertions(+), 4 deletions(-)\n create mode 100644 drivers/net/octeontx_ep/otx_ep_common.h\n create mode 100644 drivers/net/octeontx_ep/otx_ep_vf.h", "diff": "diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h\nindex b6779f710..cd52e098e 100644\n--- a/drivers/common/octeontx2/otx2_common.h\n+++ b/drivers/common/octeontx2/otx2_common.h\n@@ -136,7 +136,10 @@ extern int otx2_logtype_ree;\n #define PCI_DEVID_OCTEONTX2_RVU_CPT_VF\t\t0xA0FE\n #define PCI_DEVID_OCTEONTX2_RVU_AF_VF\t\t0xA0f8\n #define PCI_DEVID_OCTEONTX2_DPI_VF\t\t0xA081\n-#define PCI_DEVID_OCTEONTX2_EP_VF\t\t0xB203 /* OCTEON TX2 EP mode */\n+#define PCI_DEVID_OCTEONTX2_EP_NET_VF\t\t0xB203 /* OCTEON TX2 EP mode */\n+/* OCTEON TX2 98xx EP mode */\n+#define PCI_DEVID_CN98XX_EP_NET_VF\t\t0xB103\n+#define PCI_DEVID_OCTEONTX2_EP_RAW_VF\t\t0xB204 /* OCTEON TX2 EP mode */\n #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF\t\t0xA0f6\n #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF\t\t0xA0f7\n #define PCI_DEVID_OCTEONTX2_RVU_REE_PF\t\t0xA0f4\ndiff --git a/drivers/net/octeontx_ep/meson.build b/drivers/net/octeontx_ep/meson.build\nindex 2ef2222d2..73e04b0be 100644\n--- a/drivers/net/octeontx_ep/meson.build\n+++ b/drivers/net/octeontx_ep/meson.build\n@@ -2,7 +2,9 @@\n # Copyright(C) 2021 Marvell.\n #\n \n+deps += ['common_octeontx2']\n sources = files(\n 'otx_ep_ethdev.c',\n )\n \n+includes += include_directories('../../common/octeontx2')\ndiff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h\nnew file mode 100644\nindex 000000000..35ea99a79\n--- /dev/null\n+++ b/drivers/net/octeontx_ep/otx_ep_common.h\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#ifndef _OTX_EP_COMMON_H_\n+#define _OTX_EP_COMMON_H_\n+\n+/* OTX_EP EP VF device data structure */\n+struct otx_ep_device {\n+\t/* PCI device pointer */\n+\tstruct rte_pci_device *pdev;\n+\n+\tstruct rte_eth_dev *eth_dev;\n+};\n+#endif /* _OTX_EP_COMMON_H_ */\ndiff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c\nindex 603023b0d..461474be1 100644\n--- a/drivers/net/octeontx_ep/otx_ep_ethdev.c\n+++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c\n@@ -1,3 +1,65 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n * Copyright(C) 2021 Marvell.\n */\n+\n+#include <rte_ethdev_pci.h>\n+#include <rte_malloc.h>\n+#include <rte_io.h>\n+\n+#include \"otx2_common.h\"\n+#include \"otx_ep_common.h\"\n+#include \"otx_ep_vf.h\"\n+\n+static int\n+otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)\n+{\n+\tRTE_SET_USED(eth_dev);\n+\n+\treturn -ENODEV;\n+}\n+\n+static int\n+otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)\n+{\n+\tRTE_SET_USED(eth_dev);\n+\n+\treturn -ENODEV;\n+}\n+\n+static int\n+otx_ep_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\t\t struct rte_pci_device *pci_dev)\n+{\n+\treturn rte_eth_dev_pci_generic_probe(pci_dev,\n+\t\t\t\t\t sizeof(struct otx_ep_device),\n+\t\t\t\t\t otx_ep_eth_dev_init);\n+}\n+\n+static int\n+otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\treturn rte_eth_dev_pci_generic_remove(pci_dev,\n+\t\t\t\t\t otx_ep_eth_dev_uninit);\n+}\n+\n+\n+/* Set of PCI devices this driver supports */\n+static const struct rte_pci_id pci_id_otx_ep_map[] = {\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_EP_NET_VF) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) },\n+\t{ .vendor_id = 0, /* sentinel */ }\n+};\n+\n+\n+\n+static struct rte_pci_driver rte_otx_ep_pmd = {\n+\t.id_table\t= pci_id_otx_ep_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t.probe\t\t= otx_ep_eth_dev_pci_probe,\n+\t.remove\t\t= otx_ep_eth_dev_pci_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(net_otx_ep, rte_otx_ep_pmd);\n+RTE_PMD_REGISTER_PCI_TABLE(net_otx_ep, pci_id_otx_ep_map);\n+RTE_PMD_REGISTER_KMOD_DEP(net_otx_ep, \"* igb_uio | vfio-pci\");\ndiff --git a/drivers/net/octeontx_ep/otx_ep_vf.h b/drivers/net/octeontx_ep/otx_ep_vf.h\nnew file mode 100644\nindex 000000000..e88b40971\n--- /dev/null\n+++ b/drivers/net/octeontx_ep/otx_ep_vf.h\n@@ -0,0 +1,9 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#ifndef _OTX_EP_VF_H_\n+#define _OTX_EP_VF_H_\n+\n+#define PCI_DEVID_OCTEONTX_EP_VF 0xa303\n+\n+#endif /*_OTX_EP_VF_H_ */\ndiff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c\nindex 2b78a7941..b2ccdda83 100644\n--- a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c\n+++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c\n@@ -22,7 +22,7 @@\n static const struct rte_pci_id pci_sdp_vf_map[] = {\n \t{\n \t\tRTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,\n-\t\t\t PCI_DEVID_OCTEONTX2_EP_VF)\n+\t\t\t PCI_DEVID_OCTEONTX2_EP_RAW_VF)\n \t},\n \t{\n \t\t.vendor_id = 0,\n@@ -109,8 +109,8 @@ sdp_chip_specific_setup(struct sdp_device *sdpvf)\n \tint ret;\n \n \tswitch (dev_id) {\n-\tcase PCI_DEVID_OCTEONTX2_EP_VF:\n-\t\tsdpvf->chip_id = PCI_DEVID_OCTEONTX2_EP_VF;\n+\tcase PCI_DEVID_OCTEONTX2_EP_RAW_VF:\n+\t\tsdpvf->chip_id = PCI_DEVID_OCTEONTX2_EP_RAW_VF;\n \t\tret = sdp_vf_setup_device(sdpvf);\n \n \t\tbreak;\n", "prefixes": [ "v4", "02/11" ] }