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{
    "id": 87137,
    "url": "https://patches.dpdk.org/api/patches/87137/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210122191925.24308-27-lironh@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210122191925.24308-27-lironh@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210122191925.24308-27-lironh@marvell.com",
    "date": "2021-01-22T19:19:14",
    "name": "[v2,26/37] net/mvpp2: introduce fixup for fifo overrun",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "7ba395305ce948d5c90659f870d4b24ccd172ad1",
    "submitter": {
        "id": 996,
        "url": "https://patches.dpdk.org/api/people/996/?format=api",
        "name": "Liron Himi",
        "email": "lironh@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210122191925.24308-27-lironh@marvell.com/mbox/",
    "series": [
        {
            "id": 14911,
            "url": "https://patches.dpdk.org/api/series/14911/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14911",
            "date": "2021-01-22T19:18:48",
            "name": "net/mvpp2: misc updates",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/14911/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/87137/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/87137/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        "From": "<lironh@marvell.com>",
        "To": "<jerinj@marvell.com>",
        "CC": "<dev@dpdk.org>, Liron Himi <lironh@marvell.com>",
        "Date": "Fri, 22 Jan 2021 21:19:14 +0200",
        "Message-ID": "<20210122191925.24308-27-lironh@marvell.com>",
        "X-Mailer": "git-send-email 2.28.0",
        "In-Reply-To": "<20210122191925.24308-1-lironh@marvell.com>",
        "References": "<20201202101212.4717-1-lironh@marvell.com>\n <20210122191925.24308-1-lironh@marvell.com>",
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        "Subject": "[dpdk-dev] [PATCH v2 26/37] net/mvpp2: introduce fixup for fifo\n overrun",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Liron Himi <lironh@marvell.com>\n\nCurrently the HW is configured with only one pool which its\nbuffer size may be larger than the rx-fifo-size.\nIn that situation, frame size larger than the fifo-size\nis gets dropped due to fifo overrun.\nthis is cause because the HW works in cut-through mode which\nwaits to have in the fifo at least the amount of bytes as define\nin the smallest pool's buffer size.\n\nThis patch add a dummy pool which its buffer size\nis very small (smaller than 64B frame). this tricks the HW and\nany frame size is gets passed from the FIFO to the PP2.\n\nSigned-off-by: Liron Himi <lironh@marvell.com>\n---\n drivers/net/mvpp2/mrvl_ethdev.c | 93 +++++++++++++++++++++++++++------\n drivers/net/mvpp2/mrvl_ethdev.h |  2 +\n drivers/net/mvpp2/mrvl_qos.c    |  1 +\n 3 files changed, 81 insertions(+), 15 deletions(-)",
    "diff": "diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c\nindex 12403666b..79e705497 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.c\n+++ b/drivers/net/mvpp2/mrvl_ethdev.c\n@@ -90,6 +90,8 @@ static int used_bpools[PP2_NUM_PKT_PROC] = {\n static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];\n static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];\n static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;\n+static int dummy_pool_id[PP2_NUM_PKT_PROC];\n+struct pp2_bpool *dummy_pool[PP2_NUM_PKT_PROC] = {0};\n \n struct mrvl_ifnames {\n \tconst char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];\n@@ -191,6 +193,52 @@ static struct {\n \n #define MRVL_NUM_XSTATS RTE_DIM(mrvl_xstats_tbl)\n \n+static inline int\n+mrvl_reserve_bit(int *bitmap, int max)\n+{\n+\tint n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);\n+\n+\tif (n >= max)\n+\t\treturn -1;\n+\n+\t*bitmap |= 1 << n;\n+\n+\treturn n;\n+}\n+\n+static int\n+mrvl_pp2_fixup_init(void)\n+{\n+\tstruct pp2_bpool_params bpool_params;\n+\tchar\t\t\tname[15];\n+\tint\t\t\terr, i;\n+\n+\tmemset(dummy_pool, 0, sizeof(dummy_pool));\n+\tfor (i = 0; i < pp2_get_num_inst(); i++) {\n+\t\tdummy_pool_id[i] = mrvl_reserve_bit(&used_bpools[i],\n+\t\t\t\t\t     PP2_BPOOL_NUM_POOLS);\n+\t\tif (dummy_pool_id[i] < 0) {\n+\t\t\tMRVL_LOG(ERR, \"Can't find free pool\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tmemset(name, 0, sizeof(name));\n+\t\tsnprintf(name, sizeof(name), \"pool-%d:%d\", i, dummy_pool_id[i]);\n+\t\tmemset(&bpool_params, 0, sizeof(bpool_params));\n+\t\tbpool_params.match = name;\n+\t\tbpool_params.buff_len = MRVL_PKT_OFFS;\n+\t\tbpool_params.dummy_short_pool = 1;\n+\t\terr = pp2_bpool_init(&bpool_params, &dummy_pool[i]);\n+\t\tif (err != 0 || !dummy_pool[i]) {\n+\t\t\tMRVL_LOG(ERR, \"BPool init failed!\\n\");\n+\t\t\tused_bpools[i] &= ~(1 << dummy_pool_id[i]);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n /**\n  * Initialize packet processor.\n  *\n@@ -200,7 +248,8 @@ static struct {\n static int\n mrvl_init_pp2(void)\n {\n-\tstruct pp2_init_params init_params;\n+\tstruct pp2_init_params\tinit_params;\n+\tint\t\t\terr;\n \n \tmemset(&init_params, 0, sizeof(init_params));\n \tinit_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;\n@@ -209,7 +258,32 @@ mrvl_init_pp2(void)\n \tif (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)\n \t\tmemcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,\n \t\t       sizeof(struct pp2_parse_udfs));\n-\treturn pp2_init(&init_params);\n+\terr = pp2_init(&init_params);\n+\tif (err != 0) {\n+\t\tMRVL_LOG(ERR, \"PP2 init failed\");\n+\t\treturn -1;\n+\t}\n+\n+\terr = mrvl_pp2_fixup_init();\n+\tif (err != 0) {\n+\t\tMRVL_LOG(ERR, \"PP2 fixup init failed\");\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void\n+mrvl_pp2_fixup_deinit(void)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < PP2_NUM_PKT_PROC; i++) {\n+\t\tif (!dummy_pool[i])\n+\t\t\tcontinue;\n+\t\tpp2_bpool_deinit(dummy_pool[i]);\n+\t\tused_bpools[i] &= ~(1 << dummy_pool_id[i]);\n+\t}\n }\n \n /**\n@@ -221,6 +295,8 @@ mrvl_init_pp2(void)\n static void\n mrvl_deinit_pp2(void)\n {\n+\tmrvl_pp2_fixup_deinit();\n+\n \tpp2_deinit();\n }\n \n@@ -261,19 +337,6 @@ mrvl_get_bpool_size(int pp2_id, int pool_id)\n \treturn size;\n }\n \n-static inline int\n-mrvl_reserve_bit(int *bitmap, int max)\n-{\n-\tint n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);\n-\n-\tif (n >= max)\n-\t\treturn -1;\n-\n-\t*bitmap |= 1 << n;\n-\n-\treturn n;\n-}\n-\n static int\n mrvl_init_hif(int core_id)\n {\ndiff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h\nindex 27d34ecfe..b0cdddd15 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.h\n+++ b/drivers/net/mvpp2/mrvl_ethdev.h\n@@ -196,6 +196,8 @@ extern int mrvl_logtype;\n \trte_log(RTE_LOG_ ## level, mrvl_logtype, \"%s(): \" fmt \"\\n\", \\\n \t\t__func__, ##args)\n \n+extern struct pp2_bpool *dummy_pool[PP2_NUM_PKT_PROC];\n+\n /**\n  * Convert string to uint32_t with extra checks for result correctness.\n  *\ndiff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c\nindex 310fd7384..a3add540b 100644\n--- a/drivers/net/mvpp2/mrvl_qos.c\n+++ b/drivers/net/mvpp2/mrvl_qos.c\n@@ -881,6 +881,7 @@ setup_tc(struct pp2_ppio_tc_params *param, uint8_t inqs,\n \n \tparam->pkt_offset = MRVL_PKT_OFFS;\n \tparam->pools[0][0] = bpool;\n+\tparam->pools[0][1] = dummy_pool[bpool->pp2_id];\n \tparam->default_color = color;\n \n \tinq_params = rte_zmalloc_socket(\"inq_params\",\n",
    "prefixes": [
        "v2",
        "26/37"
    ]
}