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GET /api/patches/87062/?format=api
{ "id": 87062, "url": "https://patches.dpdk.org/api/patches/87062/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210122094800.197748-6-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210122094800.197748-6-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210122094800.197748-6-jiawenwu@trustnetic.com", "date": "2021-01-22T09:47:45", "name": "[v1,05/20] net/txgbe: add interrupt operation for VF device", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "ed58a17ce86930a3cd6d24db0099478904f8ce35", "submitter": { "id": 1932, "url": "https://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210122094800.197748-6-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 14902, "url": "https://patches.dpdk.org/api/series/14902/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14902", "date": "2021-01-22T09:47:41", "name": "net/txgbe: add VF driver support", "version": 1, "mbox": "https://patches.dpdk.org/series/14902/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/87062/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/87062/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A397BA0A0A;\n\tFri, 22 Jan 2021 10:48:34 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 521E9140E51;\n\tFri, 22 Jan 2021 10:48:07 +0100 (CET)", "from smtpbgeu1.qq.com (smtpbgeu1.qq.com [52.59.177.22])\n by mails.dpdk.org (Postfix) with ESMTP id 2055E140E2F\n for <dev@dpdk.org>; Fri, 22 Jan 2021 10:48:03 +0100 (CET)", "from wxdbg.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Fri, 22 Jan 2021 17:47:59 +0800 (CST)" ], "X-QQ-mid": "bizesmtp9t1611308879tx5b1rq7i", "X-QQ-SSF": "01400000002000C0D000B00A0000000", "X-QQ-FEAT": "B5bQpidtJ8BSIRJQyxeTs73wmh7Ykf5ytMm04nHHje9V3pgBfzA4mp0pP517D\n wkrkr8fr26MGLSVAaZiW3hRF9Gp3MJMJEBJ6ROVRVRd8qQ9gjjXquURax2iXXFhivyBhpLf\n PQKW22svYLzgcTGxu3HbKiMLh94rMvtzUp0pc/Qq9lo4xk7a9ekccudQA7C1KPopsx+K7oU\n MjhUt8YC54HHoT95iItd7mTjJTFq2SSC0BDzxnBW/kKqCnKRPYaWeNKggkDLvDNdz7D0iB8\n cUmE5LO/ercEEKK1/6AlssrM68Xyzzu6GQF/+si+rtDTb2QlfS13NRB38Sl4WVuSZpHAaxn\n As22g+Y/Wfxs+wDZXBTnz/zGB4rNA==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Fri, 22 Jan 2021 17:47:45 +0800", "Message-Id": "<20210122094800.197748-6-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20210122094800.197748-1-jiawenwu@trustnetic.com>", "References": "<20210122094800.197748-1-jiawenwu@trustnetic.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign6", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v1 05/20] net/txgbe: add interrupt operation for\n VF device", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add VF device interrupt handler, support to enable and disable RX queue\ninterrupt, and configure misx interrupt.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe_vf.ini | 2 +\n drivers/net/txgbe/base/txgbe_mbx.h | 2 +\n drivers/net/txgbe/txgbe_ethdev_vf.c | 181 ++++++++++++++++++++++++++\n 3 files changed, 185 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/txgbe_vf.ini b/doc/guides/nics/features/txgbe_vf.ini\nindex 0553b2275..574287cc7 100644\n--- a/doc/guides/nics/features/txgbe_vf.ini\n+++ b/doc/guides/nics/features/txgbe_vf.ini\n@@ -4,6 +4,8 @@\n ; Refer to default.ini for the full list of available PMD features.\n ;\n [Features]\n+Rx interrupt = Y\n+CRC offload = P\n VLAN offload = P\n QinQ offload = P\n L3 checksum offload = P\ndiff --git a/drivers/net/txgbe/base/txgbe_mbx.h b/drivers/net/txgbe/base/txgbe_mbx.h\nindex ccf5d12f2..786a355f7 100644\n--- a/drivers/net/txgbe/base/txgbe_mbx.h\n+++ b/drivers/net/txgbe/base/txgbe_mbx.h\n@@ -81,6 +81,8 @@ enum txgbevf_xcast_modes {\n /* word in permanent address message with the current multicast type */\n #define TXGBE_VF_MC_TYPE_WORD\t\t3\n \n+#define TXGBE_PF_CONTROL_MSG\t\t0x0100 /* PF control message */\n+\n #define TXGBE_VF_MBX_INIT_TIMEOUT\t2000 /* number of retries on mailbox */\n #define TXGBE_VF_MBX_INIT_DELAY\t\t500 /* microseconds between retries */\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c\nindex bee2f4e7b..5e0297da7 100644\n--- a/drivers/net/txgbe/txgbe_ethdev_vf.c\n+++ b/drivers/net/txgbe/txgbe_ethdev_vf.c\n@@ -21,7 +21,9 @@ static int txgbevf_dev_info_get(struct rte_eth_dev *dev,\n static int txgbevf_dev_close(struct rte_eth_dev *dev);\n static void txgbevf_intr_disable(struct rte_eth_dev *dev);\n static void txgbevf_intr_enable(struct rte_eth_dev *dev);\n+static void txgbevf_configure_msix(struct rte_eth_dev *dev);\n static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);\n+static void txgbevf_dev_interrupt_handler(void *param);\n \n /*\n * The set of PCI devices this driver supports (for VF)\n@@ -99,6 +101,7 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \tint err;\n \tuint32_t tc, tcs;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);\n \tstruct rte_ether_addr *perm_addr =\n \t\t\t(struct rte_ether_addr *)hw->mac.perm_addr;\n@@ -218,6 +221,9 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \t\treturn -EIO;\n \t}\n \n+\trte_intr_callback_register(intr_handle,\n+\t\t\t\t txgbevf_dev_interrupt_handler, eth_dev);\n+\trte_intr_enable(intr_handle);\n \ttxgbevf_intr_enable(eth_dev);\n \n \tPMD_INIT_LOG(DEBUG, \"port %d vendorID=0x%x deviceID=0x%x mac.type=%s\",\n@@ -355,6 +361,8 @@ static int\n txgbevf_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \tPMD_INIT_FUNC_TRACE();\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n@@ -378,9 +386,118 @@ txgbevf_dev_close(struct rte_eth_dev *dev)\n \trte_free(dev->data->mac_addrs);\n \tdev->data->mac_addrs = NULL;\n \n+\trte_intr_disable(intr_handle);\n+\trte_intr_callback_unregister(intr_handle,\n+\t\t\t\t txgbevf_dev_interrupt_handler, dev);\n+\n \treturn 0;\n }\n \n+static int\n+txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n+{\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tuint32_t vec = TXGBE_MISC_VEC_ID;\n+\n+\tif (rte_intr_allow_others(intr_handle))\n+\t\tvec = TXGBE_RX_VEC_START;\n+\tintr->mask_misc &= ~(1 << vec);\n+\tRTE_SET_USED(queue_id);\n+\twr32(hw, TXGBE_VFIMC, ~intr->mask_misc);\n+\n+\trte_intr_enable(intr_handle);\n+\n+\treturn 0;\n+}\n+\n+static int\n+txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n+{\n+\tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tuint32_t vec = TXGBE_MISC_VEC_ID;\n+\n+\tif (rte_intr_allow_others(intr_handle))\n+\t\tvec = TXGBE_RX_VEC_START;\n+\tintr->mask_misc |= (1 << vec);\n+\tRTE_SET_USED(queue_id);\n+\twr32(hw, TXGBE_VFIMS, intr->mask_misc);\n+\n+\treturn 0;\n+}\n+\n+static void\n+txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction,\n+\t\t uint8_t queue, uint8_t msix_vector)\n+{\n+\tuint32_t tmp, idx;\n+\n+\tif (direction == -1) {\n+\t\t/* other causes */\n+\t\tmsix_vector |= TXGBE_VFIVAR_VLD;\n+\t\ttmp = rd32(hw, TXGBE_VFIVARMISC);\n+\t\ttmp &= ~0xFF;\n+\t\ttmp |= msix_vector;\n+\t\twr32(hw, TXGBE_VFIVARMISC, tmp);\n+\t} else {\n+\t\t/* rx or tx cause */\n+\t\t/* Workround for ICR lost */\n+\t\tidx = ((16 * (queue & 1)) + (8 * direction));\n+\t\ttmp = rd32(hw, TXGBE_VFIVAR(queue >> 1));\n+\t\ttmp &= ~(0xFF << idx);\n+\t\ttmp |= (msix_vector << idx);\n+\t\twr32(hw, TXGBE_VFIVAR(queue >> 1), tmp);\n+\t}\n+}\n+\n+static void\n+txgbevf_configure_msix(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tuint32_t q_idx;\n+\tuint32_t vector_idx = TXGBE_MISC_VEC_ID;\n+\tuint32_t base = TXGBE_MISC_VEC_ID;\n+\n+\t/* Configure VF other cause ivar */\n+\ttxgbevf_set_ivar_map(hw, -1, 1, vector_idx);\n+\n+\t/* won't configure msix register if no mapping is done\n+\t * between intr vector and event fd.\n+\t */\n+\tif (!rte_intr_dp_is_en(intr_handle))\n+\t\treturn;\n+\n+\tif (rte_intr_allow_others(intr_handle)) {\n+\t\tbase = TXGBE_RX_VEC_START;\n+\t\tvector_idx = TXGBE_RX_VEC_START;\n+\t}\n+\n+\t/* Configure all RX queues of VF */\n+\tfor (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) {\n+\t\t/* Force all queue use vector 0,\n+\t\t * as TXGBE_VF_MAXMSIVECOTR = 1\n+\t\t */\n+\t\ttxgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);\n+\t\tintr_handle->intr_vec[q_idx] = vector_idx;\n+\t\tif (vector_idx < base + intr_handle->nb_efd - 1)\n+\t\t\tvector_idx++;\n+\t}\n+\n+\t/* As RX queue setting above show, all queues use the vector 0.\n+\t * Set only the ITR value of TXGBE_MISC_VEC_ID.\n+\t */\n+\twr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID),\n+\t\tTXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT)\n+\t\t| TXGBE_ITR_WRDSA);\n+}\n+\n static int\n txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,\n \t\t __rte_unused uint32_t index,\n@@ -472,12 +589,76 @@ txgbevf_set_default_mac_addr(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static void txgbevf_mbx_process(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tu32 in_msg = 0;\n+\n+\t/* peek the message first */\n+\tin_msg = rd32(hw, TXGBE_VFMBX);\n+\n+\t/* PF reset VF event */\n+\tif (in_msg == TXGBE_PF_CONTROL_MSG) {\n+\t\t/* dummy mbx read to ack pf */\n+\t\tif (txgbe_read_mbx(hw, &in_msg, 1, 0))\n+\t\t\treturn;\n+\t\trte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,\n+\t\t\t\t\t NULL);\n+\t}\n+}\n+\n+static int\n+txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)\n+{\n+\tuint32_t eicr;\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n+\ttxgbevf_intr_disable(dev);\n+\n+\t/* read-on-clear nic registers here */\n+\teicr = rd32(hw, TXGBE_VFICR);\n+\tintr->flags = 0;\n+\n+\t/* only one misc vector supported - mailbox */\n+\teicr &= TXGBE_VFICR_MASK;\n+\t/* Workround for ICR lost */\n+\tintr->flags |= TXGBE_FLAG_MAILBOX;\n+\n+\treturn 0;\n+}\n+\n+static int\n+txgbevf_dev_interrupt_action(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n+\n+\tif (intr->flags & TXGBE_FLAG_MAILBOX) {\n+\t\ttxgbevf_mbx_process(dev);\n+\t\tintr->flags &= ~TXGBE_FLAG_MAILBOX;\n+\t}\n+\n+\ttxgbevf_intr_enable(dev);\n+\n+\treturn 0;\n+}\n+\n+static void\n+txgbevf_dev_interrupt_handler(void *param)\n+{\n+\tstruct rte_eth_dev *dev = (struct rte_eth_dev *)param;\n+\n+\ttxgbevf_dev_interrupt_get_status(dev);\n+\ttxgbevf_dev_interrupt_action(dev);\n+}\n+\n /*\n * dev_ops for virtual function, bare necessities for basic vf\n * operation have been implemented\n */\n static const struct eth_dev_ops txgbevf_eth_dev_ops = {\n \t.dev_infos_get = txgbevf_dev_info_get,\n+\t.rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable,\n+\t.rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable,\n \t.mac_addr_add = txgbevf_add_mac_addr,\n \t.mac_addr_remove = txgbevf_remove_mac_addr,\n \t.rxq_info_get = txgbe_rxq_info_get,\n", "prefixes": [ "v1", "05/20" ] }