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GET /api/patches/86969/?format=api
{ "id": 86969, "url": "https://patches.dpdk.org/api/patches/86969/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1611142175-409485-12-git-send-email-matan@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1611142175-409485-12-git-send-email-matan@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1611142175-409485-12-git-send-email-matan@nvidia.com", "date": "2021-01-20T11:29:35", "name": "[v3,11/11] compress/mlx5: add the supported capabilities", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "edfcb103f02dcf077f5e49795c4cfea6a1f27752", "submitter": { "id": 1911, "url": "https://patches.dpdk.org/api/people/1911/?format=api", "name": "Matan Azrad", "email": "matan@nvidia.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1611142175-409485-12-git-send-email-matan@nvidia.com/mbox/", "series": [ { "id": 14865, "url": "https://patches.dpdk.org/api/series/14865/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14865", "date": "2021-01-20T11:29:24", "name": "add mlx5 compress PMD", "version": 3, "mbox": "https://patches.dpdk.org/series/14865/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/86969/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/86969/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 00F4AA0A05;\n\tWed, 20 Jan 2021 12:35:11 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7910C140CF9;\n\tWed, 20 Jan 2021 12:35:09 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by mails.dpdk.org (Postfix) with ESMTP id 03E93140CF8\n for <dev@dpdk.org>; Wed, 20 Jan 2021 12:35:07 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n matan@nvidia.com) with SMTP; 20 Jan 2021 13:35:05 +0200", "from pegasus25.mtr.labs.mlnx. (pegasus25.mtr.labs.mlnx\n [10.210.16.10])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 10KBTfXI001381;\n Wed, 20 Jan 2021 13:35:05 +0200" ], "From": "Matan Azrad <matan@nvidia.com>", "To": "dev@dpdk.org", "Cc": "Thomas Monjalon <thomas@monjalon.net>,\n Ashish Gupta <ashish.gupta@marvell.com>,\n Fiona Trahe <fiona.trahe@intel.com>, akhil.goyal@nxp.com", "Date": "Wed, 20 Jan 2021 11:29:35 +0000", "Message-Id": "<1611142175-409485-12-git-send-email-matan@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1611142175-409485-1-git-send-email-matan@nvidia.com>", "References": "<1610554690-411627-1-git-send-email-matan@nvidia.com>\n <1611142175-409485-1-git-send-email-matan@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v3 11/11] compress/mlx5: add the supported\n capabilities", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add all the capabilities supported by the device.\n\nAdd the driver documentations.\n\nSigned-off-by: Matan Azrad <matan@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n doc/guides/compressdevs/features/mlx5.ini | 13 +++++\n doc/guides/compressdevs/index.rst | 1 +\n doc/guides/compressdevs/mlx5.rst | 94 +++++++++++++++++++++++++++++++\n doc/guides/rel_notes/release_21_02.rst | 6 ++\n drivers/compress/mlx5/mlx5_compress.c | 24 +++++++-\n 5 files changed, 136 insertions(+), 2 deletions(-)\n create mode 100644 doc/guides/compressdevs/features/mlx5.ini\n create mode 100644 doc/guides/compressdevs/mlx5.rst", "diff": "diff --git a/doc/guides/compressdevs/features/mlx5.ini b/doc/guides/compressdevs/features/mlx5.ini\nnew file mode 100644\nindex 0000000..891ce47\n--- /dev/null\n+++ b/doc/guides/compressdevs/features/mlx5.ini\n@@ -0,0 +1,13 @@\n+;\n+; Refer to default.ini for the full list of available PMD features.\n+;\n+; Supported features of 'MLX5' compression driver.\n+;\n+[Features]\n+HW Accelerated = Y\n+Deflate = Y\n+Adler32 = Y\n+Crc32 = Y\n+Adler32&Crc32 = Y\n+Fixed = Y\n+Dynamic = Y\ndiff --git a/doc/guides/compressdevs/index.rst b/doc/guides/compressdevs/index.rst\nindex 1f37e26..54a3ef4 100644\n--- a/doc/guides/compressdevs/index.rst\n+++ b/doc/guides/compressdevs/index.rst\n@@ -11,6 +11,7 @@ Compression Device Drivers\n \n overview\n isal\n+ mlx5\n octeontx\n qat_comp\n zlib\ndiff --git a/doc/guides/compressdevs/mlx5.rst b/doc/guides/compressdevs/mlx5.rst\nnew file mode 100644\nindex 0000000..c5433e9\n--- /dev/null\n+++ b/doc/guides/compressdevs/mlx5.rst\n@@ -0,0 +1,94 @@\n+.. SPDX-License-Identifier: BSD-3-Clause\n+ Copyright 2021 Mellanox Technologies, Ltd\n+\n+.. include:: <isonum.txt>\n+\n+MLX5 compress driver\n+====================\n+\n+The MLX5 compress driver library\n+(**librte_compress_mlx5**) provides support for **Mellanox BlueField 2**\n+families of 25/50/100/200 Gb/s adapters.\n+\n+Design\n+------\n+\n+This PMD is configuring the compress, decompress amd DMA engines.\n+\n+GGAs (Generic Global Accelerators) are offload engines that can be used\n+to do memory to memory tasks on data.\n+These engines are part of the ARM complex of the BlueField chip, and as\n+such they do not use NIC related resources (e.g. RX/TX bandwidth).\n+They do share the same PCI and memory bandwidth.\n+\n+So, using the BlueField device (starting from BlueField 2), the compress\n+class operations can be supported in parallel to the net, vDPA and\n+RegEx class operations.\n+\n+For security reasons and robustness, this driver only deals with virtual\n+memory addresses. The way resources allocations are handled by the kernel,\n+combined with hardware specifications that allow to handle virtual memory\n+addresses directly, ensure that DPDK applications cannot access random\n+physical memory (or memory that does not belong to the current process).\n+\n+The PMD uses libibverbs and libmlx5 to access the device firmware\n+or directly the hardware components.\n+There are different levels of objects and bypassing abilities\n+to get the best performances:\n+\n+- Verbs is a complete high-level generic API.\n+- Direct Verbs is a device-specific API.\n+- DevX allows to access firmware objects.\n+\n+Enabling librte_compress_mlx5 causes DPDK applications to be linked against\n+libibverbs.\n+\n+Mellanox mlx5 pci device can be probed by number of different pci devices,\n+for example net / vDPA / RegEx. To select the compress PMD ``class=compress``\n+should be specified as device parameter. The compress device can be probed and\n+used with other Mellanox classes, by adding more options in the class.\n+For example: ``class=net:compress`` will probe both the net PMD and the compress\n+PMD.\n+\n+Features\n+--------\n+\n+Compress mlx5 PMD has support for:\n+\n+Compression/Decompression algorithm:\n+\n+* DEFLATE.\n+\n+NULL algorithm for DMA operations.\n+\n+Huffman code type:\n+\n+* FIXED.\n+* DYNAMIC.\n+\n+Window size support:\n+\n+1KB, 2KB, 4KB, 8KB, 16KB and 32KB.\n+\n+Shareable transformation.\n+\n+Checksum generation:\n+\n+* CRC32, Adler32 and combined checksum.\n+\n+Limitations\n+-----------\n+\n+* Scatter-Gather, SHA and Stateful are not supported.\n+* Non-compressed block is not supported in compress (supported in decompress).\n+\n+Supported NICs\n+--------------\n+\n+* Mellanox\\ |reg| BlueField 2 SmartNIC\n+\n+Prerequisites\n+-------------\n+\n+- Mellanox OFED version: **5.2**\n+ see :doc:`../../nics/mlx5` guide for more Mellanox OFED details.\ndiff --git a/doc/guides/rel_notes/release_21_02.rst b/doc/guides/rel_notes/release_21_02.rst\nindex ae36b6a..3550f4e 100644\n--- a/doc/guides/rel_notes/release_21_02.rst\n+++ b/doc/guides/rel_notes/release_21_02.rst\n@@ -51,6 +51,12 @@ New Features\n * Other libs\n * Apps, Examples, Tools (if significant)\n \n+* **Added mlx5 compress PMD.**\n+\n+ Added a new compress PMD driver for Bluefield 2 adapters.\n+\n+ See the :doc:`../compressdevs/mlx5` for more details.\n+\n This section is a comment. Do not overwrite or remove it.\n Also, make sure to start the actual text at the margin.\n =======================================================\ndiff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c\nindex f7ef913..a274366 100644\n--- a/drivers/compress/mlx5/mlx5_compress.c\n+++ b/drivers/compress/mlx5/mlx5_compress.c\n@@ -77,8 +77,28 @@ struct mlx5_compress_qp {\n \n int mlx5_compress_logtype;\n \n-const struct rte_compressdev_capabilities mlx5_caps[RTE_COMP_ALGO_LIST_END];\n-\n+static const struct rte_compressdev_capabilities mlx5_caps[] = {\n+\t{\n+\t\t.algo = RTE_COMP_ALGO_NULL,\n+\t\t.comp_feature_flags = RTE_COMP_FF_ADLER32_CHECKSUM |\n+\t\t\t\t RTE_COMP_FF_CRC32_CHECKSUM |\n+\t\t\t\t RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |\n+\t\t\t\t RTE_COMP_FF_SHAREABLE_PRIV_XFORM,\n+\t},\n+\t{\n+\t\t.algo = RTE_COMP_ALGO_DEFLATE,\n+\t\t.comp_feature_flags = RTE_COMP_FF_ADLER32_CHECKSUM |\n+\t\t\t\t RTE_COMP_FF_CRC32_CHECKSUM |\n+\t\t\t\t RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |\n+\t\t\t\t RTE_COMP_FF_SHAREABLE_PRIV_XFORM |\n+\t\t\t\t RTE_COMP_FF_HUFFMAN_FIXED |\n+\t\t\t\t RTE_COMP_FF_HUFFMAN_DYNAMIC,\n+\t\t.window_size = {.min = 10, .max = 15, .increment = 1},\n+\t},\n+\t{\n+\t\t.algo = RTE_COMP_ALGO_LIST_END,\n+\t}\n+};\n \n static void\n mlx5_compress_dev_info_get(struct rte_compressdev *dev,\n", "prefixes": [ "v3", "11/11" ] }