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GET /api/patches/86852/?format=api
{ "id": 86852, "url": "https://patches.dpdk.org/api/patches/86852/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210119052551.21204-1-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210119052551.21204-1-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210119052551.21204-1-alvinx.zhang@intel.com", "date": "2021-01-19T05:25:51", "name": "[v7] net/ixgbe: fix configuration of max frame size", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a6129fc09ff6d6460cb060bc9b6421222436394c", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210119052551.21204-1-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 14831, "url": "https://patches.dpdk.org/api/series/14831/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14831", "date": "2021-01-19T05:25:51", "name": "[v7] net/ixgbe: fix configuration of max frame size", "version": 7, "mbox": "https://patches.dpdk.org/series/14831/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/86852/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/86852/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B0000A0A03;\n\tTue, 19 Jan 2021 06:26:12 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2C4D2140D1C;\n\tTue, 19 Jan 2021 06:26:12 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 16018140D1B;\n Tue, 19 Jan 2021 06:26:09 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Jan 2021 21:26:00 -0800", "from shwdenpg235.ccr.corp.intel.com ([10.240.182.60])\n by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Jan 2021 21:25:58 -0800" ], "IronPort-SDR": [ "\n dGRRRqoU1/jOgiiei0nGh61juRqdNOTPWnnlTAglUXgAtozXAPmnxaedrDOYzDSV0HeZ/FB06M\n m3c8xDn8NwDQ==", "\n 0+9Bb+BiNWuC4lh9d5lyUan/1ut46VFKL5+fcoKCmXUD7uCf86Yln0nXRd5kqX+gwvCwRv+PPx\n TEanaMiBfqvQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9868\"; a=\"197581634\"", "E=Sophos;i=\"5.79,357,1602572400\"; d=\"scan'208\";a=\"197581634\"", "E=Sophos;i=\"5.79,357,1602572400\"; d=\"scan'208\";a=\"402248454\"" ], "From": "\"Zhang,Alvin\" <alvinx.zhang@intel.com>", "To": "qi.z.zhang@intel.com", "Cc": "dev@dpdk.org,\n\tAlvin Zhang <alvinx.zhang@intel.com>,\n\tstable@dpdk.org", "Date": "Tue, 19 Jan 2021 13:25:51 +0800", "Message-Id": "<20210119052551.21204-1-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 2.21.0.windows.1", "In-Reply-To": "<20210118083507.13544-1-alvinx.zhang@intel.com>", "References": "<20210118083507.13544-1-alvinx.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v7] net/ixgbe: fix configuration of max frame size", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\nFor some types of NIC, jumbo frame is not supported in IOV mode,\nso if a VF requests to configure the frame size to not bigger\nthan IXGBE_ETH_MAX_LEN, the kernel driver returns 0, but the DPDK\nixgbe PMD returens -1, this will cause the VF to fail to start\nwhen the PF driven by DPDK ixgbe PMD.\n\nThis patch keeps ixgbe PMD's handling mode consistent with kernel\ndriver in above situation.\n\nIn addition, the value set by the command IXGBE_VF_SET_LPE\nrepresents the max frame size, not the mtu.\n\nFixes: 1b9ea09c067b (\"ixgbe: support X550\")\nFixes: 95a27b3ba5f5 (\"net/ixgbe: enable jumbo frame for VF\")\nCc: stable@dpdk.org\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n---\n\nV3: Restore variable name from cur_frame_size to max_frs.\nV4: Update git log and add notes.\nV5: Add check for VF api version.\nV6: Update notes.\nV7: Fixed apply conflict issue.\n---\n drivers/net/ixgbe/ixgbe_pf.c | 43 +++++++++++++++++++++++++++++++++++--------\n 1 file changed, 35 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/ixgbe_pf.c b/drivers/net/ixgbe/ixgbe_pf.c\nindex 89698e8..15982af 100644\n--- a/drivers/net/ixgbe/ixgbe_pf.c\n+++ b/drivers/net/ixgbe/ixgbe_pf.c\n@@ -552,20 +552,47 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)\n }\n \n static int\n-ixgbe_set_vf_lpe(struct rte_eth_dev *dev, __rte_unused uint32_t vf, uint32_t *msgbuf)\n+ixgbe_set_vf_lpe(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf)\n {\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tuint32_t new_mtu = msgbuf[1];\n+\tuint32_t max_frame = msgbuf[1];\n \tuint32_t max_frs;\n \tuint32_t hlreg0;\n-\tint max_frame = new_mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;\n \n \t/* X540 and X550 support jumbo frames in IOV mode */\n \tif (hw->mac.type != ixgbe_mac_X540 &&\n \t\thw->mac.type != ixgbe_mac_X550 &&\n \t\thw->mac.type != ixgbe_mac_X550EM_x &&\n-\t\thw->mac.type != ixgbe_mac_X550EM_a)\n-\t\treturn -1;\n+\t\thw->mac.type != ixgbe_mac_X550EM_a) {\n+\t\tstruct ixgbe_vf_info *vfinfo =\n+\t\t\t*IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private);\n+\n+\t\tswitch (vfinfo[vf].api_version) {\n+\t\tcase ixgbe_mbox_api_11:\n+\t\tcase ixgbe_mbox_api_12:\n+\t\tcase ixgbe_mbox_api_13:\n+\t\t\t /**\n+\t\t\t * Version 1.1&1.2&1.3 supports jumbo frames on VFs\n+\t\t\t * if PF has jumbo frames enabled which means legacy\n+\t\t\t * VFs are disabled.\n+\t\t\t */\n+\t\t\tif (dev->data->dev_conf.rxmode.max_rx_pkt_len >\n+\t\t\t IXGBE_ETH_MAX_LEN)\n+\t\t\t\tbreak;\n+\t\t\t/* fall through */\n+\t\tdefault:\n+\t\t\t/**\n+\t\t\t * If the PF or VF are running w/ jumbo frames enabled,\n+\t\t\t * we return -1 as we cannot support jumbo frames on\n+\t\t\t * legacy VFs.\n+\t\t\t */\n+\t\t\tif (max_frame > IXGBE_ETH_MAX_LEN ||\n+\t\t\t dev->data->dev_conf.rxmode.max_rx_pkt_len >\n+\t\t\t IXGBE_ETH_MAX_LEN)\n+\t\t\t\treturn -1;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n \n \tif (max_frame < RTE_ETHER_MIN_LEN ||\n \t\t\tmax_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN)\n@@ -573,9 +600,9 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)\n \n \tmax_frs = (IXGBE_READ_REG(hw, IXGBE_MAXFRS) &\n \t\t IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT;\n-\tif (max_frs < new_mtu) {\n+\tif (max_frs < max_frame) {\n \t\thlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);\n-\t\tif (new_mtu > IXGBE_ETH_MAX_LEN) {\n+\t\tif (max_frame > IXGBE_ETH_MAX_LEN) {\n \t\t\tdev->data->dev_conf.rxmode.offloads |=\n \t\t\t\tDEV_RX_OFFLOAD_JUMBO_FRAME;\n \t\t\thlreg0 |= IXGBE_HLREG0_JUMBOEN;\n@@ -586,7 +613,7 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)\n \t\t}\n \t\tIXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);\n \n-\t\tmax_frs = new_mtu << IXGBE_MHADD_MFS_SHIFT;\n+\t\tmax_frs = max_frame << IXGBE_MHADD_MFS_SHIFT;\n \t\tIXGBE_WRITE_REG(hw, IXGBE_MAXFRS, max_frs);\n \t}\n \n", "prefixes": [ "v7" ] }