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GET /api/patches/86752/?format=api
{ "id": 86752, "url": "https://patches.dpdk.org/api/patches/86752/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210118070428.36998-12-stevex.yang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210118070428.36998-12-stevex.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210118070428.36998-12-stevex.yang@intel.com", "date": "2021-01-18T07:04:17", "name": "[v4,11/22] net/octeontx: fix the jumbo frame flag condition for mtu set", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0b0aa4259156066675a2d04a368e2eb09bf75d34", "submitter": { "id": 1883, "url": "https://patches.dpdk.org/api/people/1883/?format=api", "name": "Steve Yang", "email": "stevex.yang@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210118070428.36998-12-stevex.yang@intel.com/mbox/", "series": [ { "id": 14800, "url": "https://patches.dpdk.org/api/series/14800/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14800", "date": "2021-01-18T07:04:06", "name": "fix rx packets dropped issue", "version": 4, "mbox": "https://patches.dpdk.org/series/14800/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/86752/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/86752/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CE166A0A03;\n\tMon, 18 Jan 2021 08:09:30 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8E2A3140DA0;\n\tMon, 18 Jan 2021 08:08:34 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id AFBBD140DA0\n for <dev@dpdk.org>; Mon, 18 Jan 2021 08:08:32 +0100 (CET)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Jan 2021 23:08:32 -0800", "from intel-npg-odc-srv01.cd.intel.com ([10.240.178.136])\n by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Jan 2021 23:08:30 -0800" ], "IronPort-SDR": [ "\n WPnqD2okS4HYOWpEyUOhxhGGnytoHlKK/WC6V3yh69Xd2qxaOYWjLkHLpBrxle/90MNKQ7L7Bc\n pwqiDFCj7SzA==", "\n LXUpYk0NR77Yf5AgaWaDs1y1lY5kXi75eUfQ/49mnJudiSBCLFGoQKnb/LZncCK2tIxcMnVADs\n W1y8qUrqBjzw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9867\"; a=\"197460195\"", "E=Sophos;i=\"5.79,355,1602572400\"; d=\"scan'208\";a=\"197460195\"", "E=Sophos;i=\"5.79,355,1602572400\"; d=\"scan'208\";a=\"355086884\"" ], "From": "Steve Yang <stevex.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "Steve Yang <stevex.yang@intel.com>,\n\tHarman Kalra <hkalra@marvell.com>", "Date": "Mon, 18 Jan 2021 07:04:17 +0000", "Message-Id": "<20210118070428.36998-12-stevex.yang@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210118070428.36998-1-stevex.yang@intel.com>", "References": "<20210114094537.13661-1-stevex.yang@intel.com>\n <20210118070428.36998-1-stevex.yang@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 11/22] net/octeontx: fix the jumbo frame flag\n condition for mtu set", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The jumbo frame uses the 'RTE_ETHER_MAX_LEN' as boundary condition,\nbut the Ether overhead is larger than 18 when it supports dual VLAN tags.\nThat will cause the jumbo flag rx offload is wrong when MTU size is\n'RTE_ETHER_MTU'.\n\nThis fix will change the boundary condition with 'RTE_ETHER_MTU' and\noverhead, that perhaps impacts the cases of the jumbo frame related.\n\nFixes: 3151e6a687a3 (\"net/octeontx: support MTU\")\n\nCc: Harman Kalra <hkalra@marvell.com>\n\nAcked-by: Harman Kalra <hkalra@marvell.com>\n\nSigned-off-by: Steve Yang <stevex.yang@intel.com>\n---\n drivers/net/octeontx/octeontx_ethdev.c | 2 +-\n drivers/net/octeontx/octeontx_ethdev.h | 1 +\n 2 files changed, 2 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/octeontx/octeontx_ethdev.c b/drivers/net/octeontx/octeontx_ethdev.c\nindex 3ee7b043fd..81779885d5 100644\n--- a/drivers/net/octeontx/octeontx_ethdev.c\n+++ b/drivers/net/octeontx/octeontx_ethdev.c\n@@ -552,7 +552,7 @@ octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)\n \tif (rc)\n \t\treturn rc;\n \n-\tif (frame_size > RTE_ETHER_MAX_LEN)\n+\tif (frame_size > OCCTX_L2_MAX_LEN)\n \t\tnic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;\n \telse\n \t\tnic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;\ndiff --git a/drivers/net/octeontx/octeontx_ethdev.h b/drivers/net/octeontx/octeontx_ethdev.h\nindex 7246fb6d1d..780a094ffa 100644\n--- a/drivers/net/octeontx/octeontx_ethdev.h\n+++ b/drivers/net/octeontx/octeontx_ethdev.h\n@@ -44,6 +44,7 @@\n /* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */\n #define OCCTX_L2_OVERHEAD\t(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \\\n \t\t\t\t OCCTX_MAX_VTAG_ACT_SIZE)\n+#define OCCTX_L2_MAX_LEN\t(RTE_ETHER_MTU + OCCTX_L2_OVERHEAD)\n \n /* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */\n #define OCCTX_MAX_FRS\t\\\n", "prefixes": [ "v4", "11/22" ] }