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GET /api/patches/8647/?format=api
https://patches.dpdk.org/api/patches/8647/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446626740-28824-3-git-send-email-cunming.liang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1446626740-28824-3-git-send-email-cunming.liang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1446626740-28824-3-git-send-email-cunming.liang@intel.com", "date": "2015-11-04T08:45:29", "name": "[dpdk-dev,v4,02/13] ixgbe: reserve intr vector zero for misc cause", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "50df210de47ef04c691a312885652efeb13240dd", "submitter": { "id": 46, "url": "https://patches.dpdk.org/api/people/46/?format=api", "name": "Cunming Liang", "email": "cunming.liang@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446626740-28824-3-git-send-email-cunming.liang@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/8647/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/8647/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 6F96491B3;\n\tWed, 4 Nov 2015 09:45:56 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 7447B91AC\n\tfor <dev@dpdk.org>; Wed, 4 Nov 2015 09:45:54 +0100 (CET)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga101.fm.intel.com with ESMTP; 04 Nov 2015 00:45:54 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 04 Nov 2015 00:45:55 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id tA48jo4Y004397;\n\tWed, 4 Nov 2015 16:45:50 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid tA48jkOS028889; Wed, 4 Nov 2015 16:45:48 +0800", "(from cliang18@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tA48jkvb028885; \n\tWed, 4 Nov 2015 16:45:46 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,242,1444719600\"; d=\"scan'208\";a=\"826650299\"", "From": "Cunming Liang <cunming.liang@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 4 Nov 2015 16:45:29 +0800", "Message-Id": "<1446626740-28824-3-git-send-email-cunming.liang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1446626740-28824-1-git-send-email-cunming.liang@intel.com>", "References": "<1446617263-7448-1-git-send-email-cunming.liang@intel.com>\n\t<1446626740-28824-1-git-send-email-cunming.liang@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 02/13] ixgbe: reserve intr vector zero for\n\tmisc cause", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "According to the VFIO interrupt mapping, the interrupt vector id for rxq starts from RX_VEC_START.\nIt doesn't impact the UIO cases.\n\nv3 changes:\n - macro renaming according to the EAL change\n\nSigned-off-by: Cunming Liang <cunming.liang@intel.com>\n---\n drivers/net/ixgbe/ixgbe_ethdev.c | 22 ++++++++++++++--------\n drivers/net/ixgbe/ixgbe_ethdev.h | 3 +++\n 2 files changed, 17 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex 25966ef..153ba98 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -4478,7 +4478,8 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n \tmask = IXGBE_READ_REG(hw, IXGBE_VTEIMS);\n-\tmask |= (1 << queue_id);\n+\tmask |= (1 << IXGBE_MISC_VEC_ID);\n+\tRTE_SET_USED(queue_id);\n \tIXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);\n \n \trte_intr_enable(&dev->pci_dev->intr_handle);\n@@ -4494,7 +4495,8 @@ ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n \tmask = IXGBE_READ_REG(hw, IXGBE_VTEIMS);\n-\tmask &= ~(1 << queue_id);\n+\tmask &= ~(1 << IXGBE_MISC_VEC_ID);\n+\tRTE_SET_USED(queue_id);\n \tIXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);\n \n \treturn 0;\n@@ -4630,7 +4632,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev)\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t q_idx;\n-\tuint32_t vector_idx = 0;\n+\tuint32_t vector_idx = IXGBE_MISC_VEC_ID;\n \n \t/* won't configure msix register if no mapping is done\n \t * between intr vector and event fd.\n@@ -4662,7 +4664,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)\n \tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tuint32_t queue_id, vec = 0;\n+\tuint32_t queue_id, base = IXGBE_MISC_VEC_ID;\n+\tuint32_t vec = IXGBE_MISC_VEC_ID;\n \tuint32_t mask;\n \tuint32_t gpie;\n \n@@ -4672,6 +4675,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)\n \tif (!rte_intr_dp_is_en(intr_handle))\n \t\treturn;\n \n+\tif (rte_intr_allow_others(intr_handle))\n+\t\tvec = base = IXGBE_RX_VEC_START;\n+\n \t/* setup GPIE for MSI-x mode */\n \tgpie = IXGBE_READ_REG(hw, IXGBE_GPIE);\n \tgpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |\n@@ -4695,23 +4701,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)\n \t\t/* by default, 1:1 mapping */\n \t\tixgbe_set_ivar_map(hw, 0, queue_id, vec);\n \t\tintr_handle->intr_vec[queue_id] = vec;\n-\t\tif (vec < intr_handle->nb_efd - 1)\n+\t\tif (vec < base + intr_handle->nb_efd - 1)\n \t\t\tvec++;\n \t}\n \n \tswitch (hw->mac.type) {\n \tcase ixgbe_mac_82598EB:\n \t\tixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,\n-\t\t\t\t intr_handle->max_intr - 1);\n+\t\t\t\t IXGBE_MISC_VEC_ID);\n \t\tbreak;\n \tcase ixgbe_mac_82599EB:\n \tcase ixgbe_mac_X540:\n-\t\tixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1);\n+\t\tixgbe_set_ivar_map(hw, -1, 1, IXGBE_MISC_VEC_ID);\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n \t}\n-\tIXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id),\n+\tIXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID),\n \t\t\tIXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);\n \n \t/* set up to autoclear timer, and the vectors */\ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h\nindex 569d678..1856c42 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.h\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.h\n@@ -123,6 +123,9 @@\n #define IXGBE_VF_IRQ_ENABLE_MASK 3 /* vf irq enable mask */\n #define IXGBE_VF_MAXMSIVECTOR 1\n \n+#define IXGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET\n+#define IXGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET\n+\n /*\n * Information about the fdir mode.\n */\n", "prefixes": [ "dpdk-dev", "v4", "02/13" ] }{ "id": 8647, "url": "