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Update a patch.

put:
Update a patch.

GET /api/patches/86153/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 86153,
    "url": "https://patches.dpdk.org/api/patches/86153/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210108043508.301227-8-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210108043508.301227-8-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210108043508.301227-8-qi.z.zhang@intel.com",
    "date": "2021-01-08T04:35:06",
    "name": "[7/9] net/ice/base: cleanup style issues",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "87704fc5d039b5c6218a6074c9805e59c257ecec",
    "submitter": {
        "id": 504,
        "url": "https://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210108043508.301227-8-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 14588,
            "url": "https://patches.dpdk.org/api/series/14588/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14588",
            "date": "2021-01-08T04:34:59",
            "name": "ice base update batch 2",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/14588/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/86153/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/86153/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C63B9A0524;\n\tFri,  8 Jan 2021 05:32:20 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3E0AC140E10;\n\tFri,  8 Jan 2021 05:31:33 +0100 (CET)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 3D6B8140DFD\n for <dev@dpdk.org>; Fri,  8 Jan 2021 05:31:31 +0100 (CET)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Jan 2021 20:31:30 -0800",
            "from dpdk51.sh.intel.com ([10.67.111.142])\n by fmsmga002.fm.intel.com with ESMTP; 07 Jan 2021 20:31:29 -0800"
        ],
        "IronPort-SDR": [
            "\n drZ+6I+1e+v0NMe8s4ykGTwMcrgr0bkShBbKx0OqkEWjZFFkadwlB1/YkdMV95mmDgNEN6MTCN\n +Da7VpM2LMgw==",
            "\n pgYu9ncTDo10w8PqQwmTaRU6oC0SQXZwAuG9qsCxGs1/KCi3eZLwhPwPDvUhX680lOx4+fF+d9\n TJ0Og4FlDlXg=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9857\"; a=\"262309395\"",
            "E=Sophos;i=\"5.79,330,1602572400\"; d=\"scan'208\";a=\"262309395\"",
            "E=Sophos;i=\"5.79,330,1602572400\"; d=\"scan'208\";a=\"398858740\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "haiyue.wang@intel.com, jia.guo@intel.com, dev@dpdk.org,\n ferruh.yigit@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n Bruce Allan <bruce.w.allan@intel.com>",
        "Date": "Fri,  8 Jan 2021 12:35:06 +0800",
        "Message-Id": "<20210108043508.301227-8-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20210108043508.301227-1-qi.z.zhang@intel.com>",
        "References": "<20210108043508.301227-1-qi.z.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 7/9] net/ice/base: cleanup style issues",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "A few style issues reported by checkpatch have snuck into the code,\nresolve the style issues.\n\nPARENTHESIS_ALIGNMENT: Alignment should match open parenthesis\nCOMPLEX_MACRO: Macros with complex values should be enclosed in parentheses\n\nSigned-off-by: Bruce Allan <bruce.w.allan@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_controlq.h  | 4 ++--\n drivers/net/ice/base/ice_flex_type.h | 4 ++--\n drivers/net/ice/base/ice_flow.c      | 6 +++---\n drivers/net/ice/base/ice_sched.c     | 2 +-\n 4 files changed, 8 insertions(+), 8 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h\nindex 161c1bebff..94e8bfcc98 100644\n--- a/drivers/net/ice/base/ice_controlq.h\n+++ b/drivers/net/ice/base/ice_controlq.h\n@@ -15,8 +15,8 @@\n \t(&(((struct ice_aq_desc *)((R).desc_buf.va))[i]))\n \n #define ICE_CTL_Q_DESC_UNUSED(R) \\\n-\t(u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \\\n-\t      (R)->next_to_clean - (R)->next_to_use - 1)\n+\t((u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \\\n+\t       (R)->next_to_clean - (R)->next_to_use - 1))\n \n /* Defines that help manage the driver vs FW API checks.\n  * Take a look at ice_aq_ver_check in ice_controlq.c for actual usage.\ndiff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h\nindex 9b9503b3ba..53d396daef 100644\n--- a/drivers/net/ice/base/ice_flex_type.h\n+++ b/drivers/net/ice/base/ice_flex_type.h\n@@ -670,8 +670,8 @@ struct ice_xlt1 {\n #define ICE_PF_NUM_S\t13\n #define ICE_PF_NUM_M\t(0x07 << ICE_PF_NUM_S)\n #define ICE_VSIG_VALUE(vsig, pf_id) \\\n-\t(u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \\\n-\t      (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M))\n+\t((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \\\n+\t       (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)))\n #define ICE_DEFAULT_VSIG\t0\n \n /* XLT2 Table */\ndiff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 15b43061c8..ad31856777 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -3533,9 +3533,9 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)\n  *\t     3 for tunneled with outer ipv6\n  */\n #define ICE_FLOW_GEN_PROFID(hash, hdr, encap) \\\n-\t(u64)(((u64)(hash) & ICE_FLOW_PROF_HASH_M) | \\\n-\t      (((u64)(hdr) << ICE_FLOW_PROF_HDR_S) & ICE_FLOW_PROF_HDR_M) | \\\n-\t      (((u64)(encap) << ICE_FLOW_PROF_ENCAP_S) & ICE_FLOW_PROF_ENCAP_M))\n+\t((u64)(((u64)(hash) & ICE_FLOW_PROF_HASH_M) | \\\n+\t       (((u64)(hdr) << ICE_FLOW_PROF_HDR_S) & ICE_FLOW_PROF_HDR_M) | \\\n+\t       (((u64)(encap) << ICE_FLOW_PROF_ENCAP_S) & ICE_FLOW_PROF_ENCAP_M)))\n \n static void\n ice_rss_config_xor_word(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst)\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 1cce8eaff1..53d76d17ee 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -4289,7 +4289,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,\n \tice_sched_rm_unused_rl_prof(hw);\n \n \tlayer_num = ice_sched_get_rl_prof_layer(pi, rl_type,\n-\t\tnode->tx_sched_layer);\n+\t\t\t\t\t\tnode->tx_sched_layer);\n \tif (layer_num >= hw->num_tx_sched_layers)\n \t\treturn ICE_ERR_PARAM;\n \n",
    "prefixes": [
        "7/9"
    ]
}