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GET /api/patches/86046/?format=api
{ "id": 86046, "url": "https://patches.dpdk.org/api/patches/86046/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1609922063-13716-3-git-send-email-viacheslavo@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1609922063-13716-3-git-send-email-viacheslavo@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1609922063-13716-3-git-send-email-viacheslavo@nvidia.com", "date": "2021-01-06T08:34:23", "name": "[v2,2/2] net/mlx5: add mbuf fast free offload support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7ebd7097d49dfec1b424ff7e51897d3044afe38d", "submitter": { "id": 1926, "url": "https://patches.dpdk.org/api/people/1926/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1609922063-13716-3-git-send-email-viacheslavo@nvidia.com/mbox/", "series": [ { "id": 14551, "url": "https://patches.dpdk.org/api/series/14551/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14551", "date": "2021-01-06T08:34:21", "name": "add mbuf fast free offload support", "version": 2, "mbox": "https://patches.dpdk.org/series/14551/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/86046/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/86046/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7CEF9A09FF;\n\tWed, 6 Jan 2021 09:34:45 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id AED3D1608E0;\n\tWed, 6 Jan 2021 09:34:37 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by mails.dpdk.org (Postfix) with ESMTP id 9C12B1608CB\n for <dev@dpdk.org>; Wed, 6 Jan 2021 09:34:34 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@nvidia.com) with SMTP; 6 Jan 2021 10:34:31 +0200", "from nvidia.com (pegasus12.mtr.labs.mlnx [10.210.17.40])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 1068YTv7026551;\n Wed, 6 Jan 2021 10:34:30 +0200" ], "From": "Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "To": "dev@dpdk.org", "Cc": "rasland@nvidia.com, matan@nvidia.com, orika@nvidia.com,\n thomas@monjalon.net, akozyrev@nvidia.com", "Date": "Wed, 6 Jan 2021 08:34:23 +0000", "Message-Id": "<1609922063-13716-3-git-send-email-viacheslavo@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1609922063-13716-1-git-send-email-viacheslavo@nvidia.com>", "References": "<1608311697-31529-1-git-send-email-viacheslavo@nvidia.com>\n <1609922063-13716-1-git-send-email-viacheslavo@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v2 2/2] net/mlx5: add mbuf fast free offload\n support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds support of the mbuf fast free offload to the\ntransmit datapath. This offload allows to free the mbufs on\ntransmit completion in the most efficient way. It requires\nthe all mbufs were allocated from the same pool, have\nthe reference counter value as 1, and have no any extarnally\nattached buffers.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n doc/guides/nics/features/mlx5.ini | 1 +\n doc/guides/nics/mlx5.rst | 12 ++++++++++++\n doc/guides/rel_notes/release_21_02.rst | 7 ++++++-\n drivers/net/mlx5/mlx5_rxtx.c | 35 ++++++++++++++++++++++++++--------\n drivers/net/mlx5/mlx5_rxtx.h | 1 +\n drivers/net/mlx5/mlx5_txq.c | 6 ++++++\n 6 files changed, 53 insertions(+), 9 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini\nindex 54ec95d..72348cd 100644\n--- a/doc/guides/nics/features/mlx5.ini\n+++ b/doc/guides/nics/features/mlx5.ini\n@@ -9,6 +9,7 @@ Link status = Y\n Link status event = Y\n Removal event = Y\n Rx interrupt = Y\n+Fast mbuf free = Y\n Queue start/stop = Y\n Burst mode info = Y\n MTU update = Y\ndiff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex 3bda0f8..dee4404 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -74,6 +74,7 @@ Features\n - RX VLAN stripping.\n - TX VLAN insertion.\n - RX CRC stripping configuration.\n+- TX mbuf fast free offload.\n - Promiscuous mode on PF and VF.\n - Multicast promiscuous mode on PF and VF.\n - Hardware checksum offloads.\n@@ -320,6 +321,17 @@ Limitations\n for some NICs (such as ConnectX-6 Dx, ConnectX-6 Lx, and BlueField-2).\n The capability bit ``scatter_fcs_w_decap_disable`` shows NIC support.\n \n+- TX mbuf fast free:\n+\n+ - fast free offload assumes the all mbufs being sent are originated from the\n+ same memory pool and there is no any extra references to the mbufs (the\n+ reference counter for each mbuf is equal 1 on tx_burst call). The latter\n+ means there should be no any externally attached buffers in mbufs. It is\n+ an application responsibility to provide the correct mbufs if the fast\n+ free offload is engaged. The mlx5 PMD implicitely produces the mbufs with\n+ externally attached buffers if MPRQ option is enabled, hence, the fast\n+ free offload is neither supported nor advertised if there is MPRQ enabled.\n+\n - Sample flow:\n \n - Supports ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action only within NIC Rx and E-Switch steering domain.\ndiff --git a/doc/guides/rel_notes/release_21_02.rst b/doc/guides/rel_notes/release_21_02.rst\nindex 638f981..9fa0634 100644\n--- a/doc/guides/rel_notes/release_21_02.rst\n+++ b/doc/guides/rel_notes/release_21_02.rst\n@@ -27,7 +27,7 @@ New Features\n .. This section should contain new features added in this release.\n Sample format:\n \n- * **Add a title in the past tense with a full stop.**\n+ * **Added support for the Tx mbuf fast free offload.**\n \n Add a short 1-2 sentence description in the past tense.\n The description should be enough to allow someone scanning\n@@ -55,6 +55,11 @@ New Features\n Also, make sure to start the actual text at the margin.\n =======================================================\n \n+* **Updated Mellanox mlx5 driver.**\n+\n+ Updated the Mellanox mlx5 driver with new features and improvements, including:\n+\n+ * Added vectorized Multi-Packet Rx Queue burst.\n \n Removed Items\n -------------\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex ee56a72..680904e 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -1889,6 +1889,8 @@ enum mlx5_txcmp_code {\n /**\n * Free the mbufs from the linear array of pointers.\n *\n+ * @param txq\n+ * Pointer to Tx queue structure.\n * @param pkts\n * Pointer to array of packets to be free.\n * @param pkts_n\n@@ -1898,7 +1900,8 @@ enum mlx5_txcmp_code {\n * compile time and may be used for optimization.\n */\n static __rte_always_inline void\n-mlx5_tx_free_mbuf(struct rte_mbuf **__rte_restrict pkts,\n+mlx5_tx_free_mbuf(struct mlx5_txq_data *__rte_restrict txq,\n+\t\t struct rte_mbuf **__rte_restrict pkts,\n \t\t unsigned int pkts_n,\n \t\t unsigned int olx __rte_unused)\n {\n@@ -1914,6 +1917,16 @@ enum mlx5_txcmp_code {\n \t */\n \tMLX5_ASSERT(pkts);\n \tMLX5_ASSERT(pkts_n);\n+\t/*\n+\t * Free mbufs directly to the pool in bulk\n+\t * if fast free offload is engaged\n+\t */\n+\tif (!MLX5_TXOFF_CONFIG(MULTI) && txq->fast_free) {\n+\t\tmbuf = *pkts;\n+\t\tpool = mbuf->pool;\n+\t\trte_mempool_put_bulk(pool, (void *)pkts, pkts_n);\n+\t\treturn;\n+\t}\n \tfor (;;) {\n \t\tfor (;;) {\n \t\t\t/*\n@@ -1995,11 +2008,12 @@ enum mlx5_txcmp_code {\n * on the tx_burst completion.\n */\n static __rte_noinline void\n-__mlx5_tx_free_mbuf(struct rte_mbuf **__rte_restrict pkts,\n+__mlx5_tx_free_mbuf(struct mlx5_txq_data *__rte_restrict txq,\n+\t\t struct rte_mbuf **__rte_restrict pkts,\n \t\t unsigned int pkts_n,\n \t\t unsigned int olx __rte_unused)\n {\n-\tmlx5_tx_free_mbuf(pkts, pkts_n, olx);\n+\tmlx5_tx_free_mbuf(txq, pkts, pkts_n, olx);\n }\n \n /**\n@@ -2033,7 +2047,8 @@ enum mlx5_txcmp_code {\n \t\tpart = RTE_MIN(part, n_elts);\n \t\tMLX5_ASSERT(part);\n \t\tMLX5_ASSERT(part <= txq->elts_s);\n-\t\tmlx5_tx_free_mbuf(&txq->elts[txq->elts_tail & txq->elts_m],\n+\t\tmlx5_tx_free_mbuf(txq,\n+\t\t\t\t &txq->elts[txq->elts_tail & txq->elts_m],\n \t\t\t\t part, olx);\n \t\ttxq->elts_tail += part;\n \t\tn_elts -= part;\n@@ -5184,7 +5199,7 @@ enum mlx5_txcmp_code {\n \ttxq->stats.opackets += loc.pkts_sent;\n #endif\n \tif (MLX5_TXOFF_CONFIG(INLINE) && loc.mbuf_free)\n-\t\t__mlx5_tx_free_mbuf(pkts, loc.mbuf_free, olx);\n+\t\t__mlx5_tx_free_mbuf(txq, pkts, loc.mbuf_free, olx);\n \treturn loc.pkts_sent;\n }\n \n@@ -5829,17 +5844,19 @@ enum mlx5_txcmp_code {\n \n int\n mlx5_tx_burst_mode_get(struct rte_eth_dev *dev,\n-\t\t uint16_t tx_queue_id __rte_unused,\n+\t\t uint16_t tx_queue_id,\n \t\t struct rte_eth_burst_mode *mode)\n {\n \teth_tx_burst_t pkt_burst = dev->tx_pkt_burst;\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_txq_data *txq = (*priv->txqs)[tx_queue_id];\n \tunsigned int i, olx;\n \n \tfor (i = 0; i < RTE_DIM(txoff_func); i++) {\n \t\tif (pkt_burst == txoff_func[i].func) {\n \t\t\tolx = txoff_func[i].olx;\n \t\t\tsnprintf(mode->info, sizeof(mode->info),\n-\t\t\t\t \"%s%s%s%s%s%s%s%s%s\",\n+\t\t\t\t \"%s%s%s%s%s%s%s%s%s%s\",\n \t\t\t\t (olx & MLX5_TXOFF_CONFIG_EMPW) ?\n \t\t\t\t ((olx & MLX5_TXOFF_CONFIG_MPW) ?\n \t\t\t\t \"Legacy MPW\" : \"Enhanced MPW\") : \"No MPW\",\n@@ -5858,7 +5875,9 @@ enum mlx5_txcmp_code {\n \t\t\t\t (olx & MLX5_TXOFF_CONFIG_METADATA) ?\n \t\t\t\t \" + METADATA\" : \"\",\n \t\t\t\t (olx & MLX5_TXOFF_CONFIG_TXPP) ?\n-\t\t\t\t \" + TXPP\" : \"\");\n+\t\t\t\t \" + TXPP\" : \"\",\n+\t\t\t\t (txq && txq->fast_free) ?\n+\t\t\t\t \" + Fast Free\" : \"\");\n \t\t\treturn 0;\n \t\t}\n \t}\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex af47839..b78ca60 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -251,6 +251,7 @@ struct mlx5_txq_data {\n \tuint16_t vlan_en:1; /* VLAN insertion in WQE is supported. */\n \tuint16_t db_nc:1; /* Doorbell mapped to non-cached region. */\n \tuint16_t db_heu:1; /* Doorbell heuristic write barrier. */\n+\tuint16_t fast_free:1; /* mbuf fast free on Tx is enabled. */\n \tuint16_t inlen_send; /* Ordinary send data inline size. */\n \tuint16_t inlen_empw; /* eMPW max packet size to inline. */\n \tuint16_t inlen_mode; /* Minimal data length to inline. */\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex d96abef..c51c85b 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -123,6 +123,8 @@\n \t\t\t\t DEV_TX_OFFLOAD_GRE_TNL_TSO |\n \t\t\t\t DEV_TX_OFFLOAD_GENEVE_TNL_TSO);\n \t}\n+\tif (!config->mprq.enabled)\n+\t\toffloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;\n \treturn offloads;\n }\n \n@@ -800,6 +802,10 @@\n \tbool vlan_inline;\n \tunsigned int temp;\n \n+\ttxq_ctrl->txq.fast_free =\n+\t\t!!((txq_ctrl->txq.offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) &&\n+\t\t !(txq_ctrl->txq.offloads & DEV_TX_OFFLOAD_MULTI_SEGS) &&\n+\t\t !config->mprq.enabled);\n \tif (config->txqs_inline == MLX5_ARG_UNSET)\n \t\ttxqs_inline =\n #if defined(RTE_ARCH_ARM64)\n", "prefixes": [ "v2", "2/2" ] }