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GET /api/patches/8597/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 8597,
    "url": "https://patches.dpdk.org/api/patches/8597/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446565228-24276-3-git-send-email-helin.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1446565228-24276-3-git-send-email-helin.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1446565228-24276-3-git-send-email-helin.zhang@intel.com",
    "date": "2015-11-03T15:40:28",
    "name": "[dpdk-dev,v3,2/2] i40e: Enlarge the number of supported queues",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "492dfa925f6454fafc4b14744a1b838b7b2c3413",
    "submitter": {
        "id": 14,
        "url": "https://patches.dpdk.org/api/people/14/?format=api",
        "name": "Zhang, Helin",
        "email": "helin.zhang@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446565228-24276-3-git-send-email-helin.zhang@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8597/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8597/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 12B658E5D;\n\tTue,  3 Nov 2015 16:40:58 +0100 (CET)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id F316C8E5D\n\tfor <dev@dpdk.org>; Tue,  3 Nov 2015 16:40:55 +0100 (CET)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby fmsmga102.fm.intel.com with ESMTP; 03 Nov 2015 07:40:43 -0800",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 03 Nov 2015 07:40:38 -0800",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id tA3Fea59024617;\n\tTue, 3 Nov 2015 23:40:36 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid tA3FeXxd024325; Tue, 3 Nov 2015 23:40:35 +0800",
            "(from hzhan75@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tA3FeX5w024321; \n\tTue, 3 Nov 2015 23:40:33 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.20,239,1444719600\"; d=\"scan'208\";a=\"810734994\"",
        "From": "Helin Zhang <helin.zhang@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Tue,  3 Nov 2015 23:40:28 +0800",
        "Message-Id": "<1446565228-24276-3-git-send-email-helin.zhang@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1446565228-24276-1-git-send-email-helin.zhang@intel.com>",
        "References": "<1445498887-21218-1-git-send-email-helin.zhang@intel.com>\n\t<1446565228-24276-1-git-send-email-helin.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 2/2] i40e: Enlarge the number of supported\n\tqueues",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "It enlarges the number of supported queues to hardware allowed\nmaximum. There was a software limitation of 64 per physical port\nwhich is not reasonable.\n\nSigned-off-by: Helin Zhang <helin.zhang@intel.com>\n---\n config/common_bsdapp                 |   3 +-\n config/common_linuxapp               |   3 +-\n doc/guides/rel_notes/deprecation.rst |   5 --\n doc/guides/rel_notes/release_2_2.rst |  12 +++\n drivers/net/i40e/i40e_ethdev.c       | 138 +++++++++++++++--------------------\n drivers/net/i40e/i40e_ethdev.h       |   8 ++\n 6 files changed, 81 insertions(+), 88 deletions(-)\n\nv2 changes:\nFixed issues of using wrong configured number of VF queues.\n\nv3 changes:\nUpdated release notes.",
    "diff": "diff --git a/config/common_bsdapp b/config/common_bsdapp\nindex f202d2f..fba29e5 100644\n--- a/config/common_bsdapp\n+++ b/config/common_bsdapp\n@@ -141,7 +141,7 @@ CONFIG_RTE_LIBRTE_KVARGS=y\n CONFIG_RTE_LIBRTE_ETHER=y\n CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n\n CONFIG_RTE_MAX_ETHPORTS=32\n-CONFIG_RTE_MAX_QUEUES_PER_PORT=256\n+CONFIG_RTE_MAX_QUEUES_PER_PORT=1024\n CONFIG_RTE_LIBRTE_IEEE1588=n\n CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16\n CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y\n@@ -189,6 +189,7 @@ CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y\n CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y\n CONFIG_RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE=y\n CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n\n+CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64\n CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4\n CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4\n # interval up to 8160 us, aligned to 2 (or default value)\ndiff --git a/config/common_linuxapp b/config/common_linuxapp\nindex c1d4bbd..7248262 100644\n--- a/config/common_linuxapp\n+++ b/config/common_linuxapp\n@@ -139,7 +139,7 @@ CONFIG_RTE_LIBRTE_KVARGS=y\n CONFIG_RTE_LIBRTE_ETHER=y\n CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n\n CONFIG_RTE_MAX_ETHPORTS=32\n-CONFIG_RTE_MAX_QUEUES_PER_PORT=256\n+CONFIG_RTE_MAX_QUEUES_PER_PORT=1024\n CONFIG_RTE_LIBRTE_IEEE1588=n\n CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16\n CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y\n@@ -187,6 +187,7 @@ CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y\n CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y\n CONFIG_RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE=y\n CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n\n+CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64\n CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4\n CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4\n # interval up to 8160 us, aligned to 2 (or default value)\ndiff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst\nindex f099ac0..730c3b7 100644\n--- a/doc/guides/rel_notes/deprecation.rst\n+++ b/doc/guides/rel_notes/deprecation.rst\n@@ -8,11 +8,6 @@ API and ABI deprecation notices are to be posted here.\n Deprecation Notices\n -------------------\n \n-* Significant ABI changes are planned for struct rte_eth_dev to support up to\n-  1024 queues per port. This change will be in release 2.2.\n-  There is no backward compatibility planned from release 2.2.\n-  All binaries will need to be rebuilt from release 2.2.\n-\n * The following fields have been deprecated in rte_eth_stats:\n   ibadcrc, ibadlen, imcasts, fdirmatch, fdirmiss,\n   tx_pause_xon, rx_pause_xon, tx_pause_xoff, rx_pause_xoff\ndiff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst\nindex 16fcc89..5d119f4 100644\n--- a/doc/guides/rel_notes/release_2_2.rst\n+++ b/doc/guides/rel_notes/release_2_2.rst\n@@ -116,6 +116,13 @@ Drivers\n   Fixed i40e issue that occurred when a DPDK application didn't initialize\n   ports if memory wasn't available on socket 0.\n \n+* **i40e: Fixed issue of cannot supporting more than 64 queues per port.**\n+\n+  Fixed the issue in i40e of cannot supporting more than 64 queues per port,\n+  though hardware actually supports that. The real number of queues may vary,\n+  as long as the total number of queues used in PF, VFs, VMDq and FD does not\n+  exceeds the hardware maximum.\n+\n * **vhost: Fixed Qemu shutdown.**\n \n   Fixed issue with libvirt ``virsh destroy`` not killing the VM.\n@@ -205,6 +212,11 @@ ABI Changes\n * librte_cfgfile: Allow longer names and values by increasing the constants\n   CFG_NAME_LEN and CFG_VALUE_LEN to 64 and 256 respectively.\n \n+* i40e: From 2.2, enlarge the maximum number of queues per port by increasing\n+  the config parameter of CONFIG_RTE_MAX_QUEUES_PER_PORT to 1024. Also an new\n+  config parameter of CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF will be added to\n+  configure the maximum number of queues per PF.\n+\n \n Shared Library Versions\n -----------------------\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 66dfdba..1e8de7b 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -2748,9 +2748,8 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)\n {\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n-\tuint16_t sum_queues = 0, sum_vsis, left_queues;\n+\tuint16_t qp_count = 0, vsi_count = 0;\n \n-\t/* First check if FW support SRIOV */\n \tif (dev->pci_dev->max_vfs && !hw->func_caps.sr_iov_1_1) {\n \t\tPMD_INIT_LOG(ERR, \"HW configuration doesn't support SRIOV\");\n \t\treturn -EINVAL;\n@@ -2761,109 +2760,85 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)\n \tpf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS] = I40E_DEFAULT_LOW_WATER;\n \n \tpf->flags = I40E_FLAG_HEADER_SPLIT_DISABLED;\n-\tpf->max_num_vsi = RTE_MIN(hw->func_caps.num_vsis, I40E_MAX_NUM_VSIS);\n-\tPMD_INIT_LOG(INFO, \"Max supported VSIs:%u\", pf->max_num_vsi);\n-\t/* Allocate queues for pf */\n-\tif (hw->func_caps.rss) {\n+\tpf->max_num_vsi = hw->func_caps.num_vsis;\n+\tpf->lan_nb_qp_max = RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF;\n+\tpf->vmdq_nb_qp_max = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM;\n+\tpf->vf_nb_qp_max = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF;\n+\n+\t/* FDir queue/VSI allocation */\n+\tpf->fdir_qp_offset = 0;\n+\tif (hw->func_caps.fd) {\n+\t\tpf->flags |= I40E_FLAG_FDIR;\n+\t\tpf->fdir_nb_qps = I40E_DEFAULT_QP_NUM_FDIR;\n+\t} else {\n+\t\tpf->fdir_nb_qps = 0;\n+\t}\n+\tqp_count += pf->fdir_nb_qps;\n+\tvsi_count += 1;\n+\n+\t/* LAN queue/VSI allocation */\n+\tpf->lan_qp_offset = pf->fdir_qp_offset + pf->fdir_nb_qps;\n+\tif (!hw->func_caps.rss) {\n+\t\tpf->lan_nb_qps = 1;\n+\t} else {\n \t\tpf->flags |= I40E_FLAG_RSS;\n \t\tif (hw->mac.type == I40E_MAC_X722)\n \t\t\tpf->flags |= I40E_FLAG_RSS_AQ_CAPABLE;\n-\t\tpf->lan_nb_qps = RTE_MIN(hw->func_caps.num_tx_qp,\n-\t\t\t(uint32_t)(1 << hw->func_caps.rss_table_entry_width));\n-\t\tpf->lan_nb_qps = i40e_align_floor(pf->lan_nb_qps);\n-\t} else\n-\t\tpf->lan_nb_qps = 1;\n-\tsum_queues = pf->lan_nb_qps;\n-\t/* Default VSI is not counted in */\n-\tsum_vsis = 0;\n-\tPMD_INIT_LOG(INFO, \"PF queue pairs:%u\", pf->lan_nb_qps);\n+\t\tpf->lan_nb_qps = pf->lan_nb_qp_max;\n+\t}\n+\tqp_count += pf->lan_nb_qps;\n+\tvsi_count += 1;\n \n+\t/* VF queue/VSI allocation */\n+\tpf->vf_qp_offset = pf->lan_qp_offset + pf->lan_nb_qps;\n \tif (hw->func_caps.sr_iov_1_1 && dev->pci_dev->max_vfs) {\n \t\tpf->flags |= I40E_FLAG_SRIOV;\n \t\tpf->vf_nb_qps = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF;\n-\t\tif (dev->pci_dev->max_vfs > hw->func_caps.num_vfs) {\n-\t\t\tPMD_INIT_LOG(ERR, \"Config VF number %u, \"\n-\t\t\t\t     \"max supported %u.\",\n-\t\t\t\t     dev->pci_dev->max_vfs,\n-\t\t\t\t     hw->func_caps.num_vfs);\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t\tif (pf->vf_nb_qps > I40E_MAX_QP_NUM_PER_VF) {\n-\t\t\tPMD_INIT_LOG(ERR, \"FVL VF queue %u, \"\n-\t\t\t\t     \"max support %u queues.\",\n-\t\t\t\t     pf->vf_nb_qps, I40E_MAX_QP_NUM_PER_VF);\n-\t\t\treturn -EINVAL;\n-\t\t}\n \t\tpf->vf_num = dev->pci_dev->max_vfs;\n-\t\tsum_queues += pf->vf_nb_qps * pf->vf_num;\n-\t\tsum_vsis   += pf->vf_num;\n-\t\tPMD_INIT_LOG(INFO, \"Max VF num:%u each has queue pairs:%u\",\n-\t\t\t     pf->vf_num, pf->vf_nb_qps);\n-\t} else\n+\t\tPMD_DRV_LOG(DEBUG, \"%u VF VSIs, %u queues per VF VSI, \"\n+\t\t\t    \"in total %u queues\", pf->vf_num, pf->vf_nb_qps,\n+\t\t\t    pf->vf_nb_qps * pf->vf_num);\n+\t} else {\n+\t\tpf->vf_nb_qps = 0;\n \t\tpf->vf_num = 0;\n+\t}\n+\tqp_count += pf->vf_nb_qps * pf->vf_num;\n+\tvsi_count += pf->vf_num;\n \n+\t/* VMDq queue/VSI allocation */\n+\tpf->vmdq_qp_offset = pf->vf_qp_offset + pf->vf_nb_qps * pf->vf_num;\n \tif (hw->func_caps.vmdq) {\n \t\tpf->flags |= I40E_FLAG_VMDQ;\n-\t\tpf->vmdq_nb_qps = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM;\n+\t\tpf->vmdq_nb_qps = pf->vmdq_nb_qp_max;\n \t\tpf->max_nb_vmdq_vsi = 1;\n-\t\t/*\n-\t\t * If VMDQ available, assume a single VSI can be created.  Will adjust\n-\t\t * later.\n-\t\t */\n-\t\tsum_queues += pf->vmdq_nb_qps * pf->max_nb_vmdq_vsi;\n-\t\tsum_vsis += pf->max_nb_vmdq_vsi;\n+\t\tPMD_DRV_LOG(DEBUG, \"%u VMDQ VSIs, %u queues per VMDQ VSI, \"\n+\t\t\t    \"in total %u queues\", pf->max_nb_vmdq_vsi,\n+\t\t\t    pf->vmdq_nb_qps,\n+\t\t\t    pf->vmdq_nb_qps * pf->max_nb_vmdq_vsi);\n \t} else {\n \t\tpf->vmdq_nb_qps = 0;\n \t\tpf->max_nb_vmdq_vsi = 0;\n \t}\n-\tpf->nb_cfg_vmdq_vsi = 0;\n-\n-\tif (hw->func_caps.fd) {\n-\t\tpf->flags |= I40E_FLAG_FDIR;\n-\t\tpf->fdir_nb_qps = I40E_DEFAULT_QP_NUM_FDIR;\n-\t\t/**\n-\t\t * Each flow director consumes one VSI and one queue,\n-\t\t * but can't calculate out predictably here.\n-\t\t */\n-\t}\n+\tqp_count += pf->vmdq_nb_qps * pf->max_nb_vmdq_vsi;\n+\tvsi_count += pf->max_nb_vmdq_vsi;\n \n \tif (hw->func_caps.dcb)\n \t\tpf->flags |= I40E_FLAG_DCB;\n \n-\tif (sum_vsis > pf->max_num_vsi ||\n-\t\tsum_queues > hw->func_caps.num_rx_qp) {\n-\t\tPMD_INIT_LOG(ERR, \"VSI/QUEUE setting can't be satisfied\");\n-\t\tPMD_INIT_LOG(ERR, \"Max VSIs: %u, asked:%u\",\n-\t\t\t     pf->max_num_vsi, sum_vsis);\n-\t\tPMD_INIT_LOG(ERR, \"Total queue pairs:%u, asked:%u\",\n-\t\t\t     hw->func_caps.num_rx_qp, sum_queues);\n+\tif (qp_count > hw->func_caps.num_tx_qp) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate %u queues, which exceeds \"\n+\t\t\t    \"the hardware maximum %u\", qp_count,\n+\t\t\t    hw->func_caps.num_tx_qp);\n \t\treturn -EINVAL;\n \t}\n-\n-\t/* Adjust VMDQ setting to support as many VMs as possible */\n-\tif (pf->flags & I40E_FLAG_VMDQ) {\n-\t\tleft_queues = hw->func_caps.num_rx_qp - sum_queues;\n-\n-\t\tpf->max_nb_vmdq_vsi += RTE_MIN(left_queues / pf->vmdq_nb_qps,\n-\t\t\t\t\tpf->max_num_vsi - sum_vsis);\n-\n-\t\t/* Limit the max VMDQ number that rte_ether that can support  */\n-\t\tpf->max_nb_vmdq_vsi = RTE_MIN(pf->max_nb_vmdq_vsi,\n-\t\t\t\t\tETH_64_POOLS - 1);\n-\n-\t\tPMD_INIT_LOG(INFO, \"Max VMDQ VSI num:%u\",\n-\t\t\t\tpf->max_nb_vmdq_vsi);\n-\t\tPMD_INIT_LOG(INFO, \"VMDQ queue pairs:%u\", pf->vmdq_nb_qps);\n-\t}\n-\n-\t/* Each VSI occupy 1 MSIX interrupt at least, plus IRQ0 for misc intr\n-\t * cause */\n-\tif (sum_vsis > hw->func_caps.num_msix_vectors - 1) {\n-\t\tPMD_INIT_LOG(ERR, \"Too many VSIs(%u), MSIX intr(%u) not enough\",\n-\t\t\t     sum_vsis, hw->func_caps.num_msix_vectors);\n+\tif (vsi_count > hw->func_caps.num_vsis) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate %u VSIs, which exceeds \"\n+\t\t\t    \"the hardware maximum %u\", vsi_count,\n+\t\t\t    hw->func_caps.num_vsis);\n \t\treturn -EINVAL;\n \t}\n-\treturn I40E_SUCCESS;\n+\n+\treturn 0;\n }\n \n static int\n@@ -3253,7 +3228,8 @@ i40e_vsi_config_tc_queue_mapping(struct i40e_vsi *vsi,\n \tbsf = rte_bsf32(qpnum_per_tc);\n \n \t/* Adjust the queue number to actual queues that can be applied */\n-\tvsi->nb_qps = qpnum_per_tc * total_tc;\n+\tif (!(vsi->type == I40E_VSI_MAIN && total_tc == 1))\n+\t\tvsi->nb_qps = qpnum_per_tc * total_tc;\n \n \t/**\n \t * Configure TC and queue mapping parameters, for enabled TC,\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex de3b9d9..fe3d331 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -402,10 +402,18 @@ struct i40e_pf {\n \tuint16_t vf_num;\n \t/* Each of below queue pairs should be power of 2 since it's the\n \t   precondition after TC configuration applied */\n+\tuint16_t lan_nb_qp_max;\n \tuint16_t lan_nb_qps; /* The number of queue pairs of LAN */\n+\tuint16_t lan_qp_offset;\n+\tuint16_t vmdq_nb_qp_max;\n \tuint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */\n+\tuint16_t vmdq_qp_offset;\n+\tuint16_t vf_nb_qp_max;\n \tuint16_t vf_nb_qps; /* The number of queue pairs of VF */\n+\tuint16_t vf_qp_offset;\n \tuint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */\n+\tuint16_t fdir_qp_offset;\n+\n \tuint16_t hash_lut_size; /* The size of hash lookup table */\n \t/* store VXLAN UDP ports */\n \tuint16_t vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];\n",
    "prefixes": [
        "dpdk-dev",
        "v3",
        "2/2"
    ]
}