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GET /api/patches/85936/?format=api
{ "id": 85936, "url": "https://patches.dpdk.org/api/patches/85936/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210103034627.80169-5-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210103034627.80169-5-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210103034627.80169-5-ajit.khaparde@broadcom.com", "date": "2021-01-03T03:46:25", "name": "[v2,4/6] net/bnxt: add LRO support for SR2 chip", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6eff32b5097b0e716b18153d061926c2f94aec33", "submitter": { "id": 501, "url": "https://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210103034627.80169-5-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 14511, "url": "https://patches.dpdk.org/api/series/14511/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14511", "date": "2021-01-03T03:46:21", "name": "net/bnxt: add support for Stingray2", "version": 2, "mbox": "https://patches.dpdk.org/series/14511/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/85936/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/85936/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7CEF6A09E4;\n\tSun, 3 Jan 2021 04:47:12 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D5C48160694;\n\tSun, 3 Jan 2021 04:46:48 +0100 (CET)", "from mail-pj1-f41.google.com (mail-pj1-f41.google.com\n [209.85.216.41])\n by mails.dpdk.org (Postfix) with ESMTP id D81D71606A6\n for <dev@dpdk.org>; Sun, 3 Jan 2021 04:46:47 +0100 (CET)", "by mail-pj1-f41.google.com with SMTP id lb18so7812392pjb.5\n for <dev@dpdk.org>; Sat, 02 Jan 2021 19:46:47 -0800 (PST)", "from localhost.localdomain ([192.19.223.252])\n by smtp.gmail.com with ESMTPSA id k7sm51391194pfh.201.2021.01.02.19.46.44\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Sat, 02 Jan 2021 19:46:46 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version; bh=iKugq9jFWSAg9CSJ4X0ZbWr19UmXA05dd++aXJhTp7o=;\n b=VieVOnD9HSF6a22St6ES/1f8OaztmtLQyfa1ZpeflHQxKZdlK/Xdy7fsDJY0ZprBWf\n hJlKRYkgksq9ZA0DvLxiOet568kyea9MnZnqkILZUGauU8itcI31gyx9/Com8lF73gON\n 8lGE2VuB+8IvEMi1K7R0bo9FBPeCpnDcBHnOw=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version;\n bh=iKugq9jFWSAg9CSJ4X0ZbWr19UmXA05dd++aXJhTp7o=;\n b=lQbB1tie1w9U0ebK3druVCjgsJDiFDeTVnTbXqHHuOzxOpDEuPMcRuUX3nUrimKj8D\n q0cO+bkCpR54auxM7oDJtJwYz998xX7XrJxMi8d3KtrpXAP2KbRv2KwAJzJ6bPdQ3Kqq\n 9zZ39apqC9mZLVRke4avqx5gr+LRKG3Soas9DGJteBlyGg7vHRL1Fk56VNq7VTrOsRNr\n +L0c9F9AxL2p4CmeKytc3CFcEQhIxkx0iByfIlM8WD0eTXHe6N2QVBYb6sprjpvxxE8Y\n 8Cnif3Pb4Re/Htr2nz/GtY5uwifyXxxo8ylrrDQ1EmSaY/gHH/fPSplQrTggeTPGERGL\n +7Jw==", "X-Gm-Message-State": "AOAM5324BxWll1NnRE+Yp6vhAGVsLqsJuzWZ9PlyirGrWeQwybMFFf21\n uWK7XapzakfTglRAsOaM3g2CpRYA+CFw5LiaYWSYek1sCc10xdtH8PPuOvCF8sAUCjhIqrxTiXr\n EI+HbSzC4CCoExCxdMv9F6HWo1curvn3aDWKMzMvUa5P3BefPoUV/mtsmncqGb7aVMw==", "X-Google-Smtp-Source": "\n ABdhPJwp8cogZ88Mgg64Ul55VhCtoVAbWaPBxnV5jX0+jAtrvtX0fuXCJDoDJ7NCCmTAUgkJKRNpmQ==", "X-Received": "by 2002:a17:90a:4b07:: with SMTP id\n g7mr23815172pjh.0.1609645606605;\n Sat, 02 Jan 2021 19:46:46 -0800 (PST)", "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Kalesh AP <kalesh-anakkur.purayil@broadcom.com>", "Date": "Sat, 2 Jan 2021 19:46:25 -0800", "Message-Id": "<20210103034627.80169-5-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.21.1 (Apple Git-122.3)", "In-Reply-To": "<20210103034627.80169-1-ajit.khaparde@broadcom.com>", "References": "<20201220052430.99990-1-ajit.khaparde@broadcom.com>\n <20210103034627.80169-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Type": "multipart/signed; protocol=\"application/pkcs7-signature\";\n micalg=sha-256; boundary=\"000000000000a00e7b05b7f6d234\"", "X-Content-Filtered-By": "Mailman/MimeDel 2.1.29", "Subject": "[dpdk-dev] [PATCH v2 4/6] net/bnxt: add LRO support for SR2 chip", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\n\nAdd the new chip specific TPA v2 logic to bnxt_tpa_start() to fully support\nTPA on the new chip.\n\nSigned-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/bnxt_rxr.c | 72 +++++++++++++++++++++++++++++++------\n drivers/net/bnxt/bnxt_rxr.h | 12 ++++++-\n 2 files changed, 72 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c\nindex 14901f1b9..af3f9b936 100644\n--- a/drivers/net/bnxt/bnxt_rxr.c\n+++ b/drivers/net/bnxt/bnxt_rxr.c\n@@ -134,6 +134,53 @@ struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,\n \treturn mbuf;\n }\n \n+static void bnxt_tpa_get_metadata(struct bnxt *bp,\n+\t\t\t\t struct bnxt_tpa_info *tpa_info,\n+\t\t\t\t struct rx_tpa_start_cmpl *tpa_start,\n+\t\t\t\t struct rx_tpa_start_cmpl_hi *tpa_start1)\n+{\n+\ttpa_info->cfa_code_valid = 0;\n+\ttpa_info->vlan_valid = 0;\n+\ttpa_info->hash_valid = 0;\n+\ttpa_info->l4_csum_valid = 0;\n+\n+\tif (likely(tpa_start->flags_type &\n+\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {\n+\t\ttpa_info->hash_valid = 1;\n+\t\ttpa_info->rss_hash = rte_le_to_cpu_32(tpa_start->rss_hash);\n+\t}\n+\n+\tif (bp->vnic_cap_flags & BNXT_VNIC_CAP_RX_CMPL_V2) {\n+\t\tstruct rx_tpa_start_v2_cmpl *v2_tpa_start = (void *)tpa_start;\n+\t\tstruct rx_tpa_start_v2_cmpl_hi *v2_tpa_start1 =\n+\t\t\t(void *)tpa_start1;\n+\n+\t\tif (v2_tpa_start->agg_id &\n+\t\t RX_TPA_START_V2_CMPL_METADATA1_VALID) {\n+\t\t\ttpa_info->vlan_valid = 1;\n+\t\t\ttpa_info->vlan =\n+\t\t\t\trte_le_to_cpu_16(v2_tpa_start1->metadata0);\n+\t\t}\n+\n+\t\tif (v2_tpa_start1->flags2 & RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK)\n+\t\t\ttpa_info->l4_csum_valid = 1;\n+\n+\t\treturn;\n+\t}\n+\n+\ttpa_info->cfa_code_valid = 1;\n+\ttpa_info->cfa_code = rte_le_to_cpu_16(tpa_start1->cfa_code);\n+\tif (tpa_start1->flags2 &\n+\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {\n+\t\ttpa_info->vlan_valid = 1;\n+\t\ttpa_info->vlan = rte_le_to_cpu_32(tpa_start1->metadata);\n+\t}\n+\n+\tif (likely(tpa_start1->flags2 &\n+\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))\n+\t\ttpa_info->l4_csum_valid = 1;\n+}\n+\n static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,\n \t\t\t struct rx_tpa_start_cmpl *tpa_start,\n \t\t\t struct rx_tpa_start_cmpl_hi *tpa_start1)\n@@ -164,21 +211,23 @@ static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,\n \tmbuf->data_len = mbuf->pkt_len;\n \tmbuf->port = rxq->port_id;\n \tmbuf->ol_flags = PKT_RX_LRO;\n-\tif (likely(tpa_start->flags_type &\n-\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {\n-\t\tmbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);\n+\n+\tbnxt_tpa_get_metadata(rxq->bp, tpa_info, tpa_start, tpa_start1);\n+\n+\tif (likely(tpa_info->hash_valid)) {\n+\t\tmbuf->hash.rss = tpa_info->rss_hash;\n \t\tmbuf->ol_flags |= PKT_RX_RSS_HASH;\n-\t} else {\n-\t\tmbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);\n+\t} else if (tpa_info->cfa_code_valid) {\n+\t\tmbuf->hash.fdir.id = tpa_info->cfa_code;\n \t\tmbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;\n \t}\n-\tif (tpa_start1->flags2 &\n-\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {\n-\t\tmbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);\n+\n+\tif (tpa_info->vlan_valid) {\n+\t\tmbuf->vlan_tci = tpa_info->vlan;\n \t\tmbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;\n \t}\n-\tif (likely(tpa_start1->flags2 &\n-\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))\n+\n+\tif (likely(tpa_info->l4_csum_valid))\n \t\tmbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;\n \n \t/* recycle next mbuf */\n@@ -751,7 +800,8 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,\n \t\t\t\tcpr->cp_ring_struct->ring_mask,\n \t\t\t\tcpr->valid);\n \n-\tif (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {\n+\tif (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START ||\n+\t cmp_type == RX_TPA_START_V2_CMPL_TYPE_RX_TPA_START_V2) {\n \t\tbnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,\n \t\t\t (struct rx_tpa_start_cmpl_hi *)rxcmp1);\n \t\trc = -EINVAL; /* Continue w/o new mbuf */\ndiff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h\nindex b2942030a..78814edbb 100644\n--- a/drivers/net/bnxt/bnxt_rxr.h\n+++ b/drivers/net/bnxt/bnxt_rxr.h\n@@ -50,6 +50,14 @@ struct bnxt_tpa_info {\n \tuint16_t\t\t\tlen;\n \tuint32_t\t\t\tagg_count;\n \tstruct rx_tpa_v2_abuf_cmpl\tagg_arr[TPA_MAX_NUM_SEGS];\n+\n+\tuint32_t rss_hash;\n+\tuint32_t vlan;\n+\tuint16_t cfa_code;\n+\tuint8_t hash_valid:1;\n+\tuint8_t vlan_valid:1;\n+\tuint8_t cfa_code_valid:1;\n+\tuint8_t l4_csum_valid:1;\n };\n \n struct bnxt_rx_ring_info {\n@@ -122,4 +130,6 @@ bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)\n \n #define BNXT_PTYPE_TBL_DIM\t128\n extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];\n-#endif\n+\n+#define RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK\t(0x1 << 14)\n+#endif /* _BNXT_RXR_H_ */\n", "prefixes": [ "v2", "4/6" ] }