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GET /api/patches/85843/?format=api
{ "id": 85843, "url": "https://patches.dpdk.org/api/patches/85843/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201228123302.3608-30-talshn@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201228123302.3608-30-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201228123302.3608-30-talshn@nvidia.com", "date": "2020-12-28T12:32:56", "name": "[v2,29/35] net/mlx5: fix separating eth_dev_ops per OS", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0277f9547772c5ea06799ab92d3d97a686ec0cb6", "submitter": { "id": 1893, "url": "https://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201228123302.3608-30-talshn@nvidia.com/mbox/", "series": [ { "id": 14482, "url": "https://patches.dpdk.org/api/series/14482/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14482", "date": "2020-12-28T12:32:28", "name": "mlx5 Windows support - part #6", "version": 2, "mbox": "https://patches.dpdk.org/series/14482/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/85843/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/85843/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C3E0FA09FF;\n\tMon, 28 Dec 2020 13:45:22 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 76BD2CCBB;\n\tMon, 28 Dec 2020 13:34:30 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id C478ACA68\n for <dev@dpdk.org>; Mon, 28 Dec 2020 13:33:37 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n talshn@nvidia.com) with SMTP; 28 Dec 2020 14:33:35 +0200", "from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BSCXWni001295;\n Mon, 28 Dec 2020 14:33:35 +0200" ], "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com,\n ophirmu@nvidia.com", "Date": "Mon, 28 Dec 2020 14:32:56 +0200", "Message-Id": "<20201228123302.3608-30-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20201228123302.3608-1-talshn@nvidia.com>", "References": "<20201217173037.11396-2-talshn@nvidia.com>\n <20201228123302.3608-1-talshn@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v2 29/35] net/mlx5: fix separating eth_dev_ops\n\tper OS", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ophir Munk <ophirmu@nvidia.com>\n\nThere are three types of eth_dev_ops: primary, secondary and isolate\nrepresented in three callback tables per OS. In this commit the OS\nspecific eth dev tables are unified into shared tables in file mlx5.c.\nStarting from this commit all operating systems must implement the same\neth dev APIs. In case an OS does not support an API - it can return in\nits implementation an error ENOTSUP.\n\nFixes: 042f5c94fd3a (\"net/mlx5: refactor device operations for Linux\")\n\nSigned-off-by: Ophir Munk <ophirmu@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c | 154 +------------------------------------\n drivers/net/mlx5/mlx5.c | 150 ++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5.h | 6 +-\n drivers/net/mlx5/mlx5_flow.c | 4 +-\n drivers/net/mlx5/windows/mlx5_os.c | 110 +-------------------------\n 5 files changed, 158 insertions(+), 266 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 4f68c74267..8353ac22e0 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -757,7 +757,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\t\trte_eth_devices[priv->sh->bond_dev].device;\n \t\telse\n \t\t\teth_dev->device = dpdk_dev;\n-\t\teth_dev->dev_ops = &mlx5_os_dev_sec_ops;\n+\t\teth_dev->dev_ops = &mlx5_dev_sec_ops;\n \t\teth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;\n \t\teth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;\n \t\terr = mlx5_proc_priv_init(eth_dev);\n@@ -1432,7 +1432,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t/* Initialize burst functions to prevent crashes before link-up. */\n \teth_dev->rx_pkt_burst = removed_rx_burst;\n \teth_dev->tx_pkt_burst = removed_tx_burst;\n-\teth_dev->dev_ops = &mlx5_os_dev_ops;\n+\teth_dev->dev_ops = &mlx5_dev_ops;\n \teth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;\n \teth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;\n \teth_dev->rx_queue_count = mlx5_rx_queue_count;\n@@ -2611,153 +2611,3 @@ mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)\n \t\t\t dev->data->mac_addrs,\n \t\t\t MLX5_MAX_MAC_ADDRESSES, priv->mac_own);\n }\n-\n-const struct eth_dev_ops mlx5_os_dev_ops = {\n-\t.dev_configure = mlx5_dev_configure,\n-\t.dev_start = mlx5_dev_start,\n-\t.dev_stop = mlx5_dev_stop,\n-\t.dev_set_link_down = mlx5_set_link_down,\n-\t.dev_set_link_up = mlx5_set_link_up,\n-\t.dev_close = mlx5_dev_close,\n-\t.promiscuous_enable = mlx5_promiscuous_enable,\n-\t.promiscuous_disable = mlx5_promiscuous_disable,\n-\t.allmulticast_enable = mlx5_allmulticast_enable,\n-\t.allmulticast_disable = mlx5_allmulticast_disable,\n-\t.link_update = mlx5_link_update,\n-\t.stats_get = mlx5_stats_get,\n-\t.stats_reset = mlx5_stats_reset,\n-\t.xstats_get = mlx5_xstats_get,\n-\t.xstats_reset = mlx5_xstats_reset,\n-\t.xstats_get_names = mlx5_xstats_get_names,\n-\t.fw_version_get = mlx5_fw_version_get,\n-\t.dev_infos_get = mlx5_dev_infos_get,\n-\t.read_clock = mlx5_txpp_read_clock,\n-\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n-\t.vlan_filter_set = mlx5_vlan_filter_set,\n-\t.rx_queue_setup = mlx5_rx_queue_setup,\n-\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n-\t.tx_queue_setup = mlx5_tx_queue_setup,\n-\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n-\t.rx_queue_release = mlx5_rx_queue_release,\n-\t.tx_queue_release = mlx5_tx_queue_release,\n-\t.rx_queue_start = mlx5_rx_queue_start,\n-\t.rx_queue_stop = mlx5_rx_queue_stop,\n-\t.tx_queue_start = mlx5_tx_queue_start,\n-\t.tx_queue_stop = mlx5_tx_queue_stop,\n-\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n-\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n-\t.mac_addr_remove = mlx5_mac_addr_remove,\n-\t.mac_addr_add = mlx5_mac_addr_add,\n-\t.mac_addr_set = mlx5_mac_addr_set,\n-\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n-\t.mtu_set = mlx5_dev_set_mtu,\n-\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n-\t.vlan_offload_set = mlx5_vlan_offload_set,\n-\t.reta_update = mlx5_dev_rss_reta_update,\n-\t.reta_query = mlx5_dev_rss_reta_query,\n-\t.rss_hash_update = mlx5_rss_hash_update,\n-\t.rss_hash_conf_get = mlx5_rss_hash_conf_get,\n-\t.filter_ctrl = mlx5_dev_filter_ctrl,\n-\t.rxq_info_get = mlx5_rxq_info_get,\n-\t.txq_info_get = mlx5_txq_info_get,\n-\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n-\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n-\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n-\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n-\t.is_removed = mlx5_is_removed,\n-\t.udp_tunnel_port_add = mlx5_udp_tunnel_port_add,\n-\t.get_module_info = mlx5_get_module_info,\n-\t.get_module_eeprom = mlx5_get_module_eeprom,\n-\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n-\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n-\t.hairpin_bind = mlx5_hairpin_bind,\n-\t.hairpin_unbind = mlx5_hairpin_unbind,\n-\t.hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,\n-\t.hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,\n-\t.hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,\n-\t.hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,\n-};\n-\n-/* Available operations from secondary process. */\n-const struct eth_dev_ops mlx5_os_dev_sec_ops = {\n-\t.stats_get = mlx5_stats_get,\n-\t.stats_reset = mlx5_stats_reset,\n-\t.xstats_get = mlx5_xstats_get,\n-\t.xstats_reset = mlx5_xstats_reset,\n-\t.xstats_get_names = mlx5_xstats_get_names,\n-\t.fw_version_get = mlx5_fw_version_get,\n-\t.dev_infos_get = mlx5_dev_infos_get,\n-\t.read_clock = mlx5_txpp_read_clock,\n-\t.rx_queue_start = mlx5_rx_queue_start,\n-\t.rx_queue_stop = mlx5_rx_queue_stop,\n-\t.tx_queue_start = mlx5_tx_queue_start,\n-\t.tx_queue_stop = mlx5_tx_queue_stop,\n-\t.rxq_info_get = mlx5_rxq_info_get,\n-\t.txq_info_get = mlx5_txq_info_get,\n-\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n-\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n-\t.get_module_info = mlx5_get_module_info,\n-\t.get_module_eeprom = mlx5_get_module_eeprom,\n-};\n-\n-/* Available operations in flow isolated mode. */\n-const struct eth_dev_ops mlx5_os_dev_ops_isolate = {\n-\t.dev_configure = mlx5_dev_configure,\n-\t.dev_start = mlx5_dev_start,\n-\t.dev_stop = mlx5_dev_stop,\n-\t.dev_set_link_down = mlx5_set_link_down,\n-\t.dev_set_link_up = mlx5_set_link_up,\n-\t.dev_close = mlx5_dev_close,\n-\t.promiscuous_enable = mlx5_promiscuous_enable,\n-\t.promiscuous_disable = mlx5_promiscuous_disable,\n-\t.allmulticast_enable = mlx5_allmulticast_enable,\n-\t.allmulticast_disable = mlx5_allmulticast_disable,\n-\t.link_update = mlx5_link_update,\n-\t.stats_get = mlx5_stats_get,\n-\t.stats_reset = mlx5_stats_reset,\n-\t.xstats_get = mlx5_xstats_get,\n-\t.xstats_reset = mlx5_xstats_reset,\n-\t.xstats_get_names = mlx5_xstats_get_names,\n-\t.fw_version_get = mlx5_fw_version_get,\n-\t.dev_infos_get = mlx5_dev_infos_get,\n-\t.read_clock = mlx5_txpp_read_clock,\n-\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n-\t.vlan_filter_set = mlx5_vlan_filter_set,\n-\t.rx_queue_setup = mlx5_rx_queue_setup,\n-\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n-\t.tx_queue_setup = mlx5_tx_queue_setup,\n-\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n-\t.rx_queue_release = mlx5_rx_queue_release,\n-\t.tx_queue_release = mlx5_tx_queue_release,\n-\t.rx_queue_start = mlx5_rx_queue_start,\n-\t.rx_queue_stop = mlx5_rx_queue_stop,\n-\t.tx_queue_start = mlx5_tx_queue_start,\n-\t.tx_queue_stop = mlx5_tx_queue_stop,\n-\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n-\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n-\t.mac_addr_remove = mlx5_mac_addr_remove,\n-\t.mac_addr_add = mlx5_mac_addr_add,\n-\t.mac_addr_set = mlx5_mac_addr_set,\n-\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n-\t.mtu_set = mlx5_dev_set_mtu,\n-\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n-\t.vlan_offload_set = mlx5_vlan_offload_set,\n-\t.filter_ctrl = mlx5_dev_filter_ctrl,\n-\t.rxq_info_get = mlx5_rxq_info_get,\n-\t.txq_info_get = mlx5_txq_info_get,\n-\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n-\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n-\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n-\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n-\t.is_removed = mlx5_is_removed,\n-\t.get_module_info = mlx5_get_module_info,\n-\t.get_module_eeprom = mlx5_get_module_eeprom,\n-\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n-\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n-\t.hairpin_bind = mlx5_hairpin_bind,\n-\t.hairpin_unbind = mlx5_hairpin_unbind,\n-\t.hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,\n-\t.hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,\n-\t.hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,\n-\t.hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,\n-};\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex a5fc10af6f..7a8cc84aaa 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1430,6 +1430,156 @@ mlx5_dev_close(struct rte_eth_dev *dev)\n \treturn 0;\n }\n \n+const struct eth_dev_ops mlx5_dev_ops = {\n+\t.dev_configure = mlx5_dev_configure,\n+\t.dev_start = mlx5_dev_start,\n+\t.dev_stop = mlx5_dev_stop,\n+\t.dev_set_link_down = mlx5_set_link_down,\n+\t.dev_set_link_up = mlx5_set_link_up,\n+\t.dev_close = mlx5_dev_close,\n+\t.promiscuous_enable = mlx5_promiscuous_enable,\n+\t.promiscuous_disable = mlx5_promiscuous_disable,\n+\t.allmulticast_enable = mlx5_allmulticast_enable,\n+\t.allmulticast_disable = mlx5_allmulticast_disable,\n+\t.link_update = mlx5_link_update,\n+\t.stats_get = mlx5_stats_get,\n+\t.stats_reset = mlx5_stats_reset,\n+\t.xstats_get = mlx5_xstats_get,\n+\t.xstats_reset = mlx5_xstats_reset,\n+\t.xstats_get_names = mlx5_xstats_get_names,\n+\t.fw_version_get = mlx5_fw_version_get,\n+\t.dev_infos_get = mlx5_dev_infos_get,\n+\t.read_clock = mlx5_txpp_read_clock,\n+\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n+\t.vlan_filter_set = mlx5_vlan_filter_set,\n+\t.rx_queue_setup = mlx5_rx_queue_setup,\n+\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n+\t.tx_queue_setup = mlx5_tx_queue_setup,\n+\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n+\t.rx_queue_release = mlx5_rx_queue_release,\n+\t.tx_queue_release = mlx5_tx_queue_release,\n+\t.rx_queue_start = mlx5_rx_queue_start,\n+\t.rx_queue_stop = mlx5_rx_queue_stop,\n+\t.tx_queue_start = mlx5_tx_queue_start,\n+\t.tx_queue_stop = mlx5_tx_queue_stop,\n+\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n+\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n+\t.mac_addr_remove = mlx5_mac_addr_remove,\n+\t.mac_addr_add = mlx5_mac_addr_add,\n+\t.mac_addr_set = mlx5_mac_addr_set,\n+\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n+\t.mtu_set = mlx5_dev_set_mtu,\n+\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n+\t.vlan_offload_set = mlx5_vlan_offload_set,\n+\t.reta_update = mlx5_dev_rss_reta_update,\n+\t.reta_query = mlx5_dev_rss_reta_query,\n+\t.rss_hash_update = mlx5_rss_hash_update,\n+\t.rss_hash_conf_get = mlx5_rss_hash_conf_get,\n+\t.filter_ctrl = mlx5_dev_filter_ctrl,\n+\t.rxq_info_get = mlx5_rxq_info_get,\n+\t.txq_info_get = mlx5_txq_info_get,\n+\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n+\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n+\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n+\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n+\t.is_removed = mlx5_is_removed,\n+\t.udp_tunnel_port_add = mlx5_udp_tunnel_port_add,\n+\t.get_module_info = mlx5_get_module_info,\n+\t.get_module_eeprom = mlx5_get_module_eeprom,\n+\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n+\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n+\t.hairpin_bind = mlx5_hairpin_bind,\n+\t.hairpin_unbind = mlx5_hairpin_unbind,\n+\t.hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,\n+\t.hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,\n+\t.hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,\n+\t.hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,\n+};\n+\n+/* Available operations from secondary process. */\n+const struct eth_dev_ops mlx5_dev_sec_ops = {\n+\t.stats_get = mlx5_stats_get,\n+\t.stats_reset = mlx5_stats_reset,\n+\t.xstats_get = mlx5_xstats_get,\n+\t.xstats_reset = mlx5_xstats_reset,\n+\t.xstats_get_names = mlx5_xstats_get_names,\n+\t.fw_version_get = mlx5_fw_version_get,\n+\t.dev_infos_get = mlx5_dev_infos_get,\n+\t.read_clock = mlx5_txpp_read_clock,\n+\t.rx_queue_start = mlx5_rx_queue_start,\n+\t.rx_queue_stop = mlx5_rx_queue_stop,\n+\t.tx_queue_start = mlx5_tx_queue_start,\n+\t.tx_queue_stop = mlx5_tx_queue_stop,\n+\t.rxq_info_get = mlx5_rxq_info_get,\n+\t.txq_info_get = mlx5_txq_info_get,\n+\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n+\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n+\t.get_module_info = mlx5_get_module_info,\n+\t.get_module_eeprom = mlx5_get_module_eeprom,\n+};\n+\n+/* Available operations in flow isolated mode. */\n+const struct eth_dev_ops mlx5_dev_ops_isolate = {\n+\t.dev_configure = mlx5_dev_configure,\n+\t.dev_start = mlx5_dev_start,\n+\t.dev_stop = mlx5_dev_stop,\n+\t.dev_set_link_down = mlx5_set_link_down,\n+\t.dev_set_link_up = mlx5_set_link_up,\n+\t.dev_close = mlx5_dev_close,\n+\t.promiscuous_enable = mlx5_promiscuous_enable,\n+\t.promiscuous_disable = mlx5_promiscuous_disable,\n+\t.allmulticast_enable = mlx5_allmulticast_enable,\n+\t.allmulticast_disable = mlx5_allmulticast_disable,\n+\t.link_update = mlx5_link_update,\n+\t.stats_get = mlx5_stats_get,\n+\t.stats_reset = mlx5_stats_reset,\n+\t.xstats_get = mlx5_xstats_get,\n+\t.xstats_reset = mlx5_xstats_reset,\n+\t.xstats_get_names = mlx5_xstats_get_names,\n+\t.fw_version_get = mlx5_fw_version_get,\n+\t.dev_infos_get = mlx5_dev_infos_get,\n+\t.read_clock = mlx5_txpp_read_clock,\n+\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n+\t.vlan_filter_set = mlx5_vlan_filter_set,\n+\t.rx_queue_setup = mlx5_rx_queue_setup,\n+\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n+\t.tx_queue_setup = mlx5_tx_queue_setup,\n+\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n+\t.rx_queue_release = mlx5_rx_queue_release,\n+\t.tx_queue_release = mlx5_tx_queue_release,\n+\t.rx_queue_start = mlx5_rx_queue_start,\n+\t.rx_queue_stop = mlx5_rx_queue_stop,\n+\t.tx_queue_start = mlx5_tx_queue_start,\n+\t.tx_queue_stop = mlx5_tx_queue_stop,\n+\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n+\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n+\t.mac_addr_remove = mlx5_mac_addr_remove,\n+\t.mac_addr_add = mlx5_mac_addr_add,\n+\t.mac_addr_set = mlx5_mac_addr_set,\n+\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n+\t.mtu_set = mlx5_dev_set_mtu,\n+\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n+\t.vlan_offload_set = mlx5_vlan_offload_set,\n+\t.filter_ctrl = mlx5_dev_filter_ctrl,\n+\t.rxq_info_get = mlx5_rxq_info_get,\n+\t.txq_info_get = mlx5_txq_info_get,\n+\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n+\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n+\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n+\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n+\t.is_removed = mlx5_is_removed,\n+\t.get_module_info = mlx5_get_module_info,\n+\t.get_module_eeprom = mlx5_get_module_eeprom,\n+\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n+\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n+\t.hairpin_bind = mlx5_hairpin_bind,\n+\t.hairpin_unbind = mlx5_hairpin_unbind,\n+\t.hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,\n+\t.hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,\n+\t.hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,\n+\t.hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,\n+};\n+\n /**\n * Verify and store value for device argument.\n *\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 2fbeb9112d..0cb907c599 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -140,9 +140,9 @@ struct mlx5_local_data {\n extern struct mlx5_shared_data *mlx5_shared_data;\n \n /* Dev ops structs */\n-extern const struct eth_dev_ops mlx5_os_dev_ops;\n-extern const struct eth_dev_ops mlx5_os_dev_sec_ops;\n-extern const struct eth_dev_ops mlx5_os_dev_ops_isolate;\n+extern const struct eth_dev_ops mlx5_dev_ops;\n+extern const struct eth_dev_ops mlx5_dev_sec_ops;\n+extern const struct eth_dev_ops mlx5_dev_ops_isolate;\n \n struct mlx5_counter_ctrl {\n \t/* Name of the counter. */\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 4035090cbb..b1c061a3f0 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -6135,9 +6135,9 @@ mlx5_flow_isolate(struct rte_eth_dev *dev,\n \t}\n \tpriv->isolated = !!enable;\n \tif (enable)\n-\t\tdev->dev_ops = &mlx5_os_dev_ops_isolate;\n+\t\tdev->dev_ops = &mlx5_dev_ops_isolate;\n \telse\n-\t\tdev->dev_ops = &mlx5_os_dev_ops;\n+\t\tdev->dev_ops = &mlx5_dev_ops;\n \n \tdev->rx_descriptor_status = mlx5_rx_descriptor_status;\n \tdev->tx_descriptor_status = mlx5_tx_descriptor_status;\ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex b426cb1e4e..6db02d70e9 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -571,7 +571,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t/* Initialize burst functions to prevent crashes before link-up. */\n \teth_dev->rx_pkt_burst = removed_rx_burst;\n \teth_dev->tx_pkt_burst = removed_tx_burst;\n-\teth_dev->dev_ops = &mlx5_os_dev_ops;\n+\teth_dev->dev_ops = &mlx5_dev_ops;\n \teth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;\n \teth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;\n \teth_dev->rx_queue_count = mlx5_rx_queue_count;\n@@ -1156,111 +1156,3 @@ mlx5_os_get_pdn(void *pd, uint32_t *pdn)\n }\n \n const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};\n-\n-const struct eth_dev_ops mlx5_os_dev_ops = {\n-\t.dev_configure = mlx5_dev_configure,\n-\t.dev_start = mlx5_dev_start,\n-\t.dev_stop = mlx5_dev_stop,\n-\t.dev_close = mlx5_dev_close,\n-\t.mtu_set = mlx5_dev_set_mtu,\n-\t.link_update = mlx5_link_update,\n-\t.stats_get = mlx5_stats_get,\n-\t.stats_reset = mlx5_stats_reset,\n-\t.dev_infos_get = mlx5_dev_infos_get,\n-\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n-\t.promiscuous_enable = mlx5_promiscuous_enable,\n-\t.promiscuous_disable = mlx5_promiscuous_disable,\n-\t.allmulticast_enable = mlx5_allmulticast_enable,\n-\t.allmulticast_disable = mlx5_allmulticast_disable,\n-\t.xstats_get = mlx5_xstats_get,\n-\t.xstats_reset = mlx5_xstats_reset,\n-\t.xstats_get_names = mlx5_xstats_get_names,\n-\t.fw_version_get = mlx5_fw_version_get,\n-\t.read_clock = mlx5_read_clock,\n-\t.vlan_filter_set = mlx5_vlan_filter_set,\n-\t.rx_queue_setup = mlx5_rx_queue_setup,\n-\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n-\t.tx_queue_setup = mlx5_tx_queue_setup,\n-\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n-\t.rx_queue_release = mlx5_rx_queue_release,\n-\t.tx_queue_release = mlx5_tx_queue_release,\n-\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n-\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n-\t.mac_addr_remove = mlx5_mac_addr_remove,\n-\t.mac_addr_add = mlx5_mac_addr_add,\n-\t.mac_addr_set = mlx5_mac_addr_set,\n-\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n-\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n-\t.vlan_offload_set = mlx5_vlan_offload_set,\n-\t.reta_update = mlx5_dev_rss_reta_update,\n-\t.reta_query = mlx5_dev_rss_reta_query,\n-\t.rss_hash_update = mlx5_rss_hash_update,\n-\t.rss_hash_conf_get = mlx5_rss_hash_conf_get,\n-\t.filter_ctrl = mlx5_dev_filter_ctrl,\n-\t.rxq_info_get = mlx5_rxq_info_get,\n-\t.txq_info_get = mlx5_txq_info_get,\n-\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n-\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n-\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n-\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n-\t.is_removed = mlx5_is_removed,\n-\t.udp_tunnel_port_add = mlx5_udp_tunnel_port_add,\n-\t.get_module_info = mlx5_get_module_info,\n-\t.get_module_eeprom = mlx5_get_module_eeprom,\n-\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n-\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n-};\n-\n-/* Available operations from secondary process. */\n-const struct eth_dev_ops mlx5_os_dev_sec_ops = {0};\n-\n-/* Available operations in flow isolated mode. */\n-const struct eth_dev_ops mlx5_os_dev_ops_isolate = {\n-\t.dev_configure = mlx5_dev_configure,\n-\t.dev_start = mlx5_dev_start,\n-\t.dev_stop = mlx5_dev_stop,\n-\t.dev_close = mlx5_dev_close,\n-\t.mtu_set = mlx5_dev_set_mtu,\n-\t.link_update = mlx5_link_update,\n-\t.stats_get = mlx5_stats_get,\n-\t.stats_reset = mlx5_stats_reset,\n-\t.dev_infos_get = mlx5_dev_infos_get,\n-\t.dev_set_link_down = mlx5_set_link_down,\n-\t.dev_set_link_up = mlx5_set_link_up,\n-\t.promiscuous_enable = mlx5_promiscuous_enable,\n-\t.promiscuous_disable = mlx5_promiscuous_disable,\n-\t.allmulticast_enable = mlx5_allmulticast_enable,\n-\t.allmulticast_disable = mlx5_allmulticast_disable,\n-\t.xstats_get = mlx5_xstats_get,\n-\t.xstats_reset = mlx5_xstats_reset,\n-\t.xstats_get_names = mlx5_xstats_get_names,\n-\t.fw_version_get = mlx5_fw_version_get,\n-\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n-\t.vlan_filter_set = mlx5_vlan_filter_set,\n-\t.rx_queue_setup = mlx5_rx_queue_setup,\n-\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n-\t.tx_queue_setup = mlx5_tx_queue_setup,\n-\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n-\t.rx_queue_release = mlx5_rx_queue_release,\n-\t.tx_queue_release = mlx5_tx_queue_release,\n-\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n-\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n-\t.mac_addr_remove = mlx5_mac_addr_remove,\n-\t.mac_addr_add = mlx5_mac_addr_add,\n-\t.mac_addr_set = mlx5_mac_addr_set,\n-\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n-\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n-\t.vlan_offload_set = mlx5_vlan_offload_set,\n-\t.filter_ctrl = mlx5_dev_filter_ctrl,\n-\t.rxq_info_get = mlx5_rxq_info_get,\n-\t.txq_info_get = mlx5_txq_info_get,\n-\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n-\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n-\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n-\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n-\t.is_removed = mlx5_is_removed,\n-\t.get_module_info = mlx5_get_module_info,\n-\t.get_module_eeprom = mlx5_get_module_eeprom,\n-\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n-\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n-};\n", "prefixes": [ "v2", "29/35" ] }