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{
    "id": 85820,
    "url": "https://patches.dpdk.org/api/patches/85820/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201228123302.3608-12-talshn@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201228123302.3608-12-talshn@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201228123302.3608-12-talshn@nvidia.com",
    "date": "2020-12-28T12:32:38",
    "name": "[v2,11/35] net/mlx5/windows: support read clock",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "489c27501f8299c4b76a3b6593565b0877157a9c",
    "submitter": {
        "id": 1893,
        "url": "https://patches.dpdk.org/api/people/1893/?format=api",
        "name": "Tal Shnaiderman",
        "email": "talshn@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "https://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201228123302.3608-12-talshn@nvidia.com/mbox/",
    "series": [
        {
            "id": 14482,
            "url": "https://patches.dpdk.org/api/series/14482/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14482",
            "date": "2020-12-28T12:32:28",
            "name": "mlx5 Windows support - part #6",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/14482/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/85820/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/85820/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6B022A09FF;\n\tMon, 28 Dec 2020 13:37:33 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 672B4CABF;\n\tMon, 28 Dec 2020 13:33:57 +0100 (CET)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 1E1D1CA3C\n for <dev@dpdk.org>; Mon, 28 Dec 2020 13:33:37 +0100 (CET)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n talshn@nvidia.com) with SMTP; 28 Dec 2020 14:33:33 +0200",
            "from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BSCXWnQ001295;\n Mon, 28 Dec 2020 14:33:33 +0200"
        ],
        "From": "Tal Shnaiderman <talshn@nvidia.com>",
        "To": "dev@dpdk.org",
        "Cc": "thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com,\n ophirmu@nvidia.com",
        "Date": "Mon, 28 Dec 2020 14:32:38 +0200",
        "Message-Id": "<20201228123302.3608-12-talshn@nvidia.com>",
        "X-Mailer": "git-send-email 2.16.1.windows.4",
        "In-Reply-To": "<20201228123302.3608-1-talshn@nvidia.com>",
        "References": "<20201217173037.11396-2-talshn@nvidia.com>\n <20201228123302.3608-1-talshn@nvidia.com>",
        "Subject": "[dpdk-dev] [PATCH v2 11/35] net/mlx5/windows: support read clock",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This commit adds a new glue function query_rt_values to support the new\nAPI mlx5_read_clock().\n\nSigned-off-by: Tal Shnaiderman <talshn@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h             |  1 +\n drivers/common/mlx5/windows/mlx5_glue.c    | 26 ++++++++++++++++++++++++++\n drivers/common/mlx5/windows/mlx5_glue.h    |  1 +\n drivers/common/mlx5/windows/mlx5_win_ext.h |  6 ++++++\n drivers/net/mlx5/windows/mlx5_ethdev_os.c  | 30 ++++++++++++++++++++++++++++++\n 5 files changed, 64 insertions(+)",
    "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex d62d2558eb..ac42238d30 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -594,6 +594,7 @@ struct mlx5_modification_cmd {\n \t};\n };\n \n+typedef uint64_t u64;\n typedef uint32_t u32;\n typedef uint16_t u16;\n typedef uint8_t u8;\ndiff --git a/drivers/common/mlx5/windows/mlx5_glue.c b/drivers/common/mlx5/windows/mlx5_glue.c\nindex 3896cf0932..167531823b 100644\n--- a/drivers/common/mlx5/windows/mlx5_glue.c\n+++ b/drivers/common/mlx5/windows/mlx5_glue.c\n@@ -283,6 +283,31 @@ mlx5_glue_devx_fs_rule_del(void *flow)\n \treturn devx_fs_rule_del(flow);\n }\n \n+static int\n+mlx5_glue_query_rt_values(void *ctx, void *devx_clock)\n+{\n+\tstruct mlx5_context *mlx5_ctx;\n+\tstruct mlx5_devx_clock *clock;\n+\tint err;\n+\n+\tif (!ctx) {\n+\t\terrno = EINVAL;\n+\t\treturn errno;\n+\t}\n+\tmlx5_ctx = (struct mlx5_context *)ctx;\n+\tclock = (struct mlx5_devx_clock *)devx_clock;\n+\terr = devx_hca_clock_query(\n+\t\t\tmlx5_ctx->devx_ctx,\n+\t\t\t&clock->p_iseg_internal_timer,\n+\t\t\t&clock->clock_frequency_hz,\n+\t\t\t&clock->is_stable_clock_frequency);\n+\tif (err) {\n+\t\terrno = err;\n+\t\treturn errno;\n+\t}\n+\treturn 0;\n+}\n+\n alignas(RTE_CACHE_LINE_SIZE)\n const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){\n \t.version = MLX5_GLUE_VERSION,\n@@ -304,4 +329,5 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){\n \t.devx_fs_rule_add = mlx5_glue_devx_fs_rule_add,\n \t.devx_fs_rule_del = mlx5_glue_devx_fs_rule_del,\n \t.devx_query_eqn = mlx5_glue_devx_query_eqn,\n+\t.query_rt_values = mlx5_glue_query_rt_values,\n };\ndiff --git a/drivers/common/mlx5/windows/mlx5_glue.h b/drivers/common/mlx5/windows/mlx5_glue.h\nindex f2261ec7ac..bfaaa2a493 100644\n--- a/drivers/common/mlx5/windows/mlx5_glue.h\n+++ b/drivers/common/mlx5/windows/mlx5_glue.h\n@@ -51,6 +51,7 @@ struct mlx5_glue {\n \tvoid *(*devx_fs_rule_add)(void *ctx, void *in, uint32_t inlen);\n \tint (*devx_fs_rule_del)(void *flow);\n \tint (*devx_query_eqn)(void *context, uint32_t cpus, uint32_t *eqn);\n+\tint (*query_rt_values)(void *ctx, void *devx_clock);\n };\n \n extern const struct mlx5_glue *mlx5_glue;\ndiff --git a/drivers/common/mlx5/windows/mlx5_win_ext.h b/drivers/common/mlx5/windows/mlx5_win_ext.h\nindex 8e697b30c1..a14a6ccc3d 100644\n--- a/drivers/common/mlx5/windows/mlx5_win_ext.h\n+++ b/drivers/common/mlx5/windows/mlx5_win_ext.h\n@@ -34,6 +34,12 @@ struct mlx5_pd {\n \tdevx_device_ctx        *devx_ctx;\n };\n \n+struct mlx5_devx_clock {\n+\tvoid *p_iseg_internal_timer;\n+\tu64 clock_frequency_hz;\n+\tint is_stable_clock_frequency;\n+};\n+\n #define GET_DEVX_CTX(ctx) (((mlx5_context_st *)ctx)->devx_ctx)\n #define GET_OBJ_CTX(obj)  (((mlx5_devx_obj_st *)obj)->devx_ctx)\n \ndiff --git a/drivers/net/mlx5/windows/mlx5_ethdev_os.c b/drivers/net/mlx5/windows/mlx5_ethdev_os.c\nindex c99eac9868..1b68a7b6e8 100644\n--- a/drivers/net/mlx5/windows/mlx5_ethdev_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_ethdev_os.c\n@@ -14,6 +14,7 @@\n #include <mlx5_win_ext.h>\n #include <mlx5_malloc.h>\n #include <mlx5.h>\n+#include <mlx5_utils.h>\n \n /**\n  * Get MAC address by querying netdevice.\n@@ -284,3 +285,32 @@ int mlx5_get_module_eeprom(struct rte_eth_dev *dev,\n \tRTE_SET_USED(info);\n \treturn -ENOTSUP;\n }\n+\n+/**\n+ * Get device current raw clock counter\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param[out] time\n+ *   Current raw clock counter of the device.\n+ *\n+ * @return\n+ *   0 if the clock has correctly been read\n+ *   The value of errno in case of error\n+ */\n+int\n+mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock)\n+{\n+\tint err;\n+\tstruct mlx5_devx_clock mlx5_clock;\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tmlx5_context_st *context_obj = (mlx5_context_st *)priv->sh->ctx;\n+\n+\terr = mlx5_glue->query_rt_values(context_obj, &mlx5_clock);\n+\tif (err != 0) {\n+\t\tDRV_LOG(WARNING, \"Could not query the clock\");\n+\t\treturn err;\n+\t}\n+\t*clock = *(uint64_t volatile *)mlx5_clock.p_iseg_internal_timer;\n+\treturn 0;\n+}\n",
    "prefixes": [
        "v2",
        "11/35"
    ]
}