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GET /api/patches/85514/?format=api
{ "id": 85514, "url": "https://patches.dpdk.org/api/patches/85514/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201220052430.99990-5-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201220052430.99990-5-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201220052430.99990-5-ajit.khaparde@broadcom.com", "date": "2020-12-20T05:24:28", "name": "[4/6] net/bnxt: add LRO support for SR2 chip", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "63a1bd2626f42e5b8942a3317dbfcc1ea042f3cc", "submitter": { "id": 2064, "url": "https://patches.dpdk.org/api/people/2064/?format=api", "name": "Ajit Khaparde", "email": "ajitkhaparde@gmail.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201220052430.99990-5-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 14388, "url": "https://patches.dpdk.org/api/series/14388/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14388", "date": "2020-12-20T05:24:24", "name": "net/bnxt: add support for Stingray2", "version": 1, "mbox": "https://patches.dpdk.org/series/14388/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/85514/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/85514/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0C2E3A052A;\n\tSun, 20 Dec 2020 06:25:54 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3B9D6CBAB;\n\tSun, 20 Dec 2020 06:24:47 +0100 (CET)", "from mail-pg1-f179.google.com (mail-pg1-f179.google.com\n [209.85.215.179]) by dpdk.org (Postfix) with ESMTP id 2AA95CB79\n for <dev@dpdk.org>; Sun, 20 Dec 2020 06:24:42 +0100 (CET)", "by mail-pg1-f179.google.com with SMTP id n10so4279556pgl.10\n for <dev@dpdk.org>; Sat, 19 Dec 2020 21:24:42 -0800 (PST)", "from localhost.localdomain ([192.19.223.252])\n by smtp.gmail.com with ESMTPSA id b11sm12936544pfr.38.2020.12.19.21.24.39\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Sat, 19 Dec 2020 21:24:39 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=0maMfO4D/YWy1In3qE1QEmdvygAB0mx5Z081HoTJe18=;\n b=rV6usz/258H6A9u1XA3TUIpzM1amqo1FldO7eB0b+megJqZoqAalzs/ETKQFGmUK3X\n aGMWro/mEtHRcgzPxBcbgUIizpErCw+1tlYlOSAmNnRmLKDVfAeHb8wBDzlGm2TDAbk9\n vy7UmsD4ilF0tOJPxR2MypNGBLbhPEMHzL25Yk/lEeZKULqWDcwDkThAa6fgtfsP9Tra\n 8nRZaUM/D4homLMArtbI6KxFbjpZGlZsGqXbX1yQkq+vZELhRwfLEz+BvMF7wHmRtc4P\n COEGpuJuJXqpmo/rxz0qbRqFKMNBpvoRfCJyrdI7FFoEablfwKxCZM5ezjs5CeAVLnu7\n RTzA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=0maMfO4D/YWy1In3qE1QEmdvygAB0mx5Z081HoTJe18=;\n b=dbNe/JE3rDBqf70s9fSZSatzaVbo1sBcfF4m0zmgRznsgD5eTaoANypm1SoTiCHw9s\n P0wDvknbsZ8pCwnWWcfE7cr3sZuU68KzEXRbmK5naJ44agVHV23+/zgb0K/zRUX16AH6\n mTEjON1qW9o4iQkiXiT4LUmDISTlLvmPIbi1A/kfxtwmnskeejf9/huIrfBG0fELSUf+\n ddIiItDFggRM6uIABlNwcD7xRFYtF1srF0Az/deWF+ny8kvqvc1b/gr9HS5j5ZoLzvi4\n QFL71haErPRh1cIGmUe4b+EABXcgiKNcjfsXpvwudbQwZJy3ySncfLDRlSI14ukaGvn8\n z3SA==", "X-Gm-Message-State": "AOAM530aAy8yeMxHEpHrMSLOHHV7GGdmX2iLy4JQzVjw2Uw2IOnYZFrF\n IV5xtXr1zZ4hxjLmgJvGCKISj8mVeI0msg==", "X-Google-Smtp-Source": "\n ABdhPJzRO9dvONblHvSxaV9NYim3yKGAsqYUFguExv+6+exByN+lN55G2VNEII0SCCyLkC9iLvZI4g==", "X-Received": "by 2002:a62:e818:0:b029:19e:31e6:e639 with SMTP id\n c24-20020a62e8180000b029019e31e6e639mr10295210pfi.81.1608441880113;\n Sat, 19 Dec 2020 21:24:40 -0800 (PST)", "From": "Ajit Khaparde <ajitkhaparde@gmail.com>", "X-Google-Original-From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Kalesh AP <kalesh-anakkur.purayil@broadcom.com>", "Date": "Sat, 19 Dec 2020 21:24:28 -0800", "Message-Id": "<20201220052430.99990-5-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.21.1 (Apple Git-122.3)", "In-Reply-To": "<20201220052430.99990-1-ajit.khaparde@broadcom.com>", "References": "<20201220052430.99990-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 4/6] net/bnxt: add LRO support for SR2 chip", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\n\nAdd the new chip specific TPA v2 logic to bnxt_tpa_start() to fully support\nTPA on the new chip.\n\nSigned-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/bnxt_rxr.c | 72 +++++++++++++++++++++++++++++++------\n drivers/net/bnxt/bnxt_rxr.h | 12 ++++++-\n 2 files changed, 72 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c\nindex 288b403bf..96e995029 100644\n--- a/drivers/net/bnxt/bnxt_rxr.c\n+++ b/drivers/net/bnxt/bnxt_rxr.c\n@@ -134,6 +134,53 @@ struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,\n \treturn mbuf;\n }\n \n+static void bnxt_tpa_get_metadata(struct bnxt *bp,\n+\t\t\t\t struct bnxt_tpa_info *tpa_info,\n+\t\t\t\t struct rx_tpa_start_cmpl *tpa_start,\n+\t\t\t\t struct rx_tpa_start_cmpl_hi *tpa_start1)\n+{\n+\ttpa_info->cfa_code_valid = 0;\n+\ttpa_info->vlan_valid = 0;\n+\ttpa_info->hash_valid = 0;\n+\ttpa_info->l4_csum_valid = 0;\n+\n+\tif (likely(tpa_start->flags_type &\n+\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {\n+\t\ttpa_info->hash_valid = 1;\n+\t\ttpa_info->rss_hash = rte_le_to_cpu_32(tpa_start->rss_hash);\n+\t}\n+\n+\tif (bp->vnic_cap_flags & BNXT_VNIC_CAP_RX_CMPL_V2) {\n+\t\tstruct rx_tpa_start_v2_cmpl *v2_tpa_start = (void *)tpa_start;\n+\t\tstruct rx_tpa_start_v2_cmpl_hi *v2_tpa_start1 =\n+\t\t\t(void *)tpa_start1;\n+\n+\t\tif (v2_tpa_start->agg_id &\n+\t\t RX_TPA_START_V2_CMPL_METADATA1_VALID) {\n+\t\t\ttpa_info->vlan_valid = 1;\n+\t\t\ttpa_info->vlan =\n+\t\t\t\trte_le_to_cpu_16(v2_tpa_start1->metadata0);\n+\t\t}\n+\n+\t\tif (v2_tpa_start1->flags2 & RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK)\n+\t\t\ttpa_info->l4_csum_valid = 1;\n+\n+\t\treturn;\n+\t}\n+\n+\ttpa_info->cfa_code_valid = 1;\n+\ttpa_info->cfa_code = rte_le_to_cpu_16(tpa_start1->cfa_code);\n+\tif (tpa_start1->flags2 &\n+\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {\n+\t\ttpa_info->vlan_valid = 1;\n+\t\ttpa_info->vlan = rte_le_to_cpu_32(tpa_start1->metadata);\n+\t}\n+\n+\tif (likely(tpa_start1->flags2 &\n+\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))\n+\t\ttpa_info->l4_csum_valid = 1;\n+}\n+\n static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,\n \t\t\t struct rx_tpa_start_cmpl *tpa_start,\n \t\t\t struct rx_tpa_start_cmpl_hi *tpa_start1)\n@@ -164,21 +211,23 @@ static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,\n \tmbuf->data_len = mbuf->pkt_len;\n \tmbuf->port = rxq->port_id;\n \tmbuf->ol_flags = PKT_RX_LRO;\n-\tif (likely(tpa_start->flags_type &\n-\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {\n-\t\tmbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);\n+\n+\tbnxt_tpa_get_metadata(rxq->bp, tpa_info, tpa_start, tpa_start1);\n+\n+\tif (likely(tpa_info->hash_valid)) {\n+\t\tmbuf->hash.rss = tpa_info->rss_hash;\n \t\tmbuf->ol_flags |= PKT_RX_RSS_HASH;\n-\t} else {\n-\t\tmbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);\n+\t} else if (tpa_info->cfa_code_valid) {\n+\t\tmbuf->hash.fdir.id = tpa_info->cfa_code;\n \t\tmbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;\n \t}\n-\tif (tpa_start1->flags2 &\n-\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {\n-\t\tmbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);\n+\n+\tif (tpa_info->vlan_valid) {\n+\t\tmbuf->vlan_tci = tpa_info->vlan;\n \t\tmbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;\n \t}\n-\tif (likely(tpa_start1->flags2 &\n-\t\t rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))\n+\n+\tif (likely(tpa_info->l4_csum_valid))\n \t\tmbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;\n \n \t/* recycle next mbuf */\n@@ -712,7 +761,8 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,\n \t\t\t\tcpr->cp_ring_struct->ring_mask,\n \t\t\t\tcpr->valid);\n \n-\tif (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {\n+\tif (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START ||\n+\t cmp_type == RX_TPA_START_V2_CMPL_TYPE_RX_TPA_START_V2) {\n \t\tbnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,\n \t\t\t (struct rx_tpa_start_cmpl_hi *)rxcmp1);\n \t\trc = -EINVAL; /* Continue w/o new mbuf */\ndiff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h\nindex af6ff0972..7ca7e39e5 100644\n--- a/drivers/net/bnxt/bnxt_rxr.h\n+++ b/drivers/net/bnxt/bnxt_rxr.h\n@@ -47,6 +47,14 @@ struct bnxt_tpa_info {\n \tuint16_t\t\t\tlen;\n \tuint32_t\t\t\tagg_count;\n \tstruct rx_tpa_v2_abuf_cmpl\tagg_arr[TPA_MAX_NUM_SEGS];\n+\n+\tuint32_t rss_hash;\n+\tuint32_t vlan;\n+\tuint16_t cfa_code;\n+\tuint8_t hash_valid:1;\n+\tuint8_t vlan_valid:1;\n+\tuint8_t cfa_code_valid:1;\n+\tuint8_t l4_csum_valid:1;\n };\n \n struct bnxt_rx_ring_info {\n@@ -122,4 +130,6 @@ extern uint32_t bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];\n \n #define BNXT_OL_FLAGS_ERR_TBL_DIM 16\n extern uint32_t bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];\n-#endif\n+\n+#define RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK\t(0x1 << 14)\n+#endif /* _BNXT_RXR_H_ */\n", "prefixes": [ "4/6" ] }