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GET /api/patches/85511/?format=api
{ "id": 85511, "url": "https://patches.dpdk.org/api/patches/85511/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201220052430.99990-2-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201220052430.99990-2-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201220052430.99990-2-ajit.khaparde@broadcom.com", "date": "2020-12-20T05:24:25", "name": "[1/6] net/bnxt: add support for 58818 chip family", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "42b1f7865108bd9baca1a35f1b54e98d07f0dd36", "submitter": { "id": 2064, "url": "https://patches.dpdk.org/api/people/2064/?format=api", "name": "Ajit Khaparde", "email": "ajitkhaparde@gmail.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201220052430.99990-2-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 14388, "url": "https://patches.dpdk.org/api/series/14388/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14388", "date": "2020-12-20T05:24:24", "name": "net/bnxt: add support for Stingray2", "version": 1, "mbox": "https://patches.dpdk.org/series/14388/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/85511/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/85511/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E5E39A052A;\n\tSun, 20 Dec 2020 06:24:57 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 26F19CB69;\n\tSun, 20 Dec 2020 06:24:42 +0100 (CET)", "from mail-pg1-f178.google.com (mail-pg1-f178.google.com\n [209.85.215.178]) by dpdk.org (Postfix) with ESMTP id 377D1CB05\n for <dev@dpdk.org>; Sun, 20 Dec 2020 06:24:38 +0100 (CET)", "by mail-pg1-f178.google.com with SMTP id g18so4306523pgk.1\n for <dev@dpdk.org>; Sat, 19 Dec 2020 21:24:38 -0800 (PST)", "from localhost.localdomain ([192.19.223.252])\n by smtp.gmail.com with ESMTPSA id b11sm12936544pfr.38.2020.12.19.21.24.34\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Sat, 19 Dec 2020 21:24:35 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=t00ciUeLmDRLnh0eWbNkBVwLz9vx73pniRCf6VcobxE=;\n b=pUNWMhi3FYQTtqAUbBp8vT6wQf50i0DqjTr7unQn8drr4gMOoQDbxKZfe4Od0YNrW9\n UgOBlnDNBhUxVF8qaupN5+AmBF8XNebXMy43RcFgbXey2hp5zEjZPIi4R+Mntg1VspM0\n ldsuZF70NL4ZhXhJ76eaDY76KS4xsCz2wv3uhAbhwOnlQAam0Ye1YYPgfJAH/Yy6+bP1\n 1UIA40RRXSF7EFcTT/3GAuEb8C9xL/5F6vX4RxQpeuXhRd9FohDEuRKVB+mvBeuBVVEA\n J6OebXmv34r9LJ6BxHU9x0cpW5S6KDXjAHSgfC72PkZduKqUMLPbeof/RcLDRLm4cBx/\n rHsg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=t00ciUeLmDRLnh0eWbNkBVwLz9vx73pniRCf6VcobxE=;\n b=cFcbsToABvOHvgvRqwCDlHkxLAUIF1iHiDSJqy9pVNZOv8xMAcU0nAEXOYSq7e+Unl\n zwwxtLIa7A4yh4AsLa5sJWz0jQ0dijmczqLbIvhIySWrPPjzw7p2qhBK1XmDAXn4/jGD\n dmC3G3oukY2srj1/etbC5aOjdRvpsgGI9QIthYz6J9tZ9FAS1WuofBiLElPWuwj41ABf\n 6diCyjjzx8B2/xt68CsdqEbFlLWwhBPFoQPiCx/Ibk0FUV0XpDPHvCqys+5fZY3dZ6bi\n T8YjDYlxrexOPw3RferA9wK4kLbTNVmMrG1/MA4HztP3k/YOYfxL/NVgHAyTnSNdHrjk\n t5gQ==", "X-Gm-Message-State": "AOAM531GqcniL4/YuOZqKWHCDdz+5EH51BuZzl+sOJdwXX9OsS8rGRTx\n EqRjrBqAgeA0nY0NevkrvtyWTB2TJyp0Zw==", "X-Google-Smtp-Source": "\n ABdhPJwLuTD1LiQYXu6knsI3mkYzLmiocI/YrNlfX7g2jFYmRu2iCoiLRSFwg6AVOHPMx2r6GRXoCw==", "X-Received": "by 2002:a63:5124:: with SMTP id\n f36mr10259561pgb.106.1608441875924;\n Sat, 19 Dec 2020 21:24:35 -0800 (PST)", "From": "Ajit Khaparde <ajitkhaparde@gmail.com>", "X-Google-Original-From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Kalesh AP <kalesh-anakkur.purayil@broadcom.com>", "Date": "Sat, 19 Dec 2020 21:24:25 -0800", "Message-Id": "<20201220052430.99990-2-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.21.1 (Apple Git-122.3)", "In-Reply-To": "<20201220052430.99990-1-ajit.khaparde@broadcom.com>", "References": "<20201220052430.99990-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 1/6] net/bnxt: add support for 58818 chip family", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\n\nThe new chip (Stingray 2) is part of the P5 chip family with a number\nof changes:\n\n1. Implement the epoch doorbell bit for 58818 chip. With the new doorbell\n infrastructure and the unbounded index logic, now set the epoch\n doorbell bit to support proper doorbell operation on the new chip.\n Toggle epoch bit of all rings when it's wrapped to support doorbell\n overflow checking.\n2. Get the legacy doorbell size from firmware. Legacy doorbell support has\n been removed in Stingray 2. So, the fast path doorbell pages start from\n the base of the BAR. Drivers need to use legacy_l2_db_space_size_kb\n field in the hwrm_func_qcfg_output response to get the legacy doorbell\n page offset from the BAR.\n3. Set VALID doorbell bit on 58818 chip family. This class of chip has\n a valid doorbell bit added and it needs to be set.\n4. Use \"chip_num\" returned by firmware. The \"chip_num\" field in the\n HWRM_VER_GET output returns the chip number. Use this value to identify\n chip category for 58818 chip family.\n5. Added device ids for Stingray2 PF/VF devices.\n\nSigned-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n doc/guides/rel_notes/release_21_02.rst | 6 ++++++\n drivers/net/bnxt/bnxt.h | 15 +++++++++++++++\n drivers/net/bnxt/bnxt_cpr.h | 7 ++++++-\n drivers/net/bnxt/bnxt_ethdev.c | 9 +++++++++\n drivers/net/bnxt/bnxt_hwrm.c | 6 ++++++\n drivers/net/bnxt/bnxt_ring.c | 19 +++++++++++++++----\n 6 files changed, 57 insertions(+), 5 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_21_02.rst b/doc/guides/rel_notes/release_21_02.rst\nindex 706cbf8f0..b1bb2d867 100644\n--- a/doc/guides/rel_notes/release_21_02.rst\n+++ b/doc/guides/rel_notes/release_21_02.rst\n@@ -55,6 +55,12 @@ New Features\n Also, make sure to start the actual text at the margin.\n =======================================================\n \n+* **Updated Broadcom bnxt driver.**\n+\n+ Updated the Broadcom bnxt driver with fixes and improvements, including:\n+\n+ * Added support for Stingray2 device.\n+\n \n Removed Items\n -------------\ndiff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h\nindex 8374e9fad..0d3998f20 100644\n--- a/drivers/net/bnxt/bnxt.h\n+++ b/drivers/net/bnxt/bnxt.h\n@@ -66,6 +66,10 @@\n #define BROADCOM_DEV_ID_58804\t\t0xd804\n #define BROADCOM_DEV_ID_58808\t\t0x16f0\n #define BROADCOM_DEV_ID_58802_VF\t0xd800\n+#define BROADCOM_DEV_ID_58812\t\t0xd812\n+#define BROADCOM_DEV_ID_58814\t\t0xd814\n+#define BROADCOM_DEV_ID_58818\t\t0xd818\n+#define BROADCOM_DEV_ID_58818_VF\t0xd82e\n \n #define BROADCOM_DEV_957508_N2100\t0x5208\n #define IS_BNXT_DEV_957508_N2100(bp)\t\\\n@@ -367,14 +371,20 @@ struct bnxt_coal {\n };\n \n /* 64-bit doorbell */\n+#define DBR_EPOCH_MASK\t\t\t\t0x01000000UL\n+#define DBR_EPOCH_SFT\t\t\t\t24\n #define DBR_XID_SFT\t\t\t\t32\n #define DBR_PATH_L2\t\t\t\t(0x1ULL << 56)\n+#define DBR_VALID\t\t\t\t(0x1ULL << 58)\n #define DBR_TYPE_SQ\t\t\t\t(0x0ULL << 60)\n #define DBR_TYPE_SRQ\t\t\t\t(0x2ULL << 60)\n #define DBR_TYPE_CQ\t\t\t\t(0x4ULL << 60)\n #define DBR_TYPE_NQ\t\t\t\t(0xaULL << 60)\n #define DBR_TYPE_NQ_ARM\t\t\t\t(0xbULL << 60)\n \n+#define DB_PF_OFFSET\t\t\t0x10000\n+#define DB_VF_OFFSET\t\t\t0x4000\n+\n #define BNXT_RSS_TBL_SIZE_P5\t\t512U\n #define BNXT_RSS_ENTRIES_PER_CTX_P5\t64\n #define BNXT_MAX_RSS_CTXTS_P5 \\\n@@ -601,6 +611,7 @@ struct bnxt {\n \tstruct rte_eth_dev\t\t*eth_dev;\n \tstruct rte_pci_device\t\t*pdev;\n \tvoid\t\t\t\t*doorbell_base;\n+\tint\t\t\t\tlegacy_db_size;\n \n \tuint32_t\t\tflags;\n #define BNXT_FLAG_REGISTERED\t\tBIT(0)\n@@ -649,6 +660,10 @@ struct bnxt {\n #define BNXT_TRUFLOW_EN(bp)\t((bp)->flags & BNXT_FLAG_TRUFLOW_EN)\n #define BNXT_GFID_ENABLED(bp)\t((bp)->flags & BNXT_FLAG_GFID_ENABLE)\n \n+\tuint16_t\t\tchip_num;\n+#define CHIP_NUM_58818\t\t0xd818\n+#define BNXT_CHIP_SR2(bp)\t((bp)->chip_num == CHIP_NUM_58818)\n+\n \tuint32_t\t\tfw_cap;\n #define BNXT_FW_CAP_HOT_RESET\t\tBIT(0)\n #define BNXT_FW_CAP_IF_CHANGE\t\tBIT(1)\ndiff --git a/drivers/net/bnxt/bnxt_cpr.h b/drivers/net/bnxt/bnxt_cpr.h\nindex a763f6006..30635fcc1 100644\n--- a/drivers/net/bnxt/bnxt_cpr.h\n+++ b/drivers/net/bnxt/bnxt_cpr.h\n@@ -81,9 +81,14 @@ struct bnxt_db_info {\n \t};\n \tbool db_64;\n \tuint32_t\t\tdb_ring_mask;\n+\tuint32_t\t\tdb_epoch_mask;\n+\tuint32_t\t\tdb_epoch_shift;\n };\n \n-#define DB_RING_IDX(db, idx)\t((idx) & (db)->db_ring_mask)\n+#define DB_EPOCH(db, idx)\t(((idx) & (db)->db_epoch_mask) <<\t\\\n+\t\t\t\t ((db)->db_epoch_shift))\n+#define DB_RING_IDX(db, idx)\t(((idx) & (db)->db_ring_mask) |\t\t\\\n+\t\t\t\t DB_EPOCH(db, idx))\n \n struct bnxt_ring;\n struct bnxt_cp_ring_info {\ndiff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c\nindex 0788d263d..02ab87bba 100644\n--- a/drivers/net/bnxt/bnxt_ethdev.c\n+++ b/drivers/net/bnxt/bnxt_ethdev.c\n@@ -80,6 +80,10 @@ static const struct rte_pci_id bnxt_pci_id_map[] = {\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57508_MF2) },\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57504_MF2) },\n \t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57502_MF2) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58812) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58814) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58818) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58818_VF) },\n \t{ .vendor_id = 0, /* sentinel */ },\n };\n \n@@ -3979,6 +3983,7 @@ static bool bnxt_vf_pciid(uint16_t device_id)\n \tcase BROADCOM_DEV_ID_58802_VF:\n \tcase BROADCOM_DEV_ID_57500_VF1:\n \tcase BROADCOM_DEV_ID_57500_VF2:\n+\tcase BROADCOM_DEV_ID_58818_VF:\n \t\t/* FALLTHROUGH */\n \t\treturn true;\n \tdefault:\n@@ -4001,6 +4006,10 @@ static bool bnxt_p5_device(uint16_t device_id)\n \tcase BROADCOM_DEV_ID_57502_MF2:\n \tcase BROADCOM_DEV_ID_57500_VF1:\n \tcase BROADCOM_DEV_ID_57500_VF2:\n+\tcase BROADCOM_DEV_ID_58812:\n+\tcase BROADCOM_DEV_ID_58814:\n+\tcase BROADCOM_DEV_ID_58818:\n+\tcase BROADCOM_DEV_ID_58818_VF:\n \t\t/* FALLTHROUGH */\n \t\treturn true;\n \tdefault:\ndiff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c\nindex 73647fba8..36c229de1 100644\n--- a/drivers/net/bnxt/bnxt_hwrm.c\n+++ b/drivers/net/bnxt/bnxt_hwrm.c\n@@ -1129,6 +1129,9 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout)\n \t\tPMD_DRV_LOG(ERR, \"Unsupported request length\\n\");\n \t\trc = -EINVAL;\n \t}\n+\n+\tbp->chip_num = rte_le_to_cpu_16(resp->chip_num);\n+\n \tbp->max_req_len = rte_le_to_cpu_16(resp->max_req_win_len);\n \tbp->hwrm_max_ext_req_len = rte_le_to_cpu_16(resp->max_ext_req_len);\n \tif (bp->hwrm_max_ext_req_len < HWRM_MAX_REQ_LEN)\n@@ -3207,6 +3210,9 @@ int bnxt_hwrm_func_qcfg(struct bnxt *bp, uint16_t *mtu)\n \t\tbreak;\n \t}\n \n+\tbp->legacy_db_size =\n+\t\trte_le_to_cpu_16(resp->legacy_l2_db_size_kb) * 1024;\n+\n \tHWRM_UNLOCK();\n \n \treturn rc;\ndiff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c\nindex adddf9bc4..75b541bdc 100644\n--- a/drivers/net/bnxt/bnxt_ring.c\n+++ b/drivers/net/bnxt/bnxt_ring.c\n@@ -346,10 +346,7 @@ static void bnxt_set_db(struct bnxt *bp,\n \t\t\tuint32_t ring_mask)\n {\n \tif (BNXT_CHIP_P5(bp)) {\n-\t\tif (BNXT_PF(bp))\n-\t\t\tdb->doorbell = (char *)bp->doorbell_base + 0x10000;\n-\t\telse\n-\t\t\tdb->doorbell = (char *)bp->doorbell_base + 0x4000;\n+\t\tint db_offset = DB_PF_OFFSET;\n \t\tswitch (ring_type) {\n \t\tcase HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:\n \t\t\tdb->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;\n@@ -365,6 +362,14 @@ static void bnxt_set_db(struct bnxt *bp,\n \t\t\tdb->db_key64 = DBR_PATH_L2;\n \t\t\tbreak;\n \t\t}\n+\t\tif (BNXT_CHIP_SR2(bp)) {\n+\t\t\tdb->db_key64 |= DBR_VALID;\n+\t\t\tdb_offset = bp->legacy_db_size;\n+\t\t} else if (BNXT_VF(bp)) {\n+\t\t\tdb_offset = DB_VF_OFFSET;\n+\t\t}\n+\n+\t\tdb->doorbell = (char *)bp->doorbell_base + db_offset;\n \t\tdb->db_key64 |= (uint64_t)fid << DBR_XID_SFT;\n \t\tdb->db_64 = true;\n \t} else {\n@@ -383,6 +388,12 @@ static void bnxt_set_db(struct bnxt *bp,\n \t\tdb->db_64 = false;\n \t}\n \tdb->db_ring_mask = ring_mask;\n+\n+\tif (BNXT_CHIP_SR2(bp)) {\n+\t\tdb->db_epoch_mask = db->db_ring_mask + 1;\n+\t\tdb->db_epoch_shift = DBR_EPOCH_SFT -\n+\t\t\t\t\trte_log2_u32(db->db_epoch_mask);\n+\t}\n }\n \n static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,\n", "prefixes": [ "1/6" ] }