Patch Detail

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{
    "id": 85274,
    "url": "https://patches.dpdk.org/api/patches/85274/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201217085158.28367-2-orika@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201217085158.28367-2-orika@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201217085158.28367-2-orika@nvidia.com",
    "date": "2020-12-17T08:51:55",
    "name": "[1/4] regex/mlx5: fix memory rule alignment",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "b9f124558f090b6c2e0d43872f4f6e998a1cb9ba",
    "submitter": {
        "id": 1869,
        "url": "https://patches.dpdk.org/api/people/1869/?format=api",
        "name": "Ori Kam",
        "email": "orika@nvidia.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201217085158.28367-2-orika@nvidia.com/mbox/",
    "series": [
        {
            "id": 14342,
            "url": "https://patches.dpdk.org/api/series/14342/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14342",
            "date": "2020-12-17T08:51:54",
            "name": "regex/mlx5: pmd improvements",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/14342/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/85274/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/85274/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id ADE6FA09F0;\n\tThu, 17 Dec 2020 09:52:41 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B550BC9FE;\n\tThu, 17 Dec 2020 09:52:27 +0100 (CET)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 3EFEEC9FC\n for <dev@dpdk.org>; Thu, 17 Dec 2020 09:52:26 +0100 (CET)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n orika@nvidia.com) with SMTP; 17 Dec 2020 10:52:20 +0200",
            "from MTL-ORIKA.mtl.com ([172.27.14.211])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BH8qHp3015085;\n Thu, 17 Dec 2020 10:52:19 +0200"
        ],
        "From": "Ori Kam <orika@nvidia.com>",
        "To": "thomas@monjalon.net",
        "Cc": "orika@mellanox.com, dev@dpdk.org, stable@dpdk.org",
        "Date": "Thu, 17 Dec 2020 10:51:55 +0200",
        "Message-Id": "<20201217085158.28367-2-orika@nvidia.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20201217085158.28367-1-orika@nvidia.com>",
        "References": "<20201217085158.28367-1-orika@nvidia.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 1/4] regex/mlx5: fix memory rule alignment",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Due to Kernel requirement the memory allocated must be aligned to 2M.\n\nFixes: b34d816363b5 (\"regex/mlx5: support rules import\")\n\nCc: stable@dpdk.org\n\nSigned-off-by: Ori Kam <orika@nvidia.com>\n---\n drivers/regex/mlx5/mlx5_rxp.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/regex/mlx5/mlx5_rxp.c b/drivers/regex/mlx5/mlx5_rxp.c\nindex fcbc766441..bd721f0b11 100644\n--- a/drivers/regex/mlx5/mlx5_rxp.c\n+++ b/drivers/regex/mlx5/mlx5_rxp.c\n@@ -892,7 +892,7 @@ rxp_db_setup(struct mlx5_regex_priv *priv)\n \n \t/* Setup database memories for both RXP engines + reprogram memory. */\n \tfor (i = 0; i < (priv->nb_engines + MLX5_RXP_EM_COUNT); i++) {\n-\t\tpriv->db[i].ptr = rte_malloc(\"\", MLX5_MAX_DB_SIZE, 0);\n+\t\tpriv->db[i].ptr = rte_malloc(\"\", MLX5_MAX_DB_SIZE, 1 << 21);\n \t\tif (!priv->db[i].ptr) {\n \t\t\tDRV_LOG(ERR, \"Failed to alloc db memory!\");\n \t\t\tret = ENODEV;\n",
    "prefixes": [
        "1/4"
    ]
}