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GET /api/patches/85165/?format=api
{ "id": 85165, "url": "https://patches.dpdk.org/api/patches/85165/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201215060519.302145-9-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201215060519.302145-9-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201215060519.302145-9-qi.z.zhang@intel.com", "date": "2020-12-15T06:05:00", "name": "[08/27] net/ice/base: implement inactive NVM version get", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "aa59a2fc954a4314f098cd0e3c58b0ac0e29ff2d", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201215060519.302145-9-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 14300, "url": "https://patches.dpdk.org/api/series/14300/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14300", "date": "2020-12-15T06:04:52", "name": "ice base code update", "version": 1, "mbox": "https://patches.dpdk.org/series/14300/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/85165/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/85165/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id ACC92A09E9;\n\tTue, 15 Dec 2020 07:04:25 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 34079C9F0;\n\tTue, 15 Dec 2020 07:01:44 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id D5C2BC9C4\n for <dev@dpdk.org>; Tue, 15 Dec 2020 07:01:38 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Dec 2020 22:01:38 -0800", "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga002.jf.intel.com with ESMTP; 14 Dec 2020 22:01:36 -0800" ], "IronPort-SDR": [ "\n rZXrD7UZ2tscXA3oHDFQgyp/Y7ZyO72qbkuVfKypTn8uU6L/kCbX8yRcrI1DJaDo5vQIK+ioBL\n vHXUtRDkvE/Q==", "\n K/6PjvxY5VvkCXf5YmXWQjoWJKBA4yxZlgvo/KHM9p52Kg8JpOvaKYonPXpc9+7dGUbsystv35\n vTb39CSBVTKA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9835\"; a=\"193200237\"", "E=Sophos;i=\"5.78,420,1599548400\"; d=\"scan'208\";a=\"193200237\"", "E=Sophos;i=\"5.78,420,1599548400\"; d=\"scan'208\";a=\"351723424\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>", "Date": "Tue, 15 Dec 2020 14:05:00 +0800", "Message-Id": "<20201215060519.302145-9-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20201215060519.302145-1-qi.z.zhang@intel.com>", "References": "<20201215060519.302145-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 08/27] net/ice/base: implement inactive NVM\n\tversion get", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Similar to ice_get_inactive_orom_ver, add a function to read the NVM\nversion data from the inactive section of flash. The primary motivation\nof this function is to allow the driver to report the version of\na pending update that has not yet been activated.\n\nTo do this, refactor ice_get_nvm_ver_info to allow it to take a bank\nparameter. Read from the copy of the Shadow RAM in the NVM bank, rather\nthan reading from the RAM copy that is loaded by the device. This\nensures we get the accurate value when reading the inactive section.\n\nNote that the start of the Shadow RAM copy is not directly following the\nCSS header, but is actually aligned to the next 64-byte boundary. The\ncorrect word offset must be rounded up to 32-bytes.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_nvm.c | 44 ++++++++++++++++++++++++++++-----\n drivers/net/ice/base/ice_nvm.h | 2 ++\n drivers/net/ice/base/ice_type.h | 8 +++++-\n 3 files changed, 47 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex 71affd1812..c807ce9ebc 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -348,6 +348,22 @@ ice_read_nvm_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u1\n \treturn status;\n }\n \n+/**\n+ * ice_read_nvm_sr_copy - Read a word from the Shadow RAM copy in the NVM bank\n+ * @hw: pointer to the HW structure\n+ * @bank: whether to read from the active or inactive NVM module\n+ * @offset: offset into the Shadow RAM copy to read, in words\n+ * @data: storage for returned word value\n+ *\n+ * Read the specified word from the copy of the Shadow RAM found in the\n+ * specified NVM module.\n+ */\n+static enum ice_status\n+ice_read_nvm_sr_copy(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)\n+{\n+\treturn ice_read_nvm_module(hw, bank, ICE_NVM_SR_COPY_WORD_OFFSET + offset, data);\n+}\n+\n /**\n * ice_read_orom_module - Read from the active Option ROM module\n * @hw: pointer to the HW structure\n@@ -549,31 +565,33 @@ static enum ice_status ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select\n /**\n * ice_get_nvm_ver_info - Read NVM version information\n * @hw: pointer to the HW struct\n+ * @bank: whether to read from the active or inactive flash bank\n * @nvm: pointer to NVM info structure\n *\n * Read the NVM EETRACK ID and map version of the main NVM image bank, filling\n * in the nvm info structure.\n */\n static enum ice_status\n-ice_get_nvm_ver_info(struct ice_hw *hw, struct ice_nvm_info *nvm)\n+ice_get_nvm_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_nvm_info *nvm)\n {\n \tu16 eetrack_lo, eetrack_hi, ver;\n \tenum ice_status status;\n \n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);\n+\tstatus = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_DEV_STARTER_VER, &ver);\n \tif (status) {\n \t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read DEV starter version.\\n\");\n \t\treturn status;\n \t}\n+\n \tnvm->major = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;\n \tnvm->minor = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;\n \n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);\n+\tstatus = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);\n \tif (status) {\n \t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read EETRACK lo.\\n\");\n \t\treturn status;\n \t}\n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);\n+\tstatus = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);\n \tif (status) {\n \t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read EETRACK hi.\\n\");\n \t\treturn status;\n@@ -581,13 +599,27 @@ ice_get_nvm_ver_info(struct ice_hw *hw, struct ice_nvm_info *nvm)\n \n \tnvm->eetrack = (eetrack_hi << 16) | eetrack_lo;\n \n-\tstatus = ice_get_nvm_srev(hw, ICE_ACTIVE_FLASH_BANK, &nvm->srev);\n+\tstatus = ice_get_nvm_srev(hw, bank, &nvm->srev);\n \tif (status)\n \t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read NVM security revision.\\n\");\n \n \treturn ICE_SUCCESS;\n }\n \n+/**\n+ * ice_get_inactive_nvm_ver - Read Option ROM version from the inactive bank\n+ * @hw: pointer to the HW structure\n+ * @nvm: storage for Option ROM version information\n+ *\n+ * Reads the NVM EETRACK ID, Map version, and security revision of the\n+ * inactive NVM bank. Used to access version data for a pending update that\n+ * has not yet been activated.\n+ */\n+enum ice_status ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm)\n+{\n+\treturn ice_get_nvm_ver_info(hw, ICE_INACTIVE_FLASH_BANK, nvm);\n+}\n+\n /**\n * ice_get_orom_srev - Read the security revision from the OROM CSS header\n * @hw: pointer to the HW struct\n@@ -976,7 +1008,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)\n \t\treturn status;\n \t}\n \n-\tstatus = ice_get_nvm_ver_info(hw, &flash->nvm);\n+\tstatus = ice_get_nvm_ver_info(hw, ICE_ACTIVE_FLASH_BANK, &flash->nvm);\n \tif (status) {\n \t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read NVM info.\\n\");\n \t\treturn status;\ndiff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h\nindex 74fd16305a..52f79ca5c9 100644\n--- a/drivers/net/ice/base/ice_nvm.h\n+++ b/drivers/net/ice/base/ice_nvm.h\n@@ -111,6 +111,8 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,\n enum ice_status\n ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom);\n enum ice_status\n+ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm);\n+enum ice_status\n ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);\n enum ice_status ice_init_nvm(struct ice_hw *hw);\n enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex b0f70c15dd..828c7a7fd5 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -1157,8 +1157,14 @@ struct ice_aq_get_set_rss_lut_params {\n #define ICE_NVM_CSS_SREV_L\t\t\t0x14\n #define ICE_NVM_CSS_SREV_H\t\t\t0x15\n \n+/* Length of CSS header section in words */\n+#define ICE_CSS_HEADER_LENGTH\t\t\t330\n+\n+/* Offset of Shadow RAM copy in the NVM bank area. */\n+#define ICE_NVM_SR_COPY_WORD_OFFSET\t\tROUND_UP(ICE_CSS_HEADER_LENGTH, 32)\n+\n /* Size in bytes of Option ROM trailer */\n-#define ICE_NVM_OROM_TRAILER_LENGTH\t\t660\n+#define ICE_NVM_OROM_TRAILER_LENGTH\t\t(2 * ICE_CSS_HEADER_LENGTH)\n \n /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */\n #define ICE_SR_VPD_SIZE_WORDS\t\t512\n", "prefixes": [ "08/27" ] }