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GET /api/patches/8500/?format=api
{ "id": 8500, "url": "https://patches.dpdk.org/api/patches/8500/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446307051-29283-5-git-send-email-jingjing.wu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1446307051-29283-5-git-send-email-jingjing.wu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1446307051-29283-5-git-send-email-jingjing.wu@intel.com", "date": "2015-10-31T15:57:26", "name": "[dpdk-dev,v3,4/9] ixgbe: enable DCB+RSS multi-queue mode", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "d2d28b2258c452cfa344d5f4447eb5eb4779cfce", "submitter": { "id": 47, "url": "https://patches.dpdk.org/api/people/47/?format=api", "name": "Jingjing Wu", "email": "jingjing.wu@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446307051-29283-5-git-send-email-jingjing.wu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/8500/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/8500/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 79DCB8E86;\n\tSat, 31 Oct 2015 16:57:58 +0100 (CET)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id F145B8DB4\n\tfor <dev@dpdk.org>; Sat, 31 Oct 2015 16:57:54 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga101.jf.intel.com with ESMTP; 31 Oct 2015 08:57:54 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 31 Oct 2015 08:57:54 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9VFvj1q032724;\n\tSat, 31 Oct 2015 23:57:45 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9VFvfVj029688; Sat, 31 Oct 2015 23:57:43 +0800", "(from wujingji@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9VFvfr3029684; \n\tSat, 31 Oct 2015 23:57:41 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,224,1444719600\"; d=\"scan'208\";a=\"839580360\"", "From": "Jingjing Wu <jingjing.wu@intel.com>", "To": "dev@dpdk.org", "Date": "Sat, 31 Oct 2015 23:57:26 +0800", "Message-Id": "<1446307051-29283-5-git-send-email-jingjing.wu@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1446307051-29283-1-git-send-email-jingjing.wu@intel.com>", "References": "<1446108827-7907-1-git-send-email-jingjing.wu@intel.com>\n\t<1446307051-29283-1-git-send-email-jingjing.wu@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 4/9] ixgbe: enable DCB+RSS multi-queue mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch enables DCB+RSS multi-queue mode, and also fix some coding\nstyle.\n\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n drivers/net/ixgbe/ixgbe_rxtx.c | 48 +++++++++++++++++++++++++-----------------\n 1 file changed, 29 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c\nindex 6a62d67..ad66b09 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.c\n@@ -3169,9 +3169,13 @@ ixgbe_dcb_rx_hw_config(struct ixgbe_hw *hw,\n \t\t\t\treg = (reg & ~IXGBE_MRQC_MRQE_MASK) |\n \t\t\t\t\tIXGBE_MRQC_VMDQRT4TCEN;\n \t\t\telse {\n+\t\t\t\t/* no matter the mode is DCB or DCB_RSS, just\n+\t\t\t\t * set the MRQE to RSSXTCEN. RSS is controlled\n+\t\t\t\t * by RSS_FIELD\n+\t\t\t\t */\n \t\t\t\tIXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0);\n \t\t\t\treg = (reg & ~IXGBE_MRQC_MRQE_MASK) |\n-\t\t\t\t\tIXGBE_MRQC_RT4TCEN;\n+\t\t\t\t\tIXGBE_MRQC_RTRSS4TCEN;\n \t\t\t}\n \t\t}\n \t\tif (dcb_config->num_tcs.pg_tcs == 8) {\n@@ -3181,7 +3185,7 @@ ixgbe_dcb_rx_hw_config(struct ixgbe_hw *hw,\n \t\t\telse {\n \t\t\t\tIXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0);\n \t\t\t\treg = (reg & ~IXGBE_MRQC_MRQE_MASK) |\n-\t\t\t\t\tIXGBE_MRQC_RT8TCEN;\n+\t\t\t\t\tIXGBE_MRQC_RTRSS8TCEN;\n \t\t\t}\n \t\t}\n \n@@ -3286,16 +3290,17 @@ ixgbe_dcb_hw_configure(struct rte_eth_dev *dev,\n \t\t\t *get dcb and VT rx configuration parameters\n \t\t\t *from rte_eth_conf\n \t\t\t */\n-\t\t\tixgbe_vmdq_dcb_rx_config(dev,dcb_config);\n+\t\t\tixgbe_vmdq_dcb_rx_config(dev, dcb_config);\n \t\t\t/*Configure general VMDQ and DCB RX parameters*/\n \t\t\tixgbe_vmdq_dcb_configure(dev);\n \t\t}\n \t\tbreak;\n \tcase ETH_MQ_RX_DCB:\n+\tcase ETH_MQ_RX_DCB_RSS:\n \t\tdcb_config->vt_mode = false;\n \t\tconfig_dcb_rx = DCB_RX_CONFIG;\n \t\t/* Get dcb TX configuration parameters from rte_eth_conf */\n-\t\tixgbe_dcb_rx_config(dev,dcb_config);\n+\t\tixgbe_dcb_rx_config(dev, dcb_config);\n \t\t/*Configure general DCB RX parameters*/\n \t\tixgbe_dcb_rx_hw_config(hw, dcb_config);\n \t\tbreak;\n@@ -3317,7 +3322,7 @@ ixgbe_dcb_hw_configure(struct rte_eth_dev *dev,\n \t\tdcb_config->vt_mode = false;\n \t\tconfig_dcb_tx = DCB_TX_CONFIG;\n \t\t/*get DCB TX configuration parameters from rte_eth_conf*/\n-\t\tixgbe_dcb_tx_config(dev,dcb_config);\n+\t\tixgbe_dcb_tx_config(dev, dcb_config);\n \t\t/*Configure general DCB TX parameters*/\n \t\tixgbe_dcb_tx_hw_config(hw, dcb_config);\n \t\tbreak;\n@@ -3458,14 +3463,15 @@ void ixgbe_configure_dcb(struct rte_eth_dev *dev)\n \n \t/* check support mq_mode for DCB */\n \tif ((dev_conf->rxmode.mq_mode != ETH_MQ_RX_VMDQ_DCB) &&\n-\t (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB))\n+\t (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB) &&\n+\t (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB_RSS))\n \t\treturn;\n \n \tif (dev->data->nb_rx_queues != ETH_DCB_NUM_QUEUES)\n \t\treturn;\n \n \t/** Configure DCB hardware **/\n-\tixgbe_dcb_hw_configure(dev,dcb_cfg);\n+\tixgbe_dcb_hw_configure(dev, dcb_cfg);\n \n \treturn;\n }\n@@ -3707,21 +3713,25 @@ ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev)\n \t\t * any DCB/RSS w/o VMDq multi-queue setting\n \t\t */\n \t\tswitch (dev->data->dev_conf.rxmode.mq_mode) {\n-\t\t\tcase ETH_MQ_RX_RSS:\n-\t\t\t\tixgbe_rss_configure(dev);\n-\t\t\t\tbreak;\n+\t\tcase ETH_MQ_RX_RSS:\n+\t\tcase ETH_MQ_RX_DCB_RSS:\n+\t\tcase ETH_MQ_RX_VMDQ_RSS:\n+\t\t\tixgbe_rss_configure(dev);\n+\t\t\tbreak;\n \n-\t\t\tcase ETH_MQ_RX_VMDQ_DCB:\n-\t\t\t\tixgbe_vmdq_dcb_configure(dev);\n-\t\t\t\tbreak;\n+\t\tcase ETH_MQ_RX_VMDQ_DCB:\n+\t\t\tixgbe_vmdq_dcb_configure(dev);\n+\t\t\tbreak;\n \n-\t\t\tcase ETH_MQ_RX_VMDQ_ONLY:\n-\t\t\t\tixgbe_vmdq_rx_hw_configure(dev);\n-\t\t\t\tbreak;\n+\t\tcase ETH_MQ_RX_VMDQ_ONLY:\n+\t\t\tixgbe_vmdq_rx_hw_configure(dev);\n+\t\t\tbreak;\n \n-\t\t\tcase ETH_MQ_RX_NONE:\n-\t\t\t\t/* if mq_mode is none, disable rss mode.*/\n-\t\t\tdefault: ixgbe_rss_disable(dev);\n+\t\tcase ETH_MQ_RX_NONE:\n+\t\tdefault:\n+\t\t\t/* if mq_mode is none, disable rss mode.*/\n+\t\t\tixgbe_rss_disable(dev);\n+\t\t\tbreak;\n \t\t}\n \t} else {\n \t\t/*\n", "prefixes": [ "dpdk-dev", "v3", "4/9" ] }