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GET /api/patches/8499/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 8499,
    "url": "https://patches.dpdk.org/api/patches/8499/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446307051-29283-8-git-send-email-jingjing.wu@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1446307051-29283-8-git-send-email-jingjing.wu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1446307051-29283-8-git-send-email-jingjing.wu@intel.com",
    "date": "2015-10-31T15:57:29",
    "name": "[dpdk-dev,v3,7/9] i40e: get_dcb_info ops implement",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "5a3146cea6b3c3a79ca32a1bf7475d49c67807b2",
    "submitter": {
        "id": 47,
        "url": "https://patches.dpdk.org/api/people/47/?format=api",
        "name": "Jingjing Wu",
        "email": "jingjing.wu@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446307051-29283-8-git-send-email-jingjing.wu@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8499/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8499/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 7E6128E81;\n\tSat, 31 Oct 2015 16:57:57 +0100 (CET)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id BAD8E8D9E\n\tfor <dev@dpdk.org>; Sat, 31 Oct 2015 16:57:54 +0100 (CET)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga103.jf.intel.com with ESMTP; 31 Oct 2015 08:57:54 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 31 Oct 2015 08:57:53 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9VFvphO032736;\n\tSat, 31 Oct 2015 23:57:51 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9VFvml4029709; Sat, 31 Oct 2015 23:57:50 +0800",
            "(from wujingji@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9VFvmth029705; \n\tSat, 31 Oct 2015 23:57:48 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.20,224,1444719600\"; d=\"scan'208\";a=\"808470699\"",
        "From": "Jingjing Wu <jingjing.wu@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Sat, 31 Oct 2015 23:57:29 +0800",
        "Message-Id": "<1446307051-29283-8-git-send-email-jingjing.wu@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1446307051-29283-1-git-send-email-jingjing.wu@intel.com>",
        "References": "<1446108827-7907-1-git-send-email-jingjing.wu@intel.com>\n\t<1446307051-29283-1-git-send-email-jingjing.wu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 7/9] i40e: get_dcb_info ops implement",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patch implements the get_dcb_info ops in i40e driver.\n\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 42 ++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 42 insertions(+)",
    "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex ce4efb2..480dd57 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -247,6 +247,8 @@ static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev,\n \t\t\t\tenum rte_filter_type filter_type,\n \t\t\t\tenum rte_filter_op filter_op,\n \t\t\t\tvoid *arg);\n+static int i40e_dev_get_dcb_info(struct rte_eth_dev *dev,\n+\t\t\t\t  struct rte_eth_dcb_info *dcb_info);\n static void i40e_configure_registers(struct i40e_hw *hw);\n static void i40e_hw_init(struct i40e_hw *hw);\n static int i40e_config_qinq(struct i40e_hw *hw, struct i40e_vsi *vsi);\n@@ -320,6 +322,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {\n \t.timesync_disable             = i40e_timesync_disable,\n \t.timesync_read_rx_timestamp   = i40e_timesync_read_rx_timestamp,\n \t.timesync_read_tx_timestamp   = i40e_timesync_read_tx_timestamp,\n+\t.get_dcb_info                 = i40e_dev_get_dcb_info,\n };\n \n static struct eth_driver rte_i40e_pmd = {\n@@ -7016,3 +7019,42 @@ i40e_dcb_setup(struct rte_eth_dev *dev)\n \t}\n \treturn 0;\n }\n+\n+static int\n+i40e_dev_get_dcb_info(struct rte_eth_dev *dev,\n+\t\t      struct rte_eth_dcb_info *dcb_info)\n+{\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_vsi *vsi = pf->main_vsi;\n+\tstruct i40e_dcbx_config *dcb_cfg = &hw->local_dcbx_config;\n+\tuint16_t bsf, tc_mapping;\n+\tint i;\n+\n+\tif (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_DCB_FLAG)\n+\t\tdcb_info->nb_tcs = rte_bsf32(vsi->enabled_tc + 1);\n+\telse\n+\t\tdcb_info->nb_tcs = 1;\n+\tfor (i = 0; i < I40E_MAX_USER_PRIORITY; i++)\n+\t\tdcb_info->prio_tc[i] = dcb_cfg->etscfg.prioritytable[i];\n+\tfor (i = 0; i < dcb_info->nb_tcs; i++)\n+\t\tdcb_info->tc_bws[i] = dcb_cfg->etscfg.tcbwtable[i];\n+\n+\tfor (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {\n+\t\tif (vsi->enabled_tc & (1 << i)) {\n+\t\t\ttc_mapping = rte_le_to_cpu_16(vsi->info.tc_mapping[i]);\n+\t\t\t/* only main vsi support multi TCs */\n+\t\t\tdcb_info->tc_queue.tc_rxq[0][i].base =\n+\t\t\t\t(tc_mapping & I40E_AQ_VSI_TC_QUE_OFFSET_MASK) >>\n+\t\t\t\tI40E_AQ_VSI_TC_QUE_OFFSET_SHIFT;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][i].base =\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[0][i].base;\n+\t\t\tbsf = (tc_mapping & I40E_AQ_VSI_TC_QUE_NUMBER_MASK) >>\n+\t\t\t\tI40E_AQ_VSI_TC_QUE_NUMBER_SHIFT;\n+\t\t\tdcb_info->tc_queue.tc_rxq[0][i].nb_queue = 1 << bsf;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][i].nb_queue =\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[0][i].nb_queue;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n",
    "prefixes": [
        "dpdk-dev",
        "v3",
        "7/9"
    ]
}