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GET /api/patches/8498/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 8498,
    "url": "https://patches.dpdk.org/api/patches/8498/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446307051-29283-7-git-send-email-jingjing.wu@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1446307051-29283-7-git-send-email-jingjing.wu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1446307051-29283-7-git-send-email-jingjing.wu@intel.com",
    "date": "2015-10-31T15:57:28",
    "name": "[dpdk-dev,v3,6/9] ixgbe: get_dcb_info ops implement",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "cd69c81bee99963ec8458fad281fde50378b84a2",
    "submitter": {
        "id": 47,
        "url": "https://patches.dpdk.org/api/people/47/?format=api",
        "name": "Jingjing Wu",
        "email": "jingjing.wu@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446307051-29283-7-git-send-email-jingjing.wu@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8498/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8498/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 6FE848E7B;\n\tSat, 31 Oct 2015 16:57:56 +0100 (CET)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id A1F855A4F\n\tfor <dev@dpdk.org>; Sat, 31 Oct 2015 16:57:52 +0100 (CET)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga103.jf.intel.com with ESMTP; 31 Oct 2015 08:57:52 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga003.jf.intel.com with ESMTP; 31 Oct 2015 08:57:52 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9VFvnJ8032733;\n\tSat, 31 Oct 2015 23:57:49 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9VFvk3I029702; Sat, 31 Oct 2015 23:57:48 +0800",
            "(from wujingji@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9VFvk0o029698; \n\tSat, 31 Oct 2015 23:57:46 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.20,224,1444719600\"; d=\"scan'208\";a=\"675702887\"",
        "From": "Jingjing Wu <jingjing.wu@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Sat, 31 Oct 2015 23:57:28 +0800",
        "Message-Id": "<1446307051-29283-7-git-send-email-jingjing.wu@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1446307051-29283-1-git-send-email-jingjing.wu@intel.com>",
        "References": "<1446108827-7907-1-git-send-email-jingjing.wu@intel.com>\n\t<1446307051-29283-1-git-send-email-jingjing.wu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 6/9] ixgbe: get_dcb_info ops implement",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patch implements the get_dcb_info ops in ixgbe driver.\n\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n drivers/net/ixgbe/ixgbe_ethdev.c | 79 ++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 79 insertions(+)",
    "diff": "diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex ece2e73..e9ce466 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -304,6 +304,8 @@ static int ixgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu);\n static int ixgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,\n \t\t\t\t      struct ether_addr *mc_addr_set,\n \t\t\t\t      uint32_t nb_mc_addr);\n+static int ixgbe_dev_get_dcb_info(struct rte_eth_dev *dev,\n+\t\t\t\t   struct rte_eth_dcb_info *dcb_info);\n \n static int ixgbe_get_reg_length(struct rte_eth_dev *dev);\n static int ixgbe_get_regs(struct rte_eth_dev *dev,\n@@ -465,6 +467,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {\n \t.get_eeprom_length    = ixgbe_get_eeprom_length,\n \t.get_eeprom           = ixgbe_get_eeprom,\n \t.set_eeprom           = ixgbe_set_eeprom,\n+\t.get_dcb_info         = ixgbe_dev_get_dcb_info,\n };\n \n /*\n@@ -5734,6 +5737,82 @@ ixgbe_rss_update_sp(enum ixgbe_mac_type mac_type) {\n \t}\n }\n \n+static int\n+ixgbe_dev_get_dcb_info(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_dcb_info *dcb_info)\n+{\n+\tstruct ixgbe_dcb_config *dcb_config =\n+\t\t\tIXGBE_DEV_PRIVATE_TO_DCB_CFG(dev->data->dev_private);\n+\tstruct ixgbe_dcb_tc_config *tc;\n+\tuint8_t i, j;\n+\n+\tif (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_DCB_FLAG)\n+\t\tdcb_info->nb_tcs = dcb_config->num_tcs.pg_tcs;\n+\telse\n+\t\tdcb_info->nb_tcs = 1;\n+\n+\tif (dcb_config->vt_mode) { /* vt is enabled*/\n+\t\tstruct rte_eth_vmdq_dcb_conf *vmdq_rx_conf =\n+\t\t\t\t&dev->data->dev_conf.rx_adv_conf.vmdq_dcb_conf;\n+\t\tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++)\n+\t\t\tdcb_info->prio_tc[i] = vmdq_rx_conf->dcb_tc[i];\n+\t\tfor (i = 0; i < vmdq_rx_conf->nb_queue_pools; i++) {\n+\t\t\tfor (j = 0; j < dcb_info->nb_tcs; j++) {\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[i][j].base =\n+\t\t\t\t\t\ti * dcb_info->nb_tcs + j;\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[i][j].nb_queue = 1;\n+\t\t\t\tdcb_info->tc_queue.tc_txq[i][j].base =\n+\t\t\t\t\t\ti * dcb_info->nb_tcs + j;\n+\t\t\t\tdcb_info->tc_queue.tc_txq[i][j].nb_queue = 1;\n+\t\t\t}\n+\t\t}\n+\t} else { /* vt is disabled*/\n+\t\tstruct rte_eth_dcb_rx_conf *rx_conf =\n+\t\t\t\t&dev->data->dev_conf.rx_adv_conf.dcb_rx_conf;\n+\t\tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++)\n+\t\t\tdcb_info->prio_tc[i] = rx_conf->dcb_tc[i];\n+\t\tif (dcb_info->nb_tcs == ETH_4_TCS) {\n+\t\t\tfor (i = 0; i < dcb_info->nb_tcs; i++) {\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[0][i].base = i * 32;\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;\n+\t\t\t}\n+\t\t\tdcb_info->tc_queue.tc_txq[0][0].base = 0;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][1].base = 64;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][2].base = 96;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][3].base = 112;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][0].nb_queue = 64;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;\n+\t\t} else if (dcb_info->nb_tcs == ETH_8_TCS) {\n+\t\t\tfor (i = 0; i < dcb_info->nb_tcs; i++) {\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[0][i].base = i * 16;\n+\t\t\t\tdcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;\n+\t\t\t}\n+\t\t\tdcb_info->tc_queue.tc_txq[0][0].base = 0;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][1].base = 32;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][2].base = 64;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][3].base = 80;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][4].base = 96;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][5].base = 104;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][6].base = 112;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][7].base = 120;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][0].nb_queue = 32;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][4].nb_queue = 8;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][5].nb_queue = 8;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][6].nb_queue = 8;\n+\t\t\tdcb_info->tc_queue.tc_txq[0][7].nb_queue = 8;\n+\t\t}\n+\t}\n+\tfor (i = 0; i < dcb_info->nb_tcs; i++) {\n+\t\ttc = &dcb_config->tc_config[i];\n+\t\tdcb_info->tc_bws[i] = tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent;\n+\t}\n+\treturn 0;\n+}\n \n static struct rte_driver rte_ixgbe_driver = {\n \t.type = PMD_PDEV,\n",
    "prefixes": [
        "dpdk-dev",
        "v3",
        "6/9"
    ]
}