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GET /api/patches/84703/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 84703,
    "url": "https://patches.dpdk.org/api/patches/84703/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201202101212.4717-31-lironh@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201202101212.4717-31-lironh@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201202101212.4717-31-lironh@marvell.com",
    "date": "2020-12-02T10:12:04",
    "name": "[v1,30/38] net/mvpp2: expose max mtu size",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "c4342e303c486f2411a1a2f2e88be9e36000807d",
    "submitter": {
        "id": 996,
        "url": "https://patches.dpdk.org/api/people/996/?format=api",
        "name": "Liron Himi",
        "email": "lironh@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201202101212.4717-31-lironh@marvell.com/mbox/",
    "series": [
        {
            "id": 14168,
            "url": "https://patches.dpdk.org/api/series/14168/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14168",
            "date": "2020-12-02T10:11:34",
            "name": "net/mvpp2: misc updates",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/14168/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/84703/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/84703/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D5ED2A04DB;\n\tWed,  2 Dec 2020 11:22:33 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A85ABCB7B;\n\tWed,  2 Dec 2020 11:13:19 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 5A2B7CB77\n for <dev@dpdk.org>; Wed,  2 Dec 2020 11:13:17 +0100 (CET)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 0B2AALwV024189 for <dev@dpdk.org>; Wed, 2 Dec 2020 02:13:15 -0800",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 355w509r6f-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 02 Dec 2020 02:13:15 -0800",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 2 Dec 2020 02:13:13 -0800",
            "from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 2 Dec 2020 02:13:11 -0800"
        ],
        "From": "<lironh@marvell.com>",
        "To": "<jerinj@marvell.com>",
        "CC": "<dev@dpdk.org>, Liron Himi <lironh@marvell.com>, Yuri Chipchev\n <yuric@marvell.com>",
        "Date": "Wed, 2 Dec 2020 12:12:04 +0200",
        "Message-ID": "<20201202101212.4717-31-lironh@marvell.com>",
        "X-Mailer": "git-send-email 2.28.0",
        "In-Reply-To": "<20201202101212.4717-1-lironh@marvell.com>",
        "References": "<20201202101212.4717-1-lironh@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737\n definitions=2020-12-02_04:2020-11-30,\n 2020-12-02 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v1 30/38] net/mvpp2: expose max mtu size",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Liron Himi <lironh@marvell.com>\n\nexpose max-mtu based on the max frame size that\nl4 checksum generation can be done by HW.\n\nSigned-off-by: Liron Himi <lironh@marvell.com>\nReviewed-by: Yuri Chipchev <yuric@marvell.com>\n---\n drivers/net/mvpp2/mrvl_ethdev.c | 24 ++++++++++++++++++++++--\n drivers/net/mvpp2/mrvl_ethdev.h |  1 +\n 2 files changed, 23 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c\nindex 535d7cc60..9fd9269eb 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.c\n+++ b/drivers/net/mvpp2/mrvl_ethdev.c\n@@ -477,9 +477,17 @@ mrvl_dev_configure(struct rte_eth_dev *dev)\n \t\treturn -EINVAL;\n \t}\n \n-\tif (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)\n+\tif (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {\n \t\tdev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -\n \t\t\t\t MRVL_PP2_ETH_HDRS_LEN;\n+\t\tif (dev->data->mtu > priv->max_mtu) {\n+\t\t\tMRVL_LOG(ERR, \"inherit MTU %u from max_rx_pkt_len %u is larger than max_mtu %u\\n\",\n+\t\t\t\t dev->data->mtu,\n+\t\t\t\t dev->data->dev_conf.rxmode.max_rx_pkt_len,\n+\t\t\t\t priv->max_mtu);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n \n \tif (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)\n \t\tpriv->multiseg = 1;\n@@ -1676,9 +1684,11 @@ mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,\n  *   Info structure output buffer.\n  */\n static int\n-mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,\n+mrvl_dev_infos_get(struct rte_eth_dev *dev,\n \t\t   struct rte_eth_dev_info *info)\n {\n+\tstruct mrvl_priv *priv = dev->data->dev_private;\n+\n \tinfo->speed_capa = ETH_LINK_SPEED_10M |\n \t\t\t   ETH_LINK_SPEED_100M |\n \t\t\t   ETH_LINK_SPEED_1G |\n@@ -1710,6 +1720,7 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,\n \tinfo->default_rxconf.rx_drop_en = 1;\n \n \tinfo->max_rx_pktlen = MRVL_PKT_SIZE_MAX;\n+\tinfo->max_mtu = priv->max_mtu;\n \n \treturn 0;\n }\n@@ -3125,6 +3136,7 @@ mrvl_priv_create(const char *dev_name)\n \tstruct pp2_bpool_params bpool_params;\n \tchar match[MRVL_MATCH_LEN];\n \tstruct mrvl_priv *priv;\n+\tuint16_t max_frame_size;\n \tint ret, bpool_bit;\n \n \tpriv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());\n@@ -3136,6 +3148,14 @@ mrvl_priv_create(const char *dev_name)\n \tif (ret)\n \t\tgoto out_free_priv;\n \n+\tret = pp2_ppio_get_l4_cksum_max_frame_size(priv->pp_id, priv->ppio_id,\n+\t\t\t\t\t\t   &max_frame_size);\n+\tif (ret)\n+\t\tgoto out_free_priv;\n+\n+\tpriv->max_mtu = max_frame_size + RTE_ETHER_CRC_LEN -\n+\t\tMRVL_PP2_ETH_HDRS_LEN;\n+\n \tbpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],\n \t\t\t\t     PP2_BPOOL_NUM_POOLS);\n \tif (bpool_bit < 0)\ndiff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h\nindex 24dbe20d7..ada2c51b2 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.h\n+++ b/drivers/net/mvpp2/mrvl_ethdev.h\n@@ -160,6 +160,7 @@ struct mrvl_priv {\n \tuint8_t vlan_flushed;\n \tuint8_t isolated;\n \tuint8_t multiseg;\n+\tuint16_t max_mtu;\n \n \tstruct pp2_ppio_params ppio_params;\n \tstruct pp2_cls_qos_tbl_params qos_tbl_params;\n",
    "prefixes": [
        "v1",
        "30/38"
    ]
}