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GET /api/patches/84426/?format=api
{ "id": 84426, "url": "https://patches.dpdk.org/api/patches/84426/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1605874101-30893-6-git-send-email-juraj.linkes@pantheon.tech/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1605874101-30893-6-git-send-email-juraj.linkes@pantheon.tech>", "list_archive_url": "https://inbox.dpdk.org/dev/1605874101-30893-6-git-send-email-juraj.linkes@pantheon.tech", "date": "2020-11-20T12:08:14", "name": "[v13,05/12] build: organize Arm config into dict", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "51afbc685bd13e14da6d62dd3f5da7efb8cde20e", "submitter": { "id": 1626, "url": "https://patches.dpdk.org/api/people/1626/?format=api", "name": "Juraj Linkeš", "email": "juraj.linkes@pantheon.tech" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1605874101-30893-6-git-send-email-juraj.linkes@pantheon.tech/mbox/", "series": [ { "id": 14004, "url": "https://patches.dpdk.org/api/series/14004/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14004", "date": "2020-11-20T12:08:09", "name": "Arm build options rework", "version": 13, "mbox": "https://patches.dpdk.org/series/14004/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/84426/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/84426/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 40EF2A04DD;\n\tFri, 20 Nov 2020 13:10:22 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 1E905C92E;\n\tFri, 20 Nov 2020 13:08:51 +0100 (CET)", "from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20])\n by dpdk.org (Postfix) with ESMTP id 5BE52C908\n for <dev@dpdk.org>; Fri, 20 Nov 2020 13:08:35 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n by lb.pantheon.sk (Postfix) with ESMTP id 6E481BA24B;\n Fri, 20 Nov 2020 13:08:33 +0100 (CET)", "from lb.pantheon.sk ([127.0.0.1])\n by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024)\n with ESMTP id MlJQvZe9qfZO; Fri, 20 Nov 2020 13:08:32 +0100 (CET)", "from service-node1.lab.pantheon.local (unknown [46.229.239.141])\n by lb.pantheon.sk (Postfix) with ESMTP id 10D25B9B53;\n Fri, 20 Nov 2020 13:08:29 +0100 (CET)" ], "X-Virus-Scanned": "amavisd-new at siecit.sk", "From": "=?utf-8?q?Juraj_Linke=C5=A1?= <juraj.linkes@pantheon.tech>", "To": "bruce.richardson@intel.com, Ruifeng.Wang@arm.com,\n Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com,\n Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com,\n ajit.khaparde@broadcom.com, ferruh.yigit@intel.com", "Cc": "dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= <juraj.linkes@pantheon.tech>", "Date": "Fri, 20 Nov 2020 13:08:14 +0100", "Message-Id": "<1605874101-30893-6-git-send-email-juraj.linkes@pantheon.tech>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech>", "References": "<1605277875-13625-1-git-send-email-juraj.linkes@pantheon.tech>\n <1605874101-30893-1-git-send-email-juraj.linkes@pantheon.tech>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v13 05/12] build: organize Arm config into dict", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Use dictionary lookup instead of checking for existing variables,\niterating over all elements in the list or checking lists for optional\nconfiguration. Move variable contents into the dictionary for variables\nthat would be referenced only once.\nFallback to generic part number if the discovered part number is\nunknown.\n\nSigned-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>\nReviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\n---\n config/arm/meson.build | 298 ++++++++++++++++++++++++-----------------\n 1 file changed, 178 insertions(+), 120 deletions(-)", "diff": "diff --git a/config/arm/meson.build b/config/arm/meson.build\nindex fb877fe77..b449b10c3 100644\n--- a/config/arm/meson.build\n+++ b/config/arm/meson.build\n@@ -27,115 +27,166 @@ flags_common = [\n \t['RTE_CACHE_LINE_SIZE', 128]\n ]\n \n-# implementer specific aarch64 flags, with middle priority\n-# (will overwrite common flags)\n-flags_implementer_generic = [\n-\t['RTE_MACHINE', '\"armv8a\"'],\n-\t['RTE_USE_C11_MEM_MODEL', true],\n-\t['RTE_CACHE_LINE_SIZE', 128],\n-\t['RTE_MAX_LCORE', 256]\n-]\n-flags_implementer_arm = [\n-\t['RTE_MACHINE', '\"armv8a\"'],\n-\t['RTE_USE_C11_MEM_MODEL', true],\n-\t['RTE_CACHE_LINE_SIZE', 64],\n-\t['RTE_MAX_LCORE', 16]\n-]\n-flags_implementer_cavium = [\n-\t['RTE_MAX_VFIO_GROUPS', 128],\n-\t['RTE_CACHE_LINE_SIZE', 128],\n-\t['RTE_MAX_LCORE', 96],\n-\t['RTE_MAX_NUMA_NODES', 2]\n-]\n-flags_implementer_dpaa = [\n-\t['RTE_MACHINE', '\"dpaa\"'],\n-\t['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false],\n-\t['RTE_USE_C11_MEM_MODEL', true],\n-\t['RTE_CACHE_LINE_SIZE', 64],\n-\t['RTE_MAX_LCORE', 16],\n-\t['RTE_MAX_NUMA_NODES', 1]\n-]\n-flags_implementer_emag = [\n-\t['RTE_MACHINE', '\"emag\"'],\n-\t['RTE_CACHE_LINE_SIZE', 64],\n-\t['RTE_MAX_LCORE', 32],\n-\t['RTE_MAX_NUMA_NODES', 1]\n-]\n-flags_implementer_armada = [\n-\t['RTE_MACHINE', '\"armv8a\"'],\n-\t['RTE_CACHE_LINE_SIZE', 64],\n-\t['RTE_MAX_LCORE', 16],\n-\t['RTE_MAX_NUMA_NODES', 1]\n-]\n+## Part numbers are specific to Arm implementers\n+# implementer specific aarch64 flags have middle priority\n+# (will overwrite common flags)\n+# part number specific aarch64 flags have the highest priority\n+# (will overwrite both common and implementer specific flags)\n+implementer_generic = {\n+\t'description': 'Generic armv8',\n+\t'flags': [\n+\t\t['RTE_MACHINE', '\"armv8a\"'],\n+\t\t['RTE_USE_C11_MEM_MODEL', true],\n+\t\t['RTE_CACHE_LINE_SIZE', 128],\n+\t\t['RTE_MAX_LCORE', 256]\n+\t],\n+\t'part_number_config': {\n+\t\t'generic': {'machine_args': ['-march=armv8-a+crc',\n+\t\t\t\t\t '-moutline-atomics']}\n+\t}\n+}\n+\n+part_number_config_arm = {\n+\t'generic': {'machine_args': ['-march=armv8-a+crc',\n+\t\t\t\t '-moutline-atomics']},\n+\t'native': {'machine_args': ['-march=native']},\n+\t'0xd03': {'machine_args': ['-mcpu=cortex-a53']},\n+\t'0xd04': {'machine_args': ['-mcpu=cortex-a35']},\n+\t'0xd07': {'machine_args': ['-mcpu=cortex-a57']},\n+\t'0xd08': {'machine_args': ['-mcpu=cortex-a72']},\n+\t'0xd09': {'machine_args': ['-mcpu=cortex-a73']},\n+\t'0xd0a': {'machine_args': ['-mcpu=cortex-a75']},\n+\t'0xd0b': {'machine_args': ['-mcpu=cortex-a76']},\n+\t'0xd0c': {\n+\t\t'machine_args': ['-march=armv8.2-a+crypto',\n+\t\t\t\t '-mcpu=neoverse-n1'],\n+\t\t'flags': [\n+\t\t\t['RTE_MACHINE', '\"neoverse-n1\"'],\n+\t\t\t['RTE_ARM_FEATURE_ATOMICS', true],\n+\t\t\t['RTE_USE_C11_MEM_MODEL', true],\n+\t\t\t['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],\n+\t\t\t['RTE_LIBRTE_VHOST_NUMA', false],\n+\t\t\t['RTE_MAX_MEM_MB', 1048576],\n+\t\t\t['RTE_CACHE_LINE_SIZE', 64],\n+\t\t\t['RTE_MAX_LCORE', 64],\n+\t\t\t['RTE_MAX_NUMA_NODES', 1]\n+\t\t]\n+\t}\n+}\n+implementer_arm = {\n+\t'description': 'Arm',\n+\t'flags': [\n+\t\t['RTE_MACHINE', '\"armv8a\"'],\n+\t\t['RTE_USE_C11_MEM_MODEL', true],\n+\t\t['RTE_CACHE_LINE_SIZE', 64],\n+\t\t['RTE_MAX_LCORE', 16]\n+\t],\n+\t'part_number_config': part_number_config_arm\n+}\n \n-# part number specific aarch64 flags, with highest priority\n-# (will overwrite both common and implementer specific flags)\n flags_part_number_thunderx = [\n \t['RTE_MACHINE', '\"thunderx\"'],\n \t['RTE_USE_C11_MEM_MODEL', false]\n ]\n-flags_part_number_thunderx2 = [\n-\t['RTE_MACHINE', '\"thunderx2\"'],\n-\t['RTE_ARM_FEATURE_ATOMICS', true],\n-\t['RTE_USE_C11_MEM_MODEL', true],\n-\t['RTE_CACHE_LINE_SIZE', 64],\n-\t['RTE_MAX_LCORE', 256],\n-\t['RTE_MAX_NUMA_NODES', 2]\n-]\n-flags_part_number_octeontx2 = [\n-\t['RTE_MACHINE', '\"octeontx2\"'],\n-\t['RTE_ARM_FEATURE_ATOMICS', true],\n-\t['RTE_USE_C11_MEM_MODEL', true],\n-\t['RTE_EAL_IGB_UIO', false],\n-\t['RTE_MAX_LCORE', 36],\n-\t['RTE_MAX_NUMA_NODES', 1]\n-]\n-flags_part_number_n1generic = [\n-\t['RTE_MACHINE', '\"neoverse-n1\"'],\n-\t['RTE_ARM_FEATURE_ATOMICS', true],\n-\t['RTE_USE_C11_MEM_MODEL', true],\n-\t['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],\n-\t['RTE_LIBRTE_VHOST_NUMA', false],\n-\t['RTE_MAX_MEM_MB', 1048576],\n-\t['RTE_CACHE_LINE_SIZE', 64],\n-\t['RTE_MAX_LCORE', 64],\n-\t['RTE_MAX_NUMA_NODES', 1]\n-]\n+implementer_cavium = {\n+\t'description': 'Cavium',\n+\t'flags': [\n+\t\t['RTE_MAX_VFIO_GROUPS', 128],\n+\t\t['RTE_CACHE_LINE_SIZE', 128],\n+\t\t['RTE_MAX_LCORE', 96],\n+\t\t['RTE_MAX_NUMA_NODES', 2]\n+\t],\n+\t'part_number_config': {\n+\t\t'generic': {'machine_args': ['-march=armv8-a+crc+crypto',\n+\t\t\t\t\t '-mcpu=thunderx']},\n+\t\t'native': {'machine_args': ['-march=native']},\n+\t\t'0xa1': {\n+\t\t\t'machine_args': ['-mcpu=thunderxt88'],\n+\t\t\t'flags': flags_part_number_thunderx\n+\t\t},\n+\t\t'0xa2': {\n+\t\t\t'machine_args': ['-mcpu=thunderxt81'],\n+\t\t\t'flags': flags_part_number_thunderx\n+\t\t},\n+\t\t'0xa3': {\n+\t\t\t'machine_args': ['-mcpu=thunderxt83'],\n+\t\t\t'flags': flags_part_number_thunderx\n+\t\t},\n+\t\t'0xaf': {\n+\t\t\t'machine_args': ['-march=armv8.1-a+crc+crypto',\n+\t\t\t\t\t '-mcpu=thunderx2t99'],\n+\t\t\t'flags': [\n+\t\t\t\t['RTE_MACHINE', '\"thunderx2\"'],\n+\t\t\t\t['RTE_ARM_FEATURE_ATOMICS', true],\n+\t\t\t\t['RTE_USE_C11_MEM_MODEL', true],\n+\t\t\t\t['RTE_CACHE_LINE_SIZE', 64],\n+\t\t\t\t['RTE_MAX_LCORE', 256],\n+\t\t\t\t['RTE_MAX_NUMA_NODES', 2]\n+\t\t\t]\n+\t\t},\n+\t\t'0xb2': {\n+\t\t\t'machine_args': ['-march=armv8.2-a+crc+crypto+lse',\n+\t\t\t\t\t '-mcpu=octeontx2'],\n+\t\t\t'flags': [\n+\t\t\t\t['RTE_MACHINE', '\"octeontx2\"'],\n+\t\t\t\t['RTE_ARM_FEATURE_ATOMICS', true],\n+\t\t\t\t['RTE_USE_C11_MEM_MODEL', true],\n+\t\t\t\t['RTE_EAL_IGB_UIO', false],\n+\t\t\t\t['RTE_MAX_LCORE', 36],\n+\t\t\t\t['RTE_MAX_NUMA_NODES', 1]\n+\t\t\t]\n+\t\t}\n+\t}\n+}\n \n-# arm config (implementer 0x41) is the default config\n-part_number_config_arm = [\n-\t['generic', ['-march=armv8-a+crc', '-moutline-atomics']],\n-\t['native', ['-march=native']],\n-\t['0xd03', ['-mcpu=cortex-a53']],\n-\t['0xd04', ['-mcpu=cortex-a35']],\n-\t['0xd07', ['-mcpu=cortex-a57']],\n-\t['0xd08', ['-mcpu=cortex-a72']],\n-\t['0xd09', ['-mcpu=cortex-a73']],\n-\t['0xd0a', ['-mcpu=cortex-a75']],\n-\t['0xd0b', ['-mcpu=cortex-a76']],\n-\t['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic]\n-]\n-part_number_config_cavium = [\n-\t['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],\n-\t['native', ['-march=native']],\n-\t['0xa1', ['-mcpu=thunderxt88'], flags_part_number_thunderx],\n-\t['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx],\n-\t['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx],\n-\t['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2],\n-\t['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2]\n-]\n-part_number_config_emag = [\n-\t['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']],\n-\t['native', ['-march=native']]\n-]\n+implementer_ampere = {\n+\t'description': 'Ampere Computing',\n+\t'flags': [\n+\t\t['RTE_MACHINE', '\"emag\"'],\n+\t\t['RTE_CACHE_LINE_SIZE', 64],\n+\t\t['RTE_MAX_LCORE', 32],\n+\t\t['RTE_MAX_NUMA_NODES', 1]\n+\t],\n+\t'part_number_config': {\n+\t\t'generic': {'machine_args': ['-march=armv8-a+crc+crypto',\n+\t\t\t\t\t '-mtune=emag']},\n+\t\t'native': {'machine_args': ['-march=native']}\n+\t}\n+}\n+\n+implementer_marvell = {\n+\t'description': 'Marvell ARMADA',\n+\t'flags': [\n+\t\t['RTE_MACHINE', '\"armv8a\"'],\n+\t\t['RTE_CACHE_LINE_SIZE', 64],\n+\t\t['RTE_MAX_LCORE', 16],\n+\t\t['RTE_MAX_NUMA_NODES', 1]\n+\t],\n+\t'part_number_config': part_number_config_arm\n+}\n+\n+implementer_dpaa = {\n+\t'description': 'NXP DPAA',\n+\t'flags': [\n+\t\t['RTE_MACHINE', '\"dpaa\"'],\n+\t\t['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false],\n+\t\t['RTE_USE_C11_MEM_MODEL', true],\n+\t\t['RTE_CACHE_LINE_SIZE', 64],\n+\t\t['RTE_MAX_LCORE', 16],\n+\t\t['RTE_MAX_NUMA_NODES', 1]\n+\t],\n+\t'part_number_config': part_number_config_arm\n+}\n \n-## Arm implementer ID (MIDR in Arm Architecture Reference Manual)\n-implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm]\n-implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm]\n-implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium]\n-implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag]\n-implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm]\n-implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm]\n+## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)\n+implementers = {\n+\t'generic': implementer_generic,\n+\t'0x41': implementer_arm,\n+\t'0x43': implementer_cavium,\n+\t'0x50': implementer_ampere,\n+\t'0x56': implementer_marvell,\n+\t'dpaa': implementer_dpaa\n+}\n \n dpdk_conf.set('RTE_ARCH_ARM', 1)\n dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)\n@@ -151,7 +202,7 @@ else\n \timplementer_id = 'generic'\n \tif machine == 'default' and not meson.is_cross_build()\n \t\t# default build\n-\t\timplementer_config = implementer_generic\n+\t\timplementer_config = implementer['generic']\n \t\tpart_number = 'generic'\n \telif not meson.is_cross_build()\n \t\t# native build\n@@ -166,9 +217,9 @@ else\n \t\t\tpart_number = cmd_output[3]\n \t\tendif\n \t\t# Set to generic if variable is not found\n-\t\timplementer_config = get_variable('implementer_' + implementer_id, ['generic'])\n+\t\timplementer_config = implementers.get(implementer_id, ['generic'])\n \t\tif implementer_config[0] == 'generic'\n-\t\t\timplementer_config = implementer_generic\n+\t\t\timplementer_config = implementer['generic']\n \t\t\tpart_number = 'generic'\n \t\tendif\n \t\tif arm_force_native_march == true\n@@ -178,28 +229,35 @@ else\n \t\t# cross build\n \t\timplementer_id = meson.get_cross_property('implementer_id', 'generic')\n \t\tpart_number = meson.get_cross_property('part_number', 'generic')\n-\t\timplementer_config = get_variable('implementer_' + implementer_id)\n+\t\timplementer_config = implementers.get(implementer_id)\n \tendif\n \n-\tmessage('Arm implementer: ' + implementer_config[0])\n+\tmessage('Arm implementer: ' + implementer_config['description'])\n \tmessage('Arm part number: ' + part_number)\n \n+\tpart_number_config = implementer_config['part_number_config']\n+\tif part_number_config.has_key(part_number)\n+\t\t# use the specified part_number machine args if found\n+\t\tpart_number_config = part_number_config[part_number]\n+\telif not meson.is_cross_build()\n+\t\t# default to generic machine args if part_number is not found\n+\t\t# and not forcing native machine args\n+\t\t# but don't default in cross-builds; if part_number is specified\n+\t\t# incorrectly in a cross-file, it needs to be fixed there\n+\t\tpart_number_config = part_number_config['generic']\n+\telse\n+\t\t# doing cross build and part number is not in part_number_config\n+\t\terror('Cross build part number 0@0 not found.'.format(part_number))\n+\tendif\n+\n \t# use default flags with implementer flags\n-\tdpdk_flags = flags_common + implementer_config[1]\n+\tdpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', [])\n \n+\t# apply supported machine args\n \tmachine_args = [] # Clear previous machine args\n-\tforeach marg: implementer_config[2]\n-\t\tif marg[0] == part_number\n-\t\t\t# apply supported machine args\n-\t\t\tforeach flag: marg[1]\n-\t\t\t\tif cc.has_argument(flag)\n-\t\t\t\t\tmachine_args += flag\n-\t\t\t\tendif\n-\t\t\tendforeach\n-\t\t\tif marg.length() > 2\n-\t\t\t\t# add extra flags for the part\n-\t\t\t\tdpdk_flags += marg[2]\n-\t\t\tendif\n+\tforeach flag: part_number_config['machine_args']\n+\t\tif cc.has_argument(flag)\n+\t\t\tmachine_args += flag\n \t\tendif\n \tendforeach\n \n", "prefixes": [ "v13", "05/12" ] }