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GET /api/patches/84205/?format=api
https://patches.dpdk.org/api/patches/84205/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/493405ea9f0f86ef8e0cfa08cab0d5ae764ae8be.1605493464.git.jackmin@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<493405ea9f0f86ef8e0cfa08cab0d5ae764ae8be.1605493464.git.jackmin@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/493405ea9f0f86ef8e0cfa08cab0d5ae764ae8be.1605493464.git.jackmin@nvidia.com", "date": "2020-11-16T07:55:14", "name": "[1/5] net/mlx5: fix protocol size for raw encap judgement", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "970ee01126b2680ab18a463745c696e77defbfc8", "submitter": { "id": 1065, "url": "https://patches.dpdk.org/api/people/1065/?format=api", "name": "Xiaoyu Min", "email": "jackmin@mellanox.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/493405ea9f0f86ef8e0cfa08cab0d5ae764ae8be.1605493464.git.jackmin@nvidia.com/mbox/", "series": [ { "id": 13896, "url": "https://patches.dpdk.org/api/series/13896/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13896", "date": "2020-11-16T07:55:13", "name": "fix protocol size calculation", "version": 1, "mbox": "https://patches.dpdk.org/series/13896/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/84205/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/84205/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 75CBAA04DB;\n\tMon, 16 Nov 2020 08:55:46 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 115DEC8D8;\n\tMon, 16 Nov 2020 08:55:30 +0100 (CET)", "from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130])\n by dpdk.org (Postfix) with ESMTP id 3CCF3323E\n for <dev@dpdk.org>; Mon, 16 Nov 2020 08:55:27 +0100 (CET)" ], "From": "Xiaoyu Min <jackmin@mellanox.com>", "To": "Matan Azrad <matan@nvidia.com>, Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Cc": "dev@dpdk.org,\n\tXiaoyu Min <jackmin@nvidia.com>", "Date": "Mon, 16 Nov 2020 15:55:14 +0800", "Message-Id": "\n <493405ea9f0f86ef8e0cfa08cab0d5ae764ae8be.1605493464.git.jackmin@nvidia.com>", "X-Mailer": "git-send-email 2.24.0.rc0.3.g12a4aeaad8", "In-Reply-To": "<cover.1605493464.git.jackmin@nvidia.com>", "References": "<cover.1605493464.git.jackmin@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 1/5] net/mlx5: fix protocol size for raw encap\n\tjudgement", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Xiaoyu Min <jackmin@nvidia.com>\n\nThe rte_flow_item_eth and rte_flow_item_vlan items are refined.\nThe structs do not exactly represent the packet bits captured on the\nwire anymore.\nShould use real header instead of the whole struct.\n\nReplace the rte_flow_item_* with the existing corresponding rte_*_hdr.\n\nFixes: 09315fc83861 (\"ethdev: add VLAN attributes to ethernet and VLAN items\")\n\nSigned-off-by: Xiaoyu Min <jackmin@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.c | 12 ++++++------\n drivers/net/mlx5/mlx5_flow.h | 4 ++--\n 2 files changed, 8 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 324349ed19..34b7a2f137 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -3655,8 +3655,8 @@ flow_check_hairpin_split(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \t\t\traw_encap = actions->conf;\n \t\t\tif (raw_encap->size >\n-\t\t\t (sizeof(struct rte_flow_item_eth) +\n-\t\t\t sizeof(struct rte_flow_item_ipv4)))\n+\t\t\t (sizeof(struct rte_ether_hdr) +\n+\t\t\t sizeof(struct rte_ipv4_hdr)))\n \t\t\t\tsplit++;\n \t\t\taction_n++;\n \t\t\tbreak;\n@@ -4092,8 +4092,8 @@ flow_hairpin_split(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \t\t\traw_encap = actions->conf;\n \t\t\tif (raw_encap->size >\n-\t\t\t (sizeof(struct rte_flow_item_eth) +\n-\t\t\t sizeof(struct rte_flow_item_ipv4))) {\n+\t\t\t (sizeof(struct rte_ether_hdr) +\n+\t\t\t sizeof(struct rte_ipv4_hdr))) {\n \t\t\t\tmemcpy(actions_tx, actions,\n \t\t\t\t sizeof(struct rte_flow_action));\n \t\t\t\tactions_tx++;\n@@ -4107,8 +4107,8 @@ flow_hairpin_split(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \t\t\traw_decap = actions->conf;\n \t\t\tif (raw_decap->size <\n-\t\t\t (sizeof(struct rte_flow_item_eth) +\n-\t\t\t sizeof(struct rte_flow_item_ipv4))) {\n+\t\t\t (sizeof(struct rte_ether_hdr) +\n+\t\t\t sizeof(struct rte_ipv4_hdr))) {\n \t\t\t\tmemcpy(actions_tx, actions,\n \t\t\t\t sizeof(struct rte_flow_action));\n \t\t\t\tactions_tx++;\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 5fac8672fc..3b28c48a1d 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -345,8 +345,8 @@ enum mlx5_feature_name {\n #define MLX5_GENEVE_OPT_LEN_0 14\n #define MLX5_GENEVE_OPT_LEN_1 63\n \n-#define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \\\n-\t\t\t\t\t sizeof(struct rte_flow_item_ipv4))\n+#define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_ether_hdr) + \\\n+\t\t\t\t\t sizeof(struct rte_ipv4_hdr))\n \n /* IPv4 fragment_offset field contains relevant data in bits 2 to 15. */\n #define MLX5_IPV4_FRAG_OFFSET_MASK \\\n", "prefixes": [ "1/5" ] }{ "id": 84205, "url": "