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GET /api/patches/84109/?format=api
{ "id": 84109, "url": "https://patches.dpdk.org/api/patches/84109/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1605265789-12932-9-git-send-email-juraj.linkes@pantheon.tech/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1605265789-12932-9-git-send-email-juraj.linkes@pantheon.tech>", "list_archive_url": "https://inbox.dpdk.org/dev/1605265789-12932-9-git-send-email-juraj.linkes@pantheon.tech", "date": "2020-11-13T11:09:42", "name": "[v10,08/15] eal/arm: fix clang build of native target", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ba45d0938ccd124184ca8d5771448af8acac8d8b", "submitter": { "id": 1626, "url": "https://patches.dpdk.org/api/people/1626/?format=api", "name": "Juraj Linkeš", "email": "juraj.linkes@pantheon.tech" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1605265789-12932-9-git-send-email-juraj.linkes@pantheon.tech/mbox/", "series": [ { "id": 13869, "url": "https://patches.dpdk.org/api/series/13869/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13869", "date": "2020-11-13T11:09:35", "name": "Arm build options rework", "version": 10, "mbox": "https://patches.dpdk.org/series/13869/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/84109/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/84109/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9A345A09DE;\n\tFri, 13 Nov 2020 12:12:58 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 763B5C91C;\n\tFri, 13 Nov 2020 12:10:23 +0100 (CET)", "from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20])\n by dpdk.org (Postfix) with ESMTP id 76634C8D4;\n Fri, 13 Nov 2020 12:10:09 +0100 (CET)", "from localhost (localhost [127.0.0.1])\n by lb.pantheon.sk (Postfix) with ESMTP id ED52DB9979;\n Fri, 13 Nov 2020 12:10:06 +0100 (CET)", "from lb.pantheon.sk ([127.0.0.1])\n by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024)\n with ESMTP id 8q8gcrfAo-D1; Fri, 13 Nov 2020 12:10:05 +0100 (CET)", "from service-node1.lab.pantheon.local (unknown [46.229.239.141])\n by lb.pantheon.sk (Postfix) with ESMTP id 4F0A8B9978;\n Fri, 13 Nov 2020 12:09:57 +0100 (CET)" ], "X-Virus-Scanned": "amavisd-new at siecit.sk", "From": "=?utf-8?q?Juraj_Linke=C5=A1?= <juraj.linkes@pantheon.tech>", "To": "bruce.richardson@intel.com, Ruifeng.Wang@arm.com,\n Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com,\n Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com,\n ajit.khaparde@broadcom.com, ferruh.yigit@intel.com", "Cc": "dev@dpdk.org,\n\tRuifeng Wang <ruifeng.wang@arm.com>,\n\tstable@dpdk.org", "Date": "Fri, 13 Nov 2020 12:09:42 +0100", "Message-Id": "<1605265789-12932-9-git-send-email-juraj.linkes@pantheon.tech>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech>", "References": "<1605100718-7991-1-git-send-email-juraj.linkes@pantheon.tech>\n <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech>", "Subject": "[dpdk-dev] [PATCH v10 08/15] eal/arm: fix clang build of native\n\ttarget", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ruifeng Wang <ruifeng.wang@arm.com>\n\nWhen doing Clang build with '-mcpu=native' on N1 platform, build failed\nwith:\n../lib/librte_eal/arm/include/rte_atomic_64.h:76:39:\n\terror: instruction requires: lse\n__ATOMIC128_CAS_OP(__cas_128_release, \"caspl\")\n\nThis is because native detection for Neoverse N1 was added in Clang-11.\nPrior version of Clang's assembler doesn't know LSE support on hardware.\nFixed this for Clang earlier than version 11 by specifying architecture\nfor assembler.\nReferred to [1] for this fix.\n\nFixes: 7e2c3e17fe2c (\"eal/arm64: add 128-bit atomic compare exchange\")\nCc: stable@dpdk.org\n\n[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e0d5896bd356cd577f9710a02d7a474cdf58426b\n\nSigned-off-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n lib/librte_eal/arm/include/rte_atomic_64.h | 4 ++++\n 1 file changed, 4 insertions(+)", "diff": "diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h\nindex 2cef88629..7fcd17466 100644\n--- a/lib/librte_eal/arm/include/rte_atomic_64.h\n+++ b/lib/librte_eal/arm/include/rte_atomic_64.h\n@@ -46,6 +46,8 @@ rte_atomic_thread_fence(int memorder)\n /*------------------------ 128 bit atomic operations -------------------------*/\n \n #if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS)\n+#define __LSE_PREAMBLE\t\".arch armv8-a+lse\\n\"\n+\n #define __ATOMIC128_CAS_OP(cas_op_name, op_string) \\\n static __rte_noinline rte_int128_t \\\n cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) \\\n@@ -59,6 +61,7 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) \\\n \tregister uint64_t x2 __asm(\"x2\") = (uint64_t)updated.val[0]; \\\n \tregister uint64_t x3 __asm(\"x3\") = (uint64_t)updated.val[1]; \\\n \tasm volatile( \\\n+\t\t__LSE_PREAMBLE\t\t\t\t\t\t \\\n \t\top_string \" %[old0], %[old1], %[upd0], %[upd1], [%[dst]]\" \\\n \t\t: [old0] \"+r\" (x0), \\\n \t\t[old1] \"+r\" (x1) \\\n@@ -76,6 +79,7 @@ __ATOMIC128_CAS_OP(__cas_128_acquire, \"caspa\")\n __ATOMIC128_CAS_OP(__cas_128_release, \"caspl\")\n __ATOMIC128_CAS_OP(__cas_128_acq_rel, \"caspal\")\n \n+#undef __LSE_PREAMBLE\n #undef __ATOMIC128_CAS_OP\n \n #endif\n", "prefixes": [ "v10", "08/15" ] }