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GET /api/patches/84041/?format=api
{ "id": 84041, "url": "https://patches.dpdk.org/api/patches/84041/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201112052726.27376-1-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201112052726.27376-1-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201112052726.27376-1-alvinx.zhang@intel.com", "date": "2020-11-12T05:27:26", "name": "net/ice: support flow mark ID in avx512 path", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "19530b003cbad30fd796c7d63119290aeaeca8e4", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201112052726.27376-1-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 13827, "url": "https://patches.dpdk.org/api/series/13827/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13827", "date": "2020-11-12T05:27:26", "name": "net/ice: support flow mark ID in avx512 path", "version": 1, "mbox": "https://patches.dpdk.org/series/13827/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/84041/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/84041/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F1907A09D3;\n\tThu, 12 Nov 2020 06:27:40 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0FCD4593A;\n\tThu, 12 Nov 2020 06:27:39 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by dpdk.org (Postfix) with ESMTP id 34FCC592C;\n Thu, 12 Nov 2020 06:27:36 +0100 (CET)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Nov 2020 21:27:34 -0800", "from shwdenpg235.ccr.corp.intel.com ([10.240.182.60])\n by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Nov 2020 21:27:31 -0800" ], "IronPort-SDR": [ "\n 3gmqZsb7Ba2ef6DVyuD3+buYuM9+CIw3JUYM97zLnEsqilJ/EBLjtJ3nwebMXaH3v8xgpGsWfA\n W7o4e8JascCg==", "\n oZOklZSHku8+oj8oWDNb2hDmc7YRmbCB2qsZfWCT0V2TdVQ/kuNfNFlidm+6R76MfaKtiq4gCq\n 413Z57CUAABw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9802\"; a=\"170427705\"", "E=Sophos;i=\"5.77,471,1596524400\"; d=\"scan'208\";a=\"170427705\"", "E=Sophos;i=\"5.77,471,1596524400\"; d=\"scan'208\";a=\"531980841\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "From": "\"Zhang,Alvin\" <alvinx.zhang@intel.com>", "To": "qi.z.zhang@intel.com,\n\tleyi.rong@intel.com", "Cc": "dev@dpdk.org,\n\tAlvin Zhang <alvinx.zhang@intel.com>,\n\tstable@dpdk.org", "Date": "Thu, 12 Nov 2020 13:27:26 +0800", "Message-Id": "<20201112052726.27376-1-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 2.21.0.windows.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH] net/ice: support flow mark ID in avx512 path", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\nSupport flow director mark ID parsing from flexible Rx descriptor\nin avx512 path.\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n\nFixes: 59852468c19c (\"net/ice: support flow mark in AVX path\")\nCc: stable@dpdk.org\n---\n drivers/net/ice/ice_rxtx_vec_avx512.c | 65 +++++++++++++++++++++++++++++++++--\n 1 file changed, 63 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c b/drivers/net/ice/ice_rxtx_vec_avx512.c\nindex af6b324..6e99350 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx512.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx512.c\n@@ -128,6 +128,25 @@\n \tICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n }\n \n+static inline __m256i\n+ice_flex_rxd_to_fdir_flags_vec_avx2(const __m256i fdir_id0_7)\n+{\n+#define FDID_MIS_MAGIC 0xFFFFFFFF\n+\tRTE_BUILD_BUG_ON(PKT_RX_FDIR != (1 << 2));\n+\tRTE_BUILD_BUG_ON(PKT_RX_FDIR_ID != (1 << 13));\n+\tconst __m256i pkt_fdir_bit = _mm256_set1_epi32(PKT_RX_FDIR |\n+\t\t\tPKT_RX_FDIR_ID);\n+\t/* desc->flow_id field == 0xFFFFFFFF means fdir mismatch */\n+\tconst __m256i fdir_mis_mask = _mm256_set1_epi32(FDID_MIS_MAGIC);\n+\t__m256i fdir_mask = _mm256_cmpeq_epi32(fdir_id0_7,\n+\t\t\tfdir_mis_mask);\n+\t/* this XOR op results to bit-reverse the fdir_mask */\n+\tfdir_mask = _mm256_xor_si256(fdir_mask, fdir_mis_mask);\n+\tconst __m256i fdir_flags = _mm256_and_si256(fdir_mask, pkt_fdir_bit);\n+\n+\treturn fdir_flags;\n+}\n+\n static inline uint16_t\n _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,\n \t\t\t struct rte_mbuf **rx_pkts,\n@@ -441,8 +460,50 @@\n \t\t\t\t\t rss_vlan_flag_bits);\n \n \t\t/* merge flags */\n-\t\tconst __m256i mbuf_flags = _mm256_or_si256(l3_l4_flags,\n-\t\t\t\trss_vlan_flags);\n+\t\t__m256i mbuf_flags = _mm256_or_si256(l3_l4_flags,\n+\t\t\t\t\t\t rss_vlan_flags);\n+\n+\t\tif (rxq->fdir_enabled) {\n+\t\t\tconst __m256i fdir_id4_7 =\n+\t\t\t\t_mm256_unpackhi_epi32(raw_desc6_7, raw_desc4_5);\n+\n+\t\t\tconst __m256i fdir_id0_3 =\n+\t\t\t\t_mm256_unpackhi_epi32(raw_desc2_3, raw_desc0_1);\n+\n+\t\t\tconst __m256i fdir_id0_7 =\n+\t\t\t\t_mm256_unpackhi_epi64(fdir_id4_7, fdir_id0_3);\n+\n+\t\t\tconst __m256i fdir_flags =\n+\t\t\t\tice_flex_rxd_to_fdir_flags_vec_avx2(fdir_id0_7);\n+\n+\t\t\t/* merge with fdir_flags */\n+\t\t\tmbuf_flags = _mm256_or_si256(mbuf_flags, fdir_flags);\n+\n+\t\t\t/* write to mbuf: have to use scalar store here */\n+\t\t\trx_pkts[i + 0]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 3);\n+\n+\t\t\trx_pkts[i + 1]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 7);\n+\n+\t\t\trx_pkts[i + 2]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 2);\n+\n+\t\t\trx_pkts[i + 3]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 6);\n+\n+\t\t\trx_pkts[i + 4]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 1);\n+\n+\t\t\trx_pkts[i + 5]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 5);\n+\n+\t\t\trx_pkts[i + 6]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 0);\n+\n+\t\t\trx_pkts[i + 7]->hash.fdir.hi =\n+\t\t\t\t_mm256_extract_epi32(fdir_id0_7, 4);\n+\t\t} /* if() on fdir_enabled */\n \n #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n \t\t/**\n", "prefixes": [] }