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GET /api/patches/83598/?format=api
{ "id": 83598, "url": "https://patches.dpdk.org/api/patches/83598/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201103140931.488700-8-thomas@monjalon.net/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201103140931.488700-8-thomas@monjalon.net>", "list_archive_url": "https://inbox.dpdk.org/dev/20201103140931.488700-8-thomas@monjalon.net", "date": "2020-11-03T14:09:22", "name": "[v5,07/16] net/mlx5: switch Rx timestamp to dynamic mbuf field", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "82e65abd64266046b2d3aa1f5e3d4120c10bc3ab", "submitter": { "id": 685, "url": "https://patches.dpdk.org/api/people/685/?format=api", "name": "Thomas Monjalon", "email": "thomas@monjalon.net" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201103140931.488700-8-thomas@monjalon.net/mbox/", "series": [ { "id": 13621, "url": "https://patches.dpdk.org/api/series/13621/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13621", "date": "2020-11-03T14:09:15", "name": "remove mbuf timestamp", "version": 5, "mbox": "https://patches.dpdk.org/series/13621/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/83598/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/83598/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 19FF8A0521;\n\tTue, 3 Nov 2020 15:12:27 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BA45DCB41;\n\tTue, 3 Nov 2020 15:10:01 +0100 (CET)", "from new3-smtp.messagingengine.com (new3-smtp.messagingengine.com\n [66.111.4.229]) by dpdk.org (Postfix) with ESMTP id 74410CB41\n for <dev@dpdk.org>; Tue, 3 Nov 2020 15:09:59 +0100 (CET)", "from compute2.internal (compute2.nyi.internal [10.202.2.42])\n by mailnew.nyi.internal (Postfix) with ESMTP id AE074580A4B;\n Tue, 3 Nov 2020 09:09:57 -0500 (EST)", "from mailfrontend1 ([10.202.2.162])\n by compute2.internal (MEProxy); Tue, 03 Nov 2020 09:09:57 -0500", "from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184])\n by mail.messagingengine.com (Postfix) with ESMTPA id DF3323280064;\n Tue, 3 Nov 2020 09:09:54 -0500 (EST)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding; s=fm2; bh=gzjtSqUCetq5u\n YjUfBb14jldgTgKWZE7/jp2mQqSpGU=; b=nVPOPlaagc9xETH7s3DZ4KSCrVbOR\n GJ8CvAlsRZ+pSqPdcIAXFtXfxn/Ji1TjQgfh5g3ZN0Ji6zzJaIQFI4JgGvyM4+Bk\n qBy7c7DvV6+IMhDe6tsSeprmkeTI8x2V220VBvuPNS4559+RiO5JgQJIdsKSAwv+\n N8rhG4JkX6vgxyNNhKljUpmnAByRaZ1O6WZawt2au8cCQQWGDVIkk9FXIj9oJmsa\n KDPW9JiVA5dHqr/BydohCqM2wxyESNk2wlnI5j5Dwy0poo90HuFNtip2OxFOhpy/\n yEs4mYT0F73P7+9ZWHualFhrC1MhbxlpvQO/C5GTbKxOFlwrbEXq0AzrQ==", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n messagingengine.com; h=cc:content-transfer-encoding:date:from\n :in-reply-to:message-id:mime-version:references:subject:to\n :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=\n fm1; bh=gzjtSqUCetq5uYjUfBb14jldgTgKWZE7/jp2mQqSpGU=; b=UAum1+Zt\n VMZsl6CcH++nxXsgX7CFGizVwFwAO+Qtkv0ptFGhazuUevoZbKqzAZXGoSM2SwiV\n XEQl/JA/x0ZLmDVRrlsDtikAUGxHLCpDJW8XizEMSgejAO9SMUjXtwbGB34bINei\n 1ABgcRidKWqa263jccSRYPK0cTvodR+q9wgGinr7OUYG109RN7dGmodgotR7uWoq\n GhwhxD2eWA/fqiclP5tpUuQPCgdRSIvqTFXH5iTqtmkBCirbzlAl7Jogq6n9LO68\n bdOdjPzAp15aujoE7wmxc4l6T/hnwa/bSFsyTSwg3CV6yU5LWukKl5+LN0ivF7zT\n +CQ8GutVKTpD4A==" ], "X-ME-Sender": "<xms:tGShX9tPRxKr8cQ4fNFpNpyuibvNSAS56Qx1F0f5v3BnkEzUNNtSNw>\n <xme:tGShX2fe9alXVR58WTrpCHaWujMfonhO2nsrT1AvpvKmR04kSu3K5Rve1zlhToJpe\n GI4lljo1q04CntO5A>", "X-ME-Proxy-Cause": "\n gggruggvucftvghtrhhoucdtuddrgedujedruddtfedgheekucetufdoteggodetrfdotf\n fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen\n uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne\n cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefvhhhomhgr\n shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg\n ftrfgrthhtvghrnhepvdehgfeivdejgedtveehfefhteelfefgieevgfffveefjeegtdfg\n uedthedtgeevnecukfhppeejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghruf\n hiiigvpeehnecurfgrrhgrmhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghl\n ohhnrdhnvght", "X-ME-Proxy": "<xmx:tGShXwyU1JNIVSbGjgXQ5lCaBYzBVMEBM9RWSr2QKwcV7t0FwJUSQw>\n <xmx:tGShX0M9eRY0YJmIBpnL6z6oT5pNkBJ5gViTra1FuYSg2mYaiApAbA>\n <xmx:tGShX98LsU46kFdlXvoI1n29TeSr7MrBrF3jFSOQ9VzkH4nYE-VZNQ>\n <xmx:tWShX-1Tfu4EHW10k-H33MEcV72IKonLcEewvpTu6Y2mLnThU0pwgA>", "From": "Thomas Monjalon <thomas@monjalon.net>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com, david.marchand@redhat.com,\n bruce.richardson@intel.com, olivier.matz@6wind.com,\n andrew.rybchenko@oktetlabs.ru, jerinj@marvell.com, viacheslavo@nvidia.com,\n Ruifeng Wang <ruifeng.wang@arm.com>,\n David Christensen <drc@linux.vnet.ibm.com>, Matan Azrad <matan@nvidia.com>,\n Shahaf Shuler <shahafs@nvidia.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>", "Date": "Tue, 3 Nov 2020 15:09:22 +0100", "Message-Id": "<20201103140931.488700-8-thomas@monjalon.net>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20201103140931.488700-1-thomas@monjalon.net>", "References": "<20201029092751.3837177-1-thomas@monjalon.net>\n <20201103140931.488700-1-thomas@monjalon.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 07/16] net/mlx5: switch Rx timestamp to\n\tdynamic mbuf field", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The mbuf timestamp is moved to a dynamic field\nin order to allow removal of the deprecated static field.\nThe related mbuf flag is also replaced.\n\nThe dynamic offset and flag are stored in struct mlx5_rxq_data\nto favor cache locality.\n\nSigned-off-by: Thomas Monjalon <thomas@monjalon.net>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\nReviewed-by: David Christensen <drc@linux.vnet.ibm.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\nAcked-by: David Marchand <david.marchand@redhat.com>\n---\n drivers/net/mlx5/mlx5_rxq.c | 8 +++++\n drivers/net/mlx5/mlx5_rxtx.c | 4 +--\n drivers/net/mlx5/mlx5_rxtx.h | 19 +++++++++++\n drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 41 +++++++++++-----------\n drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 43 ++++++++++++------------\n drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 35 +++++++++----------\n 6 files changed, 90 insertions(+), 60 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex f1d8373079..52519910ee 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1492,7 +1492,15 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \tmlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);\n \t/* Toggle RX checksum offload if hardware supports it. */\n \ttmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);\n+\t/* Configure Rx timestamp. */\n \ttmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);\n+\ttmpl->rxq.timestamp_rx_flag = 0;\n+\tif (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(\n+\t\t\t&tmpl->rxq.timestamp_offset,\n+\t\t\t&tmpl->rxq.timestamp_rx_flag) != 0) {\n+\t\tDRV_LOG(ERR, \"Cannot register Rx timestamp field/flag\");\n+\t\tgoto error;\n+\t}\n \t/* Configure VLAN stripping. */\n \ttmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);\n \t/* By default, FCS (CRC) is stripped by hardware. */\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex e86468b67a..b577aab00b 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -1287,8 +1287,8 @@ rxq_cq_to_mbuf(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt,\n \n \t\tif (rxq->rt_timestamp)\n \t\t\tts = mlx5_txpp_convert_rx_ts(rxq->sh, ts);\n-\t\tpkt->timestamp = ts;\n-\t\tpkt->ol_flags |= PKT_RX_TIMESTAMP;\n+\t\tmlx5_timestamp_set(pkt, rxq->timestamp_offset, ts);\n+\t\tpkt->ol_flags |= rxq->timestamp_rx_flag;\n \t}\n }\n \ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 674296ee98..e9eca36b40 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -151,6 +151,8 @@ struct mlx5_rxq_data {\n \t/* CQ (UAR) access lock required for 32bit implementations */\n #endif\n \tuint32_t tunnel; /* Tunnel information. */\n+\tint timestamp_offset; /* Dynamic mbuf field for timestamp. */\n+\tuint64_t timestamp_rx_flag; /* Dynamic mbuf flag for timestamp. */\n \tuint64_t flow_meta_mask;\n \tint32_t flow_meta_offset;\n } __rte_cache_aligned;\n@@ -681,4 +683,21 @@ mlx5_txpp_convert_tx_ts(struct mlx5_dev_ctx_shared *sh, uint64_t mts)\n \treturn ci;\n }\n \n+/**\n+ * Set timestamp in mbuf dynamic field.\n+ *\n+ * @param mbuf\n+ * Structure to write into.\n+ * @param offset\n+ * Dynamic field offset in mbuf structure.\n+ * @param timestamp\n+ * Value to write.\n+ */\n+static __rte_always_inline void\n+mlx5_timestamp_set(struct rte_mbuf *mbuf, int offset,\n+\t\trte_mbuf_timestamp_t timestamp)\n+{\n+\t*RTE_MBUF_DYNFIELD(mbuf, offset, rte_mbuf_timestamp_t *) = timestamp;\n+}\n+\n #endif /* RTE_PMD_MLX5_RXTX_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\nindex 6bf0c9b540..171d7bb0f8 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n@@ -330,13 +330,13 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,\n \tvector unsigned char ol_flags = (vector unsigned char)\n \t\t(vector unsigned int){\n \t\t\trxq->rss_hash * PKT_RX_RSS_HASH |\n-\t\t\t\trxq->hw_timestamp * PKT_RX_TIMESTAMP,\n+\t\t\t\trxq->hw_timestamp * rxq->timestamp_rx_flag,\n \t\t\trxq->rss_hash * PKT_RX_RSS_HASH |\n-\t\t\t\trxq->hw_timestamp * PKT_RX_TIMESTAMP,\n+\t\t\t\trxq->hw_timestamp * rxq->timestamp_rx_flag,\n \t\t\trxq->rss_hash * PKT_RX_RSS_HASH |\n-\t\t\t\trxq->hw_timestamp * PKT_RX_TIMESTAMP,\n+\t\t\t\trxq->hw_timestamp * rxq->timestamp_rx_flag,\n \t\t\trxq->rss_hash * PKT_RX_RSS_HASH |\n-\t\t\t\trxq->hw_timestamp * PKT_RX_TIMESTAMP};\n+\t\t\t\trxq->hw_timestamp * rxq->timestamp_rx_flag};\n \tvector unsigned char cv_flags;\n \tconst vector unsigned char zero = (vector unsigned char){0};\n \tconst vector unsigned char ptype_mask =\n@@ -1025,31 +1025,32 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,\n \t\t/* D.5 fill in mbuf - rearm_data and packet_type. */\n \t\trxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);\n \t\tif (rxq->hw_timestamp) {\n+\t\t\tint offset = rxq->timestamp_offset;\n \t\t\tif (rxq->rt_timestamp) {\n \t\t\t\tstruct mlx5_dev_ctx_shared *sh = rxq->sh;\n \t\t\t\tuint64_t ts;\n \n \t\t\t\tts = rte_be_to_cpu_64(cq[pos].timestamp);\n-\t\t\t\tpkts[pos]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64(cq[pos + p1].timestamp);\n-\t\t\t\tpkts[pos + 1]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 1], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64(cq[pos + p2].timestamp);\n-\t\t\t\tpkts[pos + 2]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 2], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64(cq[pos + p3].timestamp);\n-\t\t\t\tpkts[pos + 3]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 3], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t} else {\n-\t\t\t\tpkts[pos]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos].timestamp);\n-\t\t\t\tpkts[pos + 1]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos + p1].timestamp);\n-\t\t\t\tpkts[pos + 2]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos + p2].timestamp);\n-\t\t\t\tpkts[pos + 3]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos + p3].timestamp);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos].timestamp));\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 1], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos + p1].timestamp));\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 2], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos + p2].timestamp));\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 3], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos + p3].timestamp));\n \t\t\t}\n \t\t}\n \t\tif (rxq->dynf_meta) {\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\nindex d122dad4fe..436b247ade 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n@@ -271,7 +271,7 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,\n \tuint32x4_t pinfo, cv_flags;\n \tuint32x4_t ol_flags =\n \t\tvdupq_n_u32(rxq->rss_hash * PKT_RX_RSS_HASH |\n-\t\t\t rxq->hw_timestamp * PKT_RX_TIMESTAMP);\n+\t\t\t rxq->hw_timestamp * rxq->timestamp_rx_flag);\n \tconst uint32x4_t ptype_ol_mask = { 0x106, 0x106, 0x106, 0x106 };\n \tconst uint8x16_t cv_flag_sel = {\n \t\t0,\n@@ -697,6 +697,7 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,\n \t\trxq_cq_to_ptype_oflags_v(rxq, ptype_info, flow_tag,\n \t\t\t\t\t opcode, &elts[pos]);\n \t\tif (rxq->hw_timestamp) {\n+\t\t\tint offset = rxq->timestamp_offset;\n \t\t\tif (rxq->rt_timestamp) {\n \t\t\t\tstruct mlx5_dev_ctx_shared *sh = rxq->sh;\n \t\t\t\tuint64_t ts;\n@@ -704,36 +705,36 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,\n \t\t\t\tts = rte_be_to_cpu_64\n \t\t\t\t\t(container_of(p0, struct mlx5_cqe,\n \t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(elts[pos], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64\n \t\t\t\t\t(container_of(p1, struct mlx5_cqe,\n \t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos + 1]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(elts[pos + 1], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64\n \t\t\t\t\t(container_of(p2, struct mlx5_cqe,\n \t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos + 2]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(elts[pos + 2], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64\n \t\t\t\t\t(container_of(p3, struct mlx5_cqe,\n \t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos + 3]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(elts[pos + 3], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t} else {\n-\t\t\t\telts[pos]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t(container_of(p0, struct mlx5_cqe,\n-\t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos + 1]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t(container_of(p1, struct mlx5_cqe,\n-\t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos + 2]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t(container_of(p2, struct mlx5_cqe,\n-\t\t\t\t\t\t pkt_info)->timestamp);\n-\t\t\t\telts[pos + 3]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t(container_of(p3, struct mlx5_cqe,\n-\t\t\t\t\t\t pkt_info)->timestamp);\n+\t\t\t\tmlx5_timestamp_set(elts[pos], offset,\n+\t\t\t\t\trte_be_to_cpu_64(container_of(p0,\n+\t\t\t\t\tstruct mlx5_cqe, pkt_info)->timestamp));\n+\t\t\t\tmlx5_timestamp_set(elts[pos + 1], offset,\n+\t\t\t\t\trte_be_to_cpu_64(container_of(p1,\n+\t\t\t\t\tstruct mlx5_cqe, pkt_info)->timestamp));\n+\t\t\t\tmlx5_timestamp_set(elts[pos + 2], offset,\n+\t\t\t\t\trte_be_to_cpu_64(container_of(p2,\n+\t\t\t\t\tstruct mlx5_cqe, pkt_info)->timestamp));\n+\t\t\t\tmlx5_timestamp_set(elts[pos + 3], offset,\n+\t\t\t\t\trte_be_to_cpu_64(container_of(p3,\n+\t\t\t\t\tstruct mlx5_cqe, pkt_info)->timestamp));\n \t\t\t}\n \t\t}\n \t\tif (rxq->dynf_meta) {\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\nindex 0bbcbeefff..ae4439efc7 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n@@ -251,7 +251,7 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],\n \t__m128i pinfo0, pinfo1;\n \t__m128i pinfo, ptype;\n \t__m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |\n-\t\t\t\t\t rxq->hw_timestamp * PKT_RX_TIMESTAMP);\n+\t\t\t\t\t rxq->hw_timestamp * rxq->timestamp_rx_flag);\n \t__m128i cv_flags;\n \tconst __m128i zero = _mm_setzero_si128();\n \tconst __m128i ptype_mask =\n@@ -656,31 +656,32 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,\n \t\t/* D.5 fill in mbuf - rearm_data and packet_type. */\n \t\trxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);\n \t\tif (rxq->hw_timestamp) {\n+\t\t\tint offset = rxq->timestamp_offset;\n \t\t\tif (rxq->rt_timestamp) {\n \t\t\t\tstruct mlx5_dev_ctx_shared *sh = rxq->sh;\n \t\t\t\tuint64_t ts;\n \n \t\t\t\tts = rte_be_to_cpu_64(cq[pos].timestamp);\n-\t\t\t\tpkts[pos]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64(cq[pos + p1].timestamp);\n-\t\t\t\tpkts[pos + 1]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 1], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64(cq[pos + p2].timestamp);\n-\t\t\t\tpkts[pos + 2]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 2], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t\tts = rte_be_to_cpu_64(cq[pos + p3].timestamp);\n-\t\t\t\tpkts[pos + 3]->timestamp =\n-\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 3], offset,\n+\t\t\t\t\tmlx5_txpp_convert_rx_ts(sh, ts));\n \t\t\t} else {\n-\t\t\t\tpkts[pos]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos].timestamp);\n-\t\t\t\tpkts[pos + 1]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos + p1].timestamp);\n-\t\t\t\tpkts[pos + 2]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos + p2].timestamp);\n-\t\t\t\tpkts[pos + 3]->timestamp = rte_be_to_cpu_64\n-\t\t\t\t\t\t(cq[pos + p3].timestamp);\n+\t\t\t\tmlx5_timestamp_set(pkts[pos], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos].timestamp));\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 1], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos + p1].timestamp));\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 2], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos + p2].timestamp));\n+\t\t\t\tmlx5_timestamp_set(pkts[pos + 3], offset,\n+\t\t\t\t\trte_be_to_cpu_64(cq[pos + p3].timestamp));\n \t\t\t}\n \t\t}\n \t\tif (rxq->dynf_meta) {\n", "prefixes": [ "v5", "07/16" ] }