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GET /api/patches/83542/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 83542,
    "url": "https://patches.dpdk.org/api/patches/83542/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201103100818.311881-22-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201103100818.311881-22-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201103100818.311881-22-jiawenwu@trustnetic.com",
    "date": "2020-11-03T10:08:02",
    "name": "[21/37] net/txgbe: add filter list init and uninit",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "29f281a6f112ee2f9c810476c6af5d0b98f99d36",
    "submitter": {
        "id": 1932,
        "url": "https://patches.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201103100818.311881-22-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 13612,
            "url": "https://patches.dpdk.org/api/series/13612/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13612",
            "date": "2020-11-03T10:07:42",
            "name": "net: add txgbe PMD part 2",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/13612/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/83542/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/83542/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BD6D2A0521;\n\tTue,  3 Nov 2020 11:15:00 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 43C6ECA2C;\n\tTue,  3 Nov 2020 11:07:37 +0100 (CET)",
            "from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128])\n by dpdk.org (Postfix) with ESMTP id C5D79C98C\n for <dev@dpdk.org>; Tue,  3 Nov 2020 11:07:22 +0100 (CET)",
            "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp10.qq.com (ESMTP) with\n id ; Tue, 03 Nov 2020 18:07:18 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp26t1604398038thqvh356",
        "X-QQ-SSF": "01400000002000C0C000B00A0000000",
        "X-QQ-FEAT": "F98/UaRJD4Q50H3QvCygfNWAcZdVEwOikCMEmM8ZgHMiQpjy7VRNrOex/NjuZ\n DcdbxtHWmOmAqjorMr1ABGUBcZGatIRCzkAlNIFemBUPw8JOhFByLkh0m9GBt5+46vL2H/5\n FtLPw/dFqqOpbcUw+01x2lhvarwGbZSTQGtqGD3ZwI54yKWDitP2zeMt7mnGoYMEWdtaphB\n XrpDbGgiRzwGmA7akJO8bQ/3/nbukKQHA5CeUl7BXuRm13D2AIc6S5n2f20Ap07i3CGGfmc\n Xk+LyPfUH0ZzlULOU7Kp/ZOruLejXxf4RRWNcGG8Q5F1ST1exCI19aHXoG402wUplbWmXa7\n qmJiJbxpVbupJqI4ffe3lgNBEQ2rA==",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "Date": "Tue,  3 Nov 2020 18:08:02 +0800",
        "Message-Id": "<20201103100818.311881-22-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.18.4",
        "In-Reply-To": "<20201103100818.311881-1-jiawenwu@trustnetic.com>",
        "References": "<20201103100818.311881-1-jiawenwu@trustnetic.com>",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH 21/37] net/txgbe: add filter list init and uninit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add filter list init and uninit.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/txgbe_ethdev.c |   6 ++\n drivers/net/txgbe/txgbe_ethdev.h |   8 ++\n drivers/net/txgbe/txgbe_flow.c   | 127 +++++++++++++++++++++++++++++++\n 3 files changed, 141 insertions(+)",
    "diff": "diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 5ed96479e..45a785fec 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -698,6 +698,9 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \t/* initialize l2 tunnel filter list & hash */\n \ttxgbe_l2_tn_filter_init(eth_dev);\n \n+\t/* initialize flow filter lists */\n+\ttxgbe_filterlist_init();\n+\n \t/* initialize bandwidth configuration info */\n \tmemset(bw_conf, 0, sizeof(struct txgbe_bw_conf));\n \n@@ -1941,6 +1944,9 @@ txgbe_dev_close(struct rte_eth_dev *dev)\n \t/* Remove all ntuple filters of the device */\n \ttxgbe_ntuple_filter_uninit(dev);\n \n+\t/* clear all the filters list */\n+\ttxgbe_filterlist_flush();\n+\n \treturn ret;\n }\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex df7a14506..e12324404 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -263,6 +263,11 @@ struct txgbe_l2_tn_info {\n \tuint16_t e_tag_ether_type; /* ether type for e-tag */\n };\n \n+struct rte_flow {\n+\tenum rte_filter_type filter_type;\n+\tvoid *rule;\n+};\n+\n /* The configuration of bandwidth */\n struct txgbe_bw_conf {\n \tuint8_t tc_num; /* Number of TCs. */\n@@ -448,6 +453,9 @@ txgbe_dev_l2_tunnel_filter_add(struct rte_eth_dev *dev,\n int\n txgbe_dev_l2_tunnel_filter_del(struct rte_eth_dev *dev,\n \t\t\t       struct txgbe_l2_tunnel_conf *l2_tunnel);\n+void txgbe_filterlist_init(void);\n+void txgbe_filterlist_flush(void);\n+\n void txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,\n \t\t\t       uint8_t queue, uint8_t msix_vector);\n \ndiff --git a/drivers/net/txgbe/txgbe_flow.c b/drivers/net/txgbe/txgbe_flow.c\nindex 0d90ef33a..77e025863 100644\n--- a/drivers/net/txgbe/txgbe_flow.c\n+++ b/drivers/net/txgbe/txgbe_flow.c\n@@ -16,6 +16,7 @@\n #include <rte_cycles.h>\n \n #include <rte_bus_pci.h>\n+#include <rte_malloc.h>\n #include <rte_hash_crc.h>\n #include <rte_flow.h>\n #include <rte_flow_driver.h>\n@@ -29,6 +30,58 @@\n #define TXGBE_MAX_N_TUPLE_PRIO 7\n #define TXGBE_MAX_FLX_SOURCE_OFF 62\n \n+/* ntuple filter list structure */\n+struct txgbe_ntuple_filter_ele {\n+\tTAILQ_ENTRY(txgbe_ntuple_filter_ele) entries;\n+\tstruct rte_eth_ntuple_filter filter_info;\n+};\n+/* ethertype filter list structure */\n+struct txgbe_ethertype_filter_ele {\n+\tTAILQ_ENTRY(txgbe_ethertype_filter_ele) entries;\n+\tstruct rte_eth_ethertype_filter filter_info;\n+};\n+/* syn filter list structure */\n+struct txgbe_eth_syn_filter_ele {\n+\tTAILQ_ENTRY(txgbe_eth_syn_filter_ele) entries;\n+\tstruct rte_eth_syn_filter filter_info;\n+};\n+/* fdir filter list structure */\n+struct txgbe_fdir_rule_ele {\n+\tTAILQ_ENTRY(txgbe_fdir_rule_ele) entries;\n+\tstruct txgbe_fdir_rule filter_info;\n+};\n+/* l2_tunnel filter list structure */\n+struct txgbe_eth_l2_tunnel_conf_ele {\n+\tTAILQ_ENTRY(txgbe_eth_l2_tunnel_conf_ele) entries;\n+\tstruct txgbe_l2_tunnel_conf filter_info;\n+};\n+/* rss filter list structure */\n+struct txgbe_rss_conf_ele {\n+\tTAILQ_ENTRY(txgbe_rss_conf_ele) entries;\n+\tstruct txgbe_rte_flow_rss_conf filter_info;\n+};\n+/* txgbe_flow memory list structure */\n+struct txgbe_flow_mem {\n+\tTAILQ_ENTRY(txgbe_flow_mem) entries;\n+\tstruct rte_flow *flow;\n+};\n+\n+TAILQ_HEAD(txgbe_ntuple_filter_list, txgbe_ntuple_filter_ele);\n+TAILQ_HEAD(txgbe_ethertype_filter_list, txgbe_ethertype_filter_ele);\n+TAILQ_HEAD(txgbe_syn_filter_list, txgbe_eth_syn_filter_ele);\n+TAILQ_HEAD(txgbe_fdir_rule_filter_list, txgbe_fdir_rule_ele);\n+TAILQ_HEAD(txgbe_l2_tunnel_filter_list, txgbe_eth_l2_tunnel_conf_ele);\n+TAILQ_HEAD(txgbe_rss_filter_list, txgbe_rss_conf_ele);\n+TAILQ_HEAD(txgbe_flow_mem_list, txgbe_flow_mem);\n+\n+static struct txgbe_ntuple_filter_list filter_ntuple_list;\n+static struct txgbe_ethertype_filter_list filter_ethertype_list;\n+static struct txgbe_syn_filter_list filter_syn_list;\n+static struct txgbe_fdir_rule_filter_list filter_fdir_list;\n+static struct txgbe_l2_tunnel_filter_list filter_l2_tunnel_list;\n+static struct txgbe_rss_filter_list filter_rss_list;\n+static struct txgbe_flow_mem_list txgbe_flow_list;\n+\n /**\n  * Endless loop will never happen with below assumption\n  * 1. there is at least one no-void item(END)\n@@ -2502,3 +2555,77 @@ txgbe_parse_rss_filter(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+void\n+txgbe_filterlist_init(void)\n+{\n+\tTAILQ_INIT(&filter_ntuple_list);\n+\tTAILQ_INIT(&filter_ethertype_list);\n+\tTAILQ_INIT(&filter_syn_list);\n+\tTAILQ_INIT(&filter_fdir_list);\n+\tTAILQ_INIT(&filter_l2_tunnel_list);\n+\tTAILQ_INIT(&filter_rss_list);\n+\tTAILQ_INIT(&txgbe_flow_list);\n+}\n+\n+void\n+txgbe_filterlist_flush(void)\n+{\n+\tstruct txgbe_ntuple_filter_ele *ntuple_filter_ptr;\n+\tstruct txgbe_ethertype_filter_ele *ethertype_filter_ptr;\n+\tstruct txgbe_eth_syn_filter_ele *syn_filter_ptr;\n+\tstruct txgbe_eth_l2_tunnel_conf_ele *l2_tn_filter_ptr;\n+\tstruct txgbe_fdir_rule_ele *fdir_rule_ptr;\n+\tstruct txgbe_flow_mem *txgbe_flow_mem_ptr;\n+\tstruct txgbe_rss_conf_ele *rss_filter_ptr;\n+\n+\twhile ((ntuple_filter_ptr = TAILQ_FIRST(&filter_ntuple_list))) {\n+\t\tTAILQ_REMOVE(&filter_ntuple_list,\n+\t\t\t\t ntuple_filter_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(ntuple_filter_ptr);\n+\t}\n+\n+\twhile ((ethertype_filter_ptr = TAILQ_FIRST(&filter_ethertype_list))) {\n+\t\tTAILQ_REMOVE(&filter_ethertype_list,\n+\t\t\t\t ethertype_filter_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(ethertype_filter_ptr);\n+\t}\n+\n+\twhile ((syn_filter_ptr = TAILQ_FIRST(&filter_syn_list))) {\n+\t\tTAILQ_REMOVE(&filter_syn_list,\n+\t\t\t\t syn_filter_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(syn_filter_ptr);\n+\t}\n+\n+\twhile ((l2_tn_filter_ptr = TAILQ_FIRST(&filter_l2_tunnel_list))) {\n+\t\tTAILQ_REMOVE(&filter_l2_tunnel_list,\n+\t\t\t\t l2_tn_filter_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(l2_tn_filter_ptr);\n+\t}\n+\n+\twhile ((fdir_rule_ptr = TAILQ_FIRST(&filter_fdir_list))) {\n+\t\tTAILQ_REMOVE(&filter_fdir_list,\n+\t\t\t\t fdir_rule_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(fdir_rule_ptr);\n+\t}\n+\n+\twhile ((rss_filter_ptr = TAILQ_FIRST(&filter_rss_list))) {\n+\t\tTAILQ_REMOVE(&filter_rss_list,\n+\t\t\t\t rss_filter_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(rss_filter_ptr);\n+\t}\n+\n+\twhile ((txgbe_flow_mem_ptr = TAILQ_FIRST(&txgbe_flow_list))) {\n+\t\tTAILQ_REMOVE(&txgbe_flow_list,\n+\t\t\t\t txgbe_flow_mem_ptr,\n+\t\t\t\t entries);\n+\t\trte_free(txgbe_flow_mem_ptr->flow);\n+\t\trte_free(txgbe_flow_mem_ptr);\n+\t}\n+}\n+\n",
    "prefixes": [
        "21/37"
    ]
}