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GET /api/patches/83447/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 83447,
    "url": "https://patches.dpdk.org/api/patches/83447/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201102235203.6342-5-dharmik.thakkar@arm.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201102235203.6342-5-dharmik.thakkar@arm.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201102235203.6342-5-dharmik.thakkar@arm.com",
    "date": "2020-11-02T23:52:03",
    "name": "[v2,4/4] test/lpm: avoid code duplication in rcu qsbr perf",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "924a475f320281c575bfda7a74933b644b254c0d",
    "submitter": {
        "id": 1108,
        "url": "https://patches.dpdk.org/api/people/1108/?format=api",
        "name": "Dharmik Thakkar",
        "email": "dharmik.thakkar@arm.com"
    },
    "delegate": {
        "id": 24651,
        "url": "https://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201102235203.6342-5-dharmik.thakkar@arm.com/mbox/",
    "series": [
        {
            "id": 13584,
            "url": "https://patches.dpdk.org/api/series/13584/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13584",
            "date": "2020-11-02T23:51:59",
            "name": "test/lpm: fix rcu qsbr perf test",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/13584/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/83447/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/83447/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9F1ECA04E7;\n\tTue,  3 Nov 2020 00:55:05 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 206004C7A;\n\tTue,  3 Nov 2020 00:54:48 +0100 (CET)",
            "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 904BC354D\n for <dev@dpdk.org>; Tue,  3 Nov 2020 00:54:44 +0100 (CET)",
            "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A4A33143D;\n Mon,  2 Nov 2020 15:54:42 -0800 (PST)",
            "from localhost.localdomain (2p2660v4-1.austin.arm.com\n [10.118.13.220])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9CDEA3F718;\n Mon,  2 Nov 2020 15:54:42 -0800 (PST)"
        ],
        "From": "Dharmik Thakkar <dharmik.thakkar@arm.com>",
        "To": "Bruce Richardson <bruce.richardson@intel.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>",
        "Cc": "dev@dpdk.org,\n\tnd@arm.com,\n\tDharmik Thakkar <dharmik.thakkar@arm.com>",
        "Date": "Mon,  2 Nov 2020 17:52:03 -0600",
        "Message-Id": "<20201102235203.6342-5-dharmik.thakkar@arm.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20201102235203.6342-1-dharmik.thakkar@arm.com>",
        "References": "<20201029153634.10647-1-dharmik.thakkar@arm.com>\n <20201102235203.6342-1-dharmik.thakkar@arm.com>",
        "Subject": "[dpdk-dev] [PATCH v2 4/4] test/lpm: avoid code duplication in rcu\n\tqsbr perf",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Avoid code duplication by combining single and multi threaded tests\n\nSigned-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n app/test/test_lpm_perf.c | 362 ++++++++++-----------------------------\n 1 file changed, 91 insertions(+), 271 deletions(-)",
    "diff": "diff --git a/app/test/test_lpm_perf.c b/app/test/test_lpm_perf.c\nindex 224c92fa3d65..229c835c23f7 100644\n--- a/app/test/test_lpm_perf.c\n+++ b/app/test/test_lpm_perf.c\n@@ -67,6 +67,12 @@ enum {\n \tIP_CLASS_C\n };\n \n+enum {\n+\tSINGLE_WRITER = 1,\n+\tMULTI_WRITER_1,\n+\tMULTI_WRITER_2\n+};\n+\n /* struct route_rule_count defines the total number of rules in following a/b/c\n  * each item in a[]/b[]/c[] is the number of common IP address class A/B/C, not\n  * including the ones for private local network.\n@@ -430,11 +436,16 @@ test_lpm_rcu_qsbr_writer(void *arg)\n {\n \tunsigned int i, j, si, ei;\n \tuint64_t begin, total_cycles;\n-\tuint8_t core_id = (uint8_t)((uintptr_t)arg);\n+\tuint8_t writer_id = (uint8_t)((uintptr_t)arg);\n \tuint32_t next_hop_add = 0xAA;\n \n-\t/* 2 writer threads are used */\n-\tif (core_id % 2 == 0) {\n+\t/* Single writer (writer_id = 1) */\n+\tif (writer_id == SINGLE_WRITER) {\n+\t\tsi = 0;\n+\t\tei = NUM_LDEPTH_ROUTE_ENTRIES;\n+\t}\n+\t/* 2 Writers (writer_id = 2/3)*/\n+\telse if (writer_id == MULTI_WRITER_1) {\n \t\tsi = 0;\n \t\tei = NUM_LDEPTH_ROUTE_ENTRIES / 2;\n \t} else {\n@@ -447,29 +458,35 @@ test_lpm_rcu_qsbr_writer(void *arg)\n \tfor (i = 0; i < RCU_ITERATIONS; i++) {\n \t\t/* Add all the entries */\n \t\tfor (j = si; j < ei; j++) {\n-\t\t\tpthread_mutex_lock(&lpm_mutex);\n+\t\t\tif (writer_id != SINGLE_WRITER)\n+\t\t\t\tpthread_mutex_lock(&lpm_mutex);\n \t\t\tif (rte_lpm_add(lpm, large_ldepth_route_table[j].ip,\n \t\t\t\t\tlarge_ldepth_route_table[j].depth,\n \t\t\t\t\tnext_hop_add) != 0) {\n \t\t\t\tprintf(\"Failed to add iteration %d, route# %d\\n\",\n \t\t\t\t\ti, j);\n-\t\t\t\tpthread_mutex_unlock(&lpm_mutex);\n+\t\t\t\tif (writer_id != SINGLE_WRITER)\n+\t\t\t\t\tpthread_mutex_unlock(&lpm_mutex);\n \t\t\t\treturn -1;\n \t\t\t}\n-\t\t\tpthread_mutex_unlock(&lpm_mutex);\n+\t\t\tif (writer_id != SINGLE_WRITER)\n+\t\t\t\tpthread_mutex_unlock(&lpm_mutex);\n \t\t}\n \n \t\t/* Delete all the entries */\n \t\tfor (j = si; j < ei; j++) {\n-\t\t\tpthread_mutex_lock(&lpm_mutex);\n+\t\t\tif (writer_id != SINGLE_WRITER)\n+\t\t\t\tpthread_mutex_lock(&lpm_mutex);\n \t\t\tif (rte_lpm_delete(lpm, large_ldepth_route_table[j].ip,\n \t\t\t\tlarge_ldepth_route_table[j].depth) != 0) {\n \t\t\t\tprintf(\"Failed to delete iteration %d, route# %d\\n\",\n \t\t\t\t\ti, j);\n-\t\t\t\tpthread_mutex_unlock(&lpm_mutex);\n+\t\t\t\tif (writer_id != SINGLE_WRITER)\n+\t\t\t\t\tpthread_mutex_unlock(&lpm_mutex);\n \t\t\t\treturn -1;\n \t\t\t}\n-\t\t\tpthread_mutex_unlock(&lpm_mutex);\n+\t\t\tif (writer_id != SINGLE_WRITER)\n+\t\t\t\tpthread_mutex_unlock(&lpm_mutex);\n \t\t}\n \t}\n \n@@ -482,16 +499,17 @@ test_lpm_rcu_qsbr_writer(void *arg)\n \n /*\n  * Functional test:\n- * 2 writers, rest are readers\n+ * 1/2 writers, rest are readers\n  */\n static int\n-test_lpm_rcu_perf_multi_writer(void)\n+test_lpm_rcu_perf_multi_writer(uint8_t use_rcu)\n {\n \tstruct rte_lpm_config config;\n \tsize_t sz;\n-\tunsigned int i;\n+\tunsigned int i, j;\n \tuint16_t core_id;\n \tstruct rte_lpm_rcu_config rcu_cfg = {0};\n+\tint (*reader_f)(void *arg) = NULL;\n \n \tif (rte_lcore_count() < 3) {\n \t\tprintf(\"Not enough cores for lpm_rcu_perf_autotest, expecting at least 3\\n\");\n@@ -504,273 +522,76 @@ test_lpm_rcu_perf_multi_writer(void)\n \t\tnum_cores++;\n \t}\n \n-\tprintf(\"\\nPerf test: 2 writers, %d readers, RCU integration enabled\\n\",\n-\t\tnum_cores - 2);\n-\n-\t/* Create LPM table */\n-\tconfig.max_rules = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.number_tbl8s = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.flags = 0;\n-\tlpm = rte_lpm_create(__func__, SOCKET_ID_ANY, &config);\n-\tTEST_LPM_ASSERT(lpm != NULL);\n-\n-\t/* Init RCU variable */\n-\tsz = rte_rcu_qsbr_get_memsize(num_cores);\n-\trv = (struct rte_rcu_qsbr *)rte_zmalloc(\"rcu0\", sz,\n-\t\t\t\t\t\tRTE_CACHE_LINE_SIZE);\n-\trte_rcu_qsbr_init(rv, num_cores);\n-\n-\trcu_cfg.v = rv;\n-\t/* Assign the RCU variable to LPM */\n-\tif (rte_lpm_rcu_qsbr_add(lpm, &rcu_cfg) != 0) {\n-\t\tprintf(\"RCU variable assignment failed\\n\");\n-\t\tgoto error;\n-\t}\n-\n-\twriter_done = 0;\n-\t__atomic_store_n(&gwrite_cycles, 0, __ATOMIC_RELAXED);\n-\n-\t__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);\n-\n-\t/* Launch reader threads */\n-\tfor (i = 2; i < num_cores; i++)\n-\t\trte_eal_remote_launch(test_lpm_rcu_qsbr_reader, NULL,\n-\t\t\t\t\tenabled_core_ids[i]);\n-\n-\t/* Launch writer threads */\n-\tfor (i = 0; i < 2; i++)\n-\t\trte_eal_remote_launch(test_lpm_rcu_qsbr_writer,\n-\t\t\t\t\t(void *)(uintptr_t)i,\n-\t\t\t\t\tenabled_core_ids[i]);\n-\n-\t/* Wait for writer threads */\n-\tfor (i = 0; i < 2; i++)\n-\t\tif (rte_eal_wait_lcore(enabled_core_ids[i]) < 0)\n-\t\t\tgoto error;\n-\n-\tprintf(\"Total LPM Adds: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Total LPM Deletes: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Average LPM Add/Del: %\"PRIu64\" cycles\\n\",\n-\t\t__atomic_load_n(&gwrite_cycles, __ATOMIC_RELAXED)\n-\t\t/ TOTAL_WRITES);\n-\n-\twriter_done = 1;\n-\t/* Wait until all readers have exited */\n-\tfor (i = 2; i < num_cores; i++)\n-\t\trte_eal_wait_lcore(enabled_core_ids[i]);\n-\n-\trte_lpm_free(lpm);\n-\trte_free(rv);\n-\tlpm = NULL;\n-\trv = NULL;\n-\n-\t/* Test without RCU integration */\n-\tprintf(\"\\nPerf test: 2 writers, %d readers, RCU integration disabled\\n\",\n-\t\tnum_cores - 2);\n-\n-\t/* Create LPM table */\n-\tconfig.max_rules = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.number_tbl8s = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.flags = 0;\n-\tlpm = rte_lpm_create(__func__, SOCKET_ID_ANY, &config);\n-\tTEST_LPM_ASSERT(lpm != NULL);\n-\n-\twriter_done = 0;\n-\t__atomic_store_n(&gwrite_cycles, 0, __ATOMIC_RELAXED);\n-\t__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);\n-\n-\t/* Launch reader threads */\n-\tfor (i = 2; i < num_cores; i++)\n-\t\trte_eal_remote_launch(test_lpm_reader, NULL,\n-\t\t\t\t\tenabled_core_ids[i]);\n-\n-\t/* Launch writer threads */\n-\tfor (i = 0; i < 2; i++)\n-\t\trte_eal_remote_launch(test_lpm_rcu_qsbr_writer,\n-\t\t\t\t\t(void *)(uintptr_t)i,\n-\t\t\t\t\tenabled_core_ids[i]);\n-\n-\t/* Wait for writer threads */\n-\tfor (i = 0; i < 2; i++)\n-\t\tif (rte_eal_wait_lcore(enabled_core_ids[i]) < 0)\n-\t\t\tgoto error;\n-\n-\tprintf(\"Total LPM Adds: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Total LPM Deletes: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Average LPM Add/Del: %\"PRIu64\" cycles\\n\",\n-\t\t__atomic_load_n(&gwrite_cycles, __ATOMIC_RELAXED)\n-\t\t/ TOTAL_WRITES);\n-\n-\twriter_done = 1;\n-\t/* Wait until all readers have exited */\n-\tfor (i = 2; i < num_cores; i++)\n-\t\trte_eal_wait_lcore(enabled_core_ids[i]);\n-\n-\trte_lpm_free(lpm);\n-\n-\treturn 0;\n-\n-error:\n-\twriter_done = 1;\n-\t/* Wait until all readers have exited */\n-\trte_eal_mp_wait_lcore();\n-\n-\trte_lpm_free(lpm);\n-\trte_free(rv);\n-\n-\treturn -1;\n-}\n-\n-/*\n- * Functional test:\n- * Single writer, rest are readers\n- */\n-static int\n-test_lpm_rcu_perf(void)\n-{\n-\tstruct rte_lpm_config config;\n-\tuint64_t begin, total_cycles;\n-\tsize_t sz;\n-\tunsigned int i, j;\n-\tuint16_t core_id;\n-\tuint32_t next_hop_add = 0xAA;\n-\tstruct rte_lpm_rcu_config rcu_cfg = {0};\n-\n-\tif (rte_lcore_count() < 2) {\n-\t\tprintf(\"Not enough cores for lpm_rcu_perf_autotest, expecting at least 2\\n\");\n-\t\treturn TEST_SKIPPED;\n-\t}\n-\n-\tnum_cores = 0;\n-\tRTE_LCORE_FOREACH_WORKER(core_id) {\n-\t\tenabled_core_ids[num_cores] = core_id;\n-\t\tnum_cores++;\n-\t}\n-\n-\tprintf(\"\\nPerf test: 1 writer, %d readers, RCU integration enabled\\n\",\n-\t\tnum_cores);\n-\n-\t/* Create LPM table */\n-\tconfig.max_rules = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.number_tbl8s = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.flags = 0;\n-\tlpm = rte_lpm_create(__func__, SOCKET_ID_ANY, &config);\n-\tTEST_LPM_ASSERT(lpm != NULL);\n-\n-\t/* Init RCU variable */\n-\tsz = rte_rcu_qsbr_get_memsize(num_cores);\n-\trv = (struct rte_rcu_qsbr *)rte_zmalloc(\"rcu0\", sz,\n-\t\t\t\t\t\tRTE_CACHE_LINE_SIZE);\n-\trte_rcu_qsbr_init(rv, num_cores);\n-\n-\trcu_cfg.v = rv;\n-\t/* Assign the RCU variable to LPM */\n-\tif (rte_lpm_rcu_qsbr_add(lpm, &rcu_cfg) != 0) {\n-\t\tprintf(\"RCU variable assignment failed\\n\");\n-\t\tgoto error;\n-\t}\n-\n-\twriter_done = 0;\n-\t__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);\n-\n-\t/* Launch reader threads */\n-\tfor (i = 0; i < num_cores; i++)\n-\t\trte_eal_remote_launch(test_lpm_rcu_qsbr_reader, NULL,\n-\t\t\t\t\tenabled_core_ids[i]);\n-\n-\t/* Measure add/delete. */\n-\tbegin = rte_rdtsc_precise();\n-\tfor (i = 0; i < RCU_ITERATIONS; i++) {\n-\t\t/* Add all the entries */\n-\t\tfor (j = 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++)\n-\t\t\tif (rte_lpm_add(lpm, large_ldepth_route_table[j].ip,\n-\t\t\t\t\tlarge_ldepth_route_table[j].depth,\n-\t\t\t\t\tnext_hop_add) != 0) {\n-\t\t\t\tprintf(\"Failed to add iteration %d, route# %d\\n\",\n-\t\t\t\t\ti, j);\n+\tfor (j = 1; j < 3; j++) {\n+\t\tif (use_rcu)\n+\t\t\tprintf(\"\\nPerf test: %d writer(s), %d reader(s),\"\n+\t\t\t       \" RCU integration enabled\\n\", j, num_cores - j);\n+\t\telse\n+\t\t\tprintf(\"\\nPerf test: %d writer(s), %d reader(s),\"\n+\t\t\t       \" RCU integration disabled\\n\", j, num_cores - j);\n+\n+\t\t/* Create LPM table */\n+\t\tconfig.max_rules = NUM_LDEPTH_ROUTE_ENTRIES;\n+\t\tconfig.number_tbl8s = NUM_LDEPTH_ROUTE_ENTRIES;\n+\t\tconfig.flags = 0;\n+\t\tlpm = rte_lpm_create(__func__, SOCKET_ID_ANY, &config);\n+\t\tTEST_LPM_ASSERT(lpm != NULL);\n+\n+\t\t/* Init RCU variable */\n+\t\tif (use_rcu) {\n+\t\t\tsz = rte_rcu_qsbr_get_memsize(num_cores);\n+\t\t\trv = (struct rte_rcu_qsbr *)rte_zmalloc(\"rcu0\", sz,\n+\t\t\t\t\t\t\tRTE_CACHE_LINE_SIZE);\n+\t\t\trte_rcu_qsbr_init(rv, num_cores);\n+\n+\t\t\trcu_cfg.v = rv;\n+\t\t\t/* Assign the RCU variable to LPM */\n+\t\t\tif (rte_lpm_rcu_qsbr_add(lpm, &rcu_cfg) != 0) {\n+\t\t\t\tprintf(\"RCU variable assignment failed\\n\");\n \t\t\t\tgoto error;\n \t\t\t}\n \n-\t\t/* Delete all the entries */\n-\t\tfor (j = 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++)\n-\t\t\tif (rte_lpm_delete(lpm, large_ldepth_route_table[j].ip,\n-\t\t\t\tlarge_ldepth_route_table[j].depth) != 0) {\n-\t\t\t\tprintf(\"Failed to delete iteration %d, route# %d\\n\",\n-\t\t\t\t\ti, j);\n-\t\t\t\tgoto error;\n-\t\t\t}\n-\t}\n-\ttotal_cycles = rte_rdtsc_precise() - begin;\n+\t\t\treader_f = test_lpm_rcu_qsbr_reader;\n+\t\t} else\n+\t\t\treader_f = test_lpm_reader;\n \n-\tprintf(\"Total LPM Adds: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Total LPM Deletes: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Average LPM Add/Del: %g cycles\\n\",\n-\t\t(double)total_cycles / TOTAL_WRITES);\n+\t\twriter_done = 0;\n+\t\t__atomic_store_n(&gwrite_cycles, 0, __ATOMIC_RELAXED);\n \n-\twriter_done = 1;\n-\t/* Wait until all readers have exited */\n-\tfor (i = 0; i < num_cores; i++)\n-\t\tif (rte_eal_wait_lcore(enabled_core_ids[i]);\n-\n-\trte_lpm_free(lpm);\n-\trte_free(rv);\n-\tlpm = NULL;\n-\trv = NULL;\n-\n-\t/* Test without RCU integration */\n-\tprintf(\"\\nPerf test: 1 writer, %d readers, RCU integration disabled\\n\",\n-\t\tnum_cores);\n-\n-\t/* Create LPM table */\n-\tconfig.max_rules = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.number_tbl8s = NUM_LDEPTH_ROUTE_ENTRIES;\n-\tconfig.flags = 0;\n-\tlpm = rte_lpm_create(__func__, SOCKET_ID_ANY, &config);\n-\tTEST_LPM_ASSERT(lpm != NULL);\n+\t\t__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);\n \n-\twriter_done = 0;\n-\t__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);\n+\t\t/* Launch reader threads */\n+\t\tfor (i = j; i < num_cores; i++)\n+\t\t\trte_eal_remote_launch(reader_f, NULL,\n+\t\t\t\t\t\tenabled_core_ids[i]);\n \n-\t/* Launch reader threads */\n-\tfor (i = 0; i < num_cores; i++)\n-\t\trte_eal_remote_launch(test_lpm_reader, NULL,\n-\t\t\t\t\tenabled_core_ids[i]);\n+\t\t/* Launch writer threads */\n+\t\tfor (i = 0; i < j; i++)\n+\t\t\trte_eal_remote_launch(test_lpm_rcu_qsbr_writer,\n+\t\t\t\t\t\t(void *)(uintptr_t)(i + j),\n+\t\t\t\t\t\tenabled_core_ids[i]);\n \n-\t/* Measure add/delete. */\n-\tbegin = rte_rdtsc_precise();\n-\tfor (i = 0; i < RCU_ITERATIONS; i++) {\n-\t\t/* Add all the entries */\n-\t\tfor (j = 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++)\n-\t\t\tif (rte_lpm_add(lpm, large_ldepth_route_table[j].ip,\n-\t\t\t\t\tlarge_ldepth_route_table[j].depth,\n-\t\t\t\t\tnext_hop_add) != 0) {\n-\t\t\t\tprintf(\"Failed to add iteration %d, route# %d\\n\",\n-\t\t\t\t\ti, j);\n+\t\t/* Wait for writer threads */\n+\t\tfor (i = 0; i < j; i++)\n+\t\t\tif (rte_eal_wait_lcore(enabled_core_ids[i]) < 0)\n \t\t\t\tgoto error;\n-\t\t\t}\n \n-\t\t/* Delete all the entries */\n-\t\tfor (j = 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++)\n-\t\t\tif (rte_lpm_delete(lpm, large_ldepth_route_table[j].ip,\n-\t\t\t\tlarge_ldepth_route_table[j].depth) != 0) {\n-\t\t\t\tprintf(\"Failed to delete iteration %d, route# %d\\n\",\n-\t\t\t\t\ti, j);\n-\t\t\t\tgoto error;\n-\t\t\t}\n+\t\tprintf(\"Total LPM Adds: %d\\n\", TOTAL_WRITES);\n+\t\tprintf(\"Total LPM Deletes: %d\\n\", TOTAL_WRITES);\n+\t\tprintf(\"Average LPM Add/Del: %\"PRIu64\" cycles\\n\",\n+\t\t\t__atomic_load_n(&gwrite_cycles, __ATOMIC_RELAXED)\n+\t\t\t/ TOTAL_WRITES);\n+\n+\t\twriter_done = 1;\n+\t\t/* Wait until all readers have exited */\n+\t\tfor (i = j; i < num_cores; i++)\n+\t\t\trte_eal_wait_lcore(enabled_core_ids[i]);\n+\n+\t\trte_lpm_free(lpm);\n+\t\trte_free(rv);\n+\t\tlpm = NULL;\n+\t\trv = NULL;\n \t}\n-\ttotal_cycles = rte_rdtsc_precise() - begin;\n-\n-\tprintf(\"Total LPM Adds: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Total LPM Deletes: %d\\n\", TOTAL_WRITES);\n-\tprintf(\"Average LPM Add/Del: %g cycles\\n\",\n-\t\t(double)total_cycles / TOTAL_WRITES);\n-\n-\twriter_done = 1;\n-\t/* Wait until all readers have exited */\n-\tfor (i = 0; i < num_cores; i++)\n-\t\trte_eal_wait_lcore(enabled_core_ids[i]);\n-\n-\trte_lpm_free(lpm);\n \n \treturn 0;\n \n@@ -946,9 +767,8 @@ test_lpm_perf(void)\n \trte_lpm_delete_all(lpm);\n \trte_lpm_free(lpm);\n \n-\ttest_lpm_rcu_perf();\n-\n-\ttest_lpm_rcu_perf_multi_writer();\n+\ttest_lpm_rcu_perf_multi_writer(0);\n+\ttest_lpm_rcu_perf_multi_writer(1);\n \n \treturn 0;\n }\n",
    "prefixes": [
        "v2",
        "4/4"
    ]
}