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GET /api/patches/82415/?format=api
{ "id": 82415, "url": "https://patches.dpdk.org/api/patches/82415/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201027232335.31427-26-ophirmu@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201027232335.31427-26-ophirmu@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201027232335.31427-26-ophirmu@nvidia.com", "date": "2020-10-27T23:22:48", "name": "[v1,25/72] common/mlx5/windows: extend PRM match_param_bits struct", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bd7f4d418e8881f68ab302689c1f7d1e7d0b2a0d", "submitter": { "id": 1908, "url": "https://patches.dpdk.org/api/people/1908/?format=api", "name": "Ophir Munk", "email": "ophirmu@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201027232335.31427-26-ophirmu@nvidia.com/mbox/", "series": [ { "id": 13395, "url": "https://patches.dpdk.org/api/series/13395/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13395", "date": "2020-10-27T23:22:23", "name": "mlx5 Windows support - part #5", "version": 1, "mbox": "https://patches.dpdk.org/series/13395/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/82415/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/82415/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3895DA04B5;\n\tWed, 28 Oct 2020 00:32:32 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 382E272E7;\n\tWed, 28 Oct 2020 00:24:54 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 0CCEF2BF7\n for <dev@dpdk.org>; Wed, 28 Oct 2020 00:24:00 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n ophirmu@nvidia.com) with SMTP; 28 Oct 2020 01:23:55 +0200", "from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09RNNrrb026642;\n Wed, 28 Oct 2020 01:23:55 +0200" ], "From": "Ophir Munk <ophirmu@nvidia.com>", "To": "dev@dpdk.org, Raslan Darawsheh <rasland@nvidia.com>", "Cc": "Ophir Munk <ophirmu@nvidia.com>, Matan Azrad <matan@nvidia.com>,\n Tal Shnaiderman <talshn@nvidia.com>, Thomas Monjalon <thomas@monjalon.net>", "Date": "Tue, 27 Oct 2020 23:22:48 +0000", "Message-Id": "<20201027232335.31427-26-ophirmu@nvidia.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20201027232335.31427-1-ophirmu@nvidia.com>", "References": "<20201027232335.31427-1-ophirmu@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v1 25/72] common/mlx5/windows: extend PRM\n\tmatch_param_bits struct", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Tal Shnaiderman <talshn@nvidia.com>\n\nAdd reserved size to PRM 'struct mlx5_ifc_fte_match_param_bits' for non\nLinux OS. Windows drivers require this extension since their expected\nsize should match the actual struct size. Linux drivers do not require\nthis extension and already use calculations based on the shorter size.\nUse a static assert to verify that the PRM fte_match_param struct size\nremains correct.\n\nSigned-off-by: Tal Shnaiderman <talshn@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 7 +++++++\n drivers/common/mlx5/windows/mlx5_glue.c | 3 +++\n 2 files changed, 10 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex 818f8c4..bdf8799 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -799,6 +799,13 @@ struct mlx5_ifc_fte_match_param_bits {\n \tstruct mlx5_ifc_fte_match_set_misc2_bits misc_parameters_2;\n \tstruct mlx5_ifc_fte_match_set_misc3_bits misc_parameters_3;\n \tstruct mlx5_ifc_fte_match_set_misc4_bits misc_parameters_4;\n+/*\n+ * Add reserved bit to match the struct size with the size defined in PRM.\n+ * This extension is not required in Linux.\n+ */\n+#ifndef HAVE_INFINIBAND_VERBS_H\n+\tu8 reserved_0[0x400];\n+#endif\n };\n \n enum {\ndiff --git a/drivers/common/mlx5/windows/mlx5_glue.c b/drivers/common/mlx5/windows/mlx5_glue.c\nindex 7f8a00a..3896cf0 100644\n--- a/drivers/common/mlx5/windows/mlx5_glue.c\n+++ b/drivers/common/mlx5/windows/mlx5_glue.c\n@@ -256,6 +256,9 @@ mlx5_glue_devx_free_uar(void *uar)\n \tdevx_free_uar((devx_uar_handle *)uar);\n }\n \n+static_assert(MLX5_ST_SZ_BYTES(fte_match_param) == 0x200,\n+\t\"PRM size of fte_match_param is broken! cannot compile Windows!\");\n+\n static void*\n mlx5_glue_devx_fs_rule_add(void *ctx, void *in, uint32_t inlen)\n \n", "prefixes": [ "v1", "25/72" ] }