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GET /api/patches/82074/?format=api
{ "id": 82074, "url": "https://patches.dpdk.org/api/patches/82074/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201025002953.1680999-8-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201025002953.1680999-8-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201025002953.1680999-8-qi.z.zhang@intel.com", "date": "2020-10-25T00:29:39", "name": "[v2,07/21] net/ice/base: add functions to allocate and free a RSS global LUT", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "77ce3c266de03018d810f9ac6cde15477d3c403a", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201025002953.1680999-8-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 13297, "url": "https://patches.dpdk.org/api/series/13297/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13297", "date": "2020-10-25T00:29:32", "name": "ice: update base code", "version": 2, "mbox": "https://patches.dpdk.org/series/13297/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/82074/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/82074/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2466AA04DD;\n\tSun, 25 Oct 2020 02:28:22 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 857BD2B86;\n\tSun, 25 Oct 2020 02:26:19 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by dpdk.org (Postfix) with ESMTP id 2EAB0292D\n for <dev@dpdk.org>; Sun, 25 Oct 2020 02:26:08 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Oct 2020 17:26:07 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by FMSMGA003.fm.intel.com with ESMTP; 24 Oct 2020 17:26:06 -0700" ], "IronPort-SDR": [ "\n 57rCXYMNy1ysKrbmKD0pJixOLQ3H2Vq2MfhaEzGtPdOxo9MUy3G7e0aG4HT6R6S35HOznA/3iJ\n UTZlNM3J/Rrg==", "\n rObSbsuouFf2+9X+tEWbhAEa2HpXzfCbS3YRVlY9Sk/p2gQsuoHi781KpnV4OcPYwUrhKGLfKT\n qT/yH0dKKuoA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9784\"; a=\"167927034\"", "E=Sophos;i=\"5.77,414,1596524400\"; d=\"scan'208\";a=\"167927034\"", "E=Sophos;i=\"5.77,414,1596524400\"; d=\"scan'208\";a=\"359984038\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Brett Creeley <brett.creeley@intel.com>", "Date": "Sun, 25 Oct 2020 08:29:39 +0800", "Message-Id": "<20201025002953.1680999-8-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.4", "In-Reply-To": "<20201025002953.1680999-1-qi.z.zhang@intel.com>", "References": "<20201025002953.1680999-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 07/21] net/ice/base: add functions to allocate\n\tand free a RSS global LUT", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently there is no API to allocate and free a RSS global LUT.\nIncoming changes to support VFs having >16 queues will require using\nRSS global LUT resources. The functions included will allow a PF to\nconfigure a RSS global LUT for VFs that request >16 queues.\n\nSigned-off-by: Brett Creeley <brett.creeley@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_switch.c | 65 +++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_switch.h | 2 +\n 2 files changed, 67 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex 01d59edf42..cd78685735 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -1848,6 +1848,71 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,\n \treturn status;\n }\n \n+/**\n+ * ice_alloc_rss_global_lut - allocate a RSS global LUT\n+ * @hw: pointer to the HW struct\n+ * @shared_res: true to allocate as a shared resource and false to allocate as a dedicated resource\n+ * @global_lut_id: output parameter for the RSS global LUT's ID\n+ */\n+enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id)\n+{\n+\tstruct ice_aqc_alloc_free_res_elem *sw_buf;\n+\tenum ice_status status;\n+\tu16 buf_len;\n+\n+\tbuf_len = ice_struct_size(sw_buf, elem, 1);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n+\tif (!sw_buf)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tsw_buf->num_elems = CPU_TO_LE16(1);\n+\tsw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_GLOBAL_RSS_HASH |\n+\t\t\t\t (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :\n+\t\t\t\t ICE_AQC_RES_TYPE_FLAG_DEDICATED));\n+\n+\tstatus = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len, ice_aqc_opc_alloc_res, NULL);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_RES, \"Failed to allocate %s RSS global LUT, status %d\\n\",\n+\t\t\t shared_res ? \"shared\" : \"dedicated\", status);\n+\t\tgoto ice_alloc_global_lut_exit;\n+\t}\n+\n+\t*global_lut_id = LE16_TO_CPU(sw_buf->elem[0].e.sw_resp);\n+\n+ice_alloc_global_lut_exit:\n+\tice_free(hw, sw_buf);\n+\treturn status;\n+}\n+\n+/**\n+ * ice_free_global_lut - free a RSS global LUT\n+ * @hw: pointer to the HW struct\n+ * @global_lut_id: ID of the RSS global LUT to free\n+ */\n+enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id)\n+{\n+\tstruct ice_aqc_alloc_free_res_elem *sw_buf;\n+\tu16 buf_len, num_elems = 1;\n+\tenum ice_status status;\n+\n+\tbuf_len = ice_struct_size(sw_buf, elem, num_elems);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n+\tif (!sw_buf)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tsw_buf->num_elems = CPU_TO_LE16(num_elems);\n+\tsw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_GLOBAL_RSS_HASH);\n+\tsw_buf->elem[0].e.sw_resp = CPU_TO_LE16(global_lut_id);\n+\n+\tstatus = ice_aq_alloc_free_res(hw, num_elems, sw_buf, buf_len, ice_aqc_opc_free_res, NULL);\n+\tif (status)\n+\t\tice_debug(hw, ICE_DBG_RES, \"Failed to free RSS global LUT %d, status %d\\n\",\n+\t\t\t global_lut_id, status);\n+\n+\tice_free(hw, sw_buf);\n+\treturn status;\n+}\n+\n /**\n * ice_alloc_sw - allocate resources specific to switch\n * @hw: pointer to the HW struct\ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex a7e94344c1..be9b74fd4c 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -418,6 +418,8 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,\n \n /* Switch/bridge related commands */\n enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);\n+enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);\n+enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);\n enum ice_status\n ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,\n \t u16 *counter_id);\n", "prefixes": [ "v2", "07/21" ] }