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GET /api/patches/80832/?format=api
{ "id": 80832, "url": "https://patches.dpdk.org/api/patches/80832/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201015134853.795383-1-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201015134853.795383-1-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201015134853.795383-1-alvinx.zhang@intel.com", "date": "2020-10-15T13:48:53", "name": "net/ice: fix RSS hash offload at vector mode", "commit_ref": null, "pull_url": null, "state": "rejected", "archived": true, "hash": "987abd6d73ac8d57f072e7493e53b47a0342087e", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201015134853.795383-1-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 12986, "url": "https://patches.dpdk.org/api/series/12986/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12986", "date": "2020-10-15T13:48:53", "name": "net/ice: fix RSS hash offload at vector mode", "version": 1, "mbox": "https://patches.dpdk.org/series/12986/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/80832/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/80832/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 72D89A04DB;\n\tThu, 15 Oct 2020 07:48:15 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D82A41DC48;\n\tThu, 15 Oct 2020 07:48:13 +0200 (CEST)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by dpdk.org (Postfix) with ESMTP id EB3E91DC42;\n Thu, 15 Oct 2020 07:48:10 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Oct 2020 22:48:08 -0700", "from unknown (HELO localhost.localdomain) ([10.240.183.77])\n by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Oct 2020 22:48:06 -0700" ], "IronPort-SDR": [ "\n t3oqwWcPFUblNh4aIFG3HkNrW2P3t7OdR0aU8dMrugOLCfBtN5p+5YqffEd4Ufhjm1yNIMl57X\n H3ESn6F8mrfw==", "\n rxeISGYAibWX5k+sTpskCn/RM/x85VJnsQgkIoRQ/Ko84mffA7PQr3oprlV+MQ2qFEogirvy8P\n vNew33z4Fq1w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9774\"; a=\"227917607\"", "E=Sophos;i=\"5.77,377,1596524400\"; d=\"scan'208\";a=\"227917607\"", "E=Sophos;i=\"5.77,377,1596524400\"; d=\"scan'208\";a=\"531120643\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "From": "Zhang Alvin <alvinx.zhang@intel.com>", "To": "jia.guo@intel.com,\n\tqi.z.zhang@intel.com", "Cc": "dev@dpdk.org,\n\tAlvin Zhang <alvinx.zhang@intel.com>,\n\tstable@dpdk.org", "Date": "Thu, 15 Oct 2020 13:48:53 +0000", "Message-Id": "<20201015134853.795383-1-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH] net/ice: fix RSS hash offload at vector mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\n1. According to whether the RSS offload bit of the received packet is set\n to determin if the RSS hash should be read or not.\n2. Simplify the code of reading RSS hash value.\n\nFixes: 12443386a0b0 (\"net/ice: support flex Rx descriptor RxDID22\")\nCc: stable@dpdk.org\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n---\n drivers/net/ice/ice_rxtx_vec_avx2.c | 116 +++++++++---------------------------\n drivers/net/ice/ice_rxtx_vec_sse.c | 79 +++++++-----------------\n 2 files changed, 50 insertions(+), 145 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex 5969a30..a47f38c 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -523,94 +523,35 @@\n \t\t\t\t_mm256_extract_epi32(fdir_id0_7, 4);\n \t\t} /* if() on fdir_enabled */\n \n-#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n-\t\t/**\n-\t\t * needs to load 2nd 16B of each desc for RSS hash parsing,\n-\t\t * will cause performance drop to get into this context.\n-\t\t */\n-\t\tif (rxq->vsi->adapter->eth_dev->data->dev_conf.rxmode.offloads &\n-\t\t\t\tDEV_RX_OFFLOAD_RSS_HASH) {\n-\t\t\t/* load bottom half of every 32B desc */\n-\t\t\tconst __m128i raw_desc_bh7 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[7].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh6 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[6].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh5 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[5].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh4 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[4].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh3 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[3].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh2 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[2].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh1 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[1].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh0 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[0].wb.status_error1));\n+\t\tconst __m256i dd_status = _mm256_and_si256(status0_7, dd_check);\n \n-\t\t\t__m256i raw_desc_bh6_7 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh6),\n-\t\t\t\t\traw_desc_bh7, 1);\n-\t\t\t__m256i raw_desc_bh4_5 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh4),\n-\t\t\t\t\traw_desc_bh5, 1);\n-\t\t\t__m256i raw_desc_bh2_3 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh2),\n-\t\t\t\t\traw_desc_bh3, 1);\n-\t\t\t__m256i raw_desc_bh0_1 =\n-\t\t\t\t_mm256_inserti128_si256\n-\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh0),\n-\t\t\t\t\traw_desc_bh1, 1);\n+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n \n-\t\t\t/**\n-\t\t\t * to shift the 32b RSS hash value to the\n-\t\t\t * highest 32b of each 128b before mask\n-\t\t\t */\n-\t\t\t__m256i rss_hash6_7 =\n-\t\t\t\t_mm256_slli_epi64(raw_desc_bh6_7, 32);\n-\t\t\t__m256i rss_hash4_5 =\n-\t\t\t\t_mm256_slli_epi64(raw_desc_bh4_5, 32);\n-\t\t\t__m256i rss_hash2_3 =\n-\t\t\t\t_mm256_slli_epi64(raw_desc_bh2_3, 32);\n-\t\t\t__m256i rss_hash0_1 =\n-\t\t\t\t_mm256_slli_epi64(raw_desc_bh0_1, 32);\n-\n-\t\t\t__m256i rss_hash_msk =\n-\t\t\t\t_mm256_set_epi32(0xFFFFFFFF, 0, 0, 0,\n-\t\t\t\t\t\t 0xFFFFFFFF, 0, 0, 0);\n-\n-\t\t\trss_hash6_7 = _mm256_and_si256\n-\t\t\t\t\t(rss_hash6_7, rss_hash_msk);\n-\t\t\trss_hash4_5 = _mm256_and_si256\n-\t\t\t\t\t(rss_hash4_5, rss_hash_msk);\n-\t\t\trss_hash2_3 = _mm256_and_si256\n-\t\t\t\t\t(rss_hash2_3, rss_hash_msk);\n-\t\t\trss_hash0_1 = _mm256_and_si256\n-\t\t\t\t\t(rss_hash0_1, rss_hash_msk);\n-\n-\t\t\tmb6_7 = _mm256_or_si256(mb6_7, rss_hash6_7);\n-\t\t\tmb4_5 = _mm256_or_si256(mb4_5, rss_hash4_5);\n-\t\t\tmb2_3 = _mm256_or_si256(mb2_3, rss_hash2_3);\n-\t\t\tmb0_1 = _mm256_or_si256(mb0_1, rss_hash0_1);\n-\t\t} /* if() on RSS hash parsing */\n+\t\t/* bit12 is for RSS indication.\n+\t\t * Extract hash value will cause performance drop.\n+\t\t */\n+\t\tif (!_mm256_testz_si256(status0_7,\n+\t\t\t\t\t_mm256_slli_epi32(dd_status, 12))) {\n+\t\t\tuint32_t hash_val[8];\n+\n+\t\t\thash_val[0] = *(uint32_t *)&rxdp[0].wb.flex_meta2;\n+\t\t\thash_val[1] = *(uint32_t *)&rxdp[1].wb.flex_meta2;\n+\t\t\thash_val[2] = *(uint32_t *)&rxdp[2].wb.flex_meta2;\n+\t\t\thash_val[3] = *(uint32_t *)&rxdp[3].wb.flex_meta2;\n+\t\t\thash_val[4] = *(uint32_t *)&rxdp[4].wb.flex_meta2;\n+\t\t\thash_val[5] = *(uint32_t *)&rxdp[5].wb.flex_meta2;\n+\t\t\thash_val[6] = *(uint32_t *)&rxdp[6].wb.flex_meta2;\n+\t\t\thash_val[7] = *(uint32_t *)&rxdp[7].wb.flex_meta2;\n+\n+\t\t\tmb0_1 = _mm256_insert_epi32(mb0_1, hash_val[0], 3);\n+\t\t\tmb0_1 = _mm256_insert_epi32(mb0_1, hash_val[1], 7);\n+\t\t\tmb2_3 = _mm256_insert_epi32(mb2_3, hash_val[2], 3);\n+\t\t\tmb2_3 = _mm256_insert_epi32(mb2_3, hash_val[3], 7);\n+\t\t\tmb4_5 = _mm256_insert_epi32(mb4_5, hash_val[4], 3);\n+\t\t\tmb4_5 = _mm256_insert_epi32(mb4_5, hash_val[5], 7);\n+\t\t\tmb6_7 = _mm256_insert_epi32(mb6_7, hash_val[6], 3);\n+\t\t\tmb6_7 = _mm256_insert_epi32(mb6_7, hash_val[7], 7);\n+\t\t}\n #endif\n \n \t\t/**\n@@ -728,8 +669,7 @@\n \t\t}\n \n \t\t/* perform dd_check */\n-\t\tstatus0_7 = _mm256_and_si256(status0_7, dd_check);\n-\t\tstatus0_7 = _mm256_packs_epi32(status0_7,\n+\t\tstatus0_7 = _mm256_packs_epi32(dd_status,\n \t\t\t\t\t _mm256_setzero_si256());\n \n \t\tuint64_t burst = __builtin_popcountll\ndiff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c\nindex c4c9a91..dd3b70f 100644\n--- a/drivers/net/ice/ice_rxtx_vec_sse.c\n+++ b/drivers/net/ice/ice_rxtx_vec_sse.c\n@@ -439,65 +439,31 @@\n \t\tpkt_mb1 = _mm_add_epi16(pkt_mb1, crc_adjust);\n \t\tpkt_mb0 = _mm_add_epi16(pkt_mb0, crc_adjust);\n \n+\t\t/* C.2 get 4 pkts staterr value */\n+\t\tstaterr = _mm_unpacklo_epi32(sterr_tmp1, sterr_tmp2);\n+\n+\t\tconst __m128i dd_status = _mm_and_si128(staterr, dd_check);\n+\n #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n-\t\t/**\n-\t\t * needs to load 2nd 16B of each desc for RSS hash parsing,\n-\t\t * will cause performance drop to get into this context.\n+\n+\t\t/* bit12 is for RSS indication.\n+\t\t * Extract hash value will cause performance drop.\n \t\t */\n-\t\tif (rxq->vsi->adapter->eth_dev->data->dev_conf.rxmode.offloads &\n-\t\t\t\tDEV_RX_OFFLOAD_RSS_HASH) {\n-\t\t\t/* load bottom half of every 32B desc */\n-\t\t\tconst __m128i raw_desc_bh3 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[3].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh2 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[2].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh1 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[1].wb.status_error1));\n-\t\t\trte_compiler_barrier();\n-\t\t\tconst __m128i raw_desc_bh0 =\n-\t\t\t\t_mm_load_si128\n-\t\t\t\t\t((void *)(&rxdp[0].wb.status_error1));\n-\n-\t\t\t/**\n-\t\t\t * to shift the 32b RSS hash value to the\n-\t\t\t * highest 32b of each 128b before mask\n-\t\t\t */\n-\t\t\t__m128i rss_hash3 =\n-\t\t\t\t_mm_slli_epi64(raw_desc_bh3, 32);\n-\t\t\t__m128i rss_hash2 =\n-\t\t\t\t_mm_slli_epi64(raw_desc_bh2, 32);\n-\t\t\t__m128i rss_hash1 =\n-\t\t\t\t_mm_slli_epi64(raw_desc_bh1, 32);\n-\t\t\t__m128i rss_hash0 =\n-\t\t\t\t_mm_slli_epi64(raw_desc_bh0, 32);\n-\n-\t\t\t__m128i rss_hash_msk =\n-\t\t\t\t_mm_set_epi32(0xFFFFFFFF, 0, 0, 0);\n-\n-\t\t\trss_hash3 = _mm_and_si128\n-\t\t\t\t\t(rss_hash3, rss_hash_msk);\n-\t\t\trss_hash2 = _mm_and_si128\n-\t\t\t\t\t(rss_hash2, rss_hash_msk);\n-\t\t\trss_hash1 = _mm_and_si128\n-\t\t\t\t\t(rss_hash1, rss_hash_msk);\n-\t\t\trss_hash0 = _mm_and_si128\n-\t\t\t\t\t(rss_hash0, rss_hash_msk);\n-\n-\t\t\tpkt_mb3 = _mm_or_si128(pkt_mb3, rss_hash3);\n-\t\t\tpkt_mb2 = _mm_or_si128(pkt_mb2, rss_hash2);\n-\t\t\tpkt_mb1 = _mm_or_si128(pkt_mb1, rss_hash1);\n-\t\t\tpkt_mb0 = _mm_or_si128(pkt_mb0, rss_hash0);\n-\t\t} /* if() on RSS hash parsing */\n+\t\tif (!_mm_testz_si128(staterr, _mm_slli_epi32(dd_status, 12))) {\n+\t\t\tuint32_t hash_val[4];\n+\n+\t\t\thash_val[0] = *(uint32_t *)&rxdp[0].wb.flex_meta2;\n+\t\t\thash_val[1] = *(uint32_t *)&rxdp[1].wb.flex_meta2;\n+\t\t\thash_val[2] = *(uint32_t *)&rxdp[2].wb.flex_meta2;\n+\t\t\thash_val[3] = *(uint32_t *)&rxdp[3].wb.flex_meta2;\n+\n+\t\t\tpkt_mb0 = _mm_insert_epi32(pkt_mb0, hash_val[0], 3);\n+\t\t\tpkt_mb1 = _mm_insert_epi32(pkt_mb0, hash_val[1], 3);\n+\t\t\tpkt_mb2 = _mm_insert_epi32(pkt_mb0, hash_val[2], 3);\n+\t\t\tpkt_mb3 = _mm_insert_epi32(pkt_mb0, hash_val[3], 3);\n+\t\t}\n #endif\n \n-\t\t/* C.2 get 4 pkts staterr value */\n-\t\tstaterr = _mm_unpacklo_epi32(sterr_tmp1, sterr_tmp2);\n-\n \t\t/* D.3 copy final 3,4 data to rx_pkts */\n \t\t_mm_storeu_si128\n \t\t\t((void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,\n@@ -522,8 +488,7 @@\n \t\t}\n \n \t\t/* C.3 calc available number of desc */\n-\t\tstaterr = _mm_and_si128(staterr, dd_check);\n-\t\tstaterr = _mm_packs_epi32(staterr, zero);\n+\t\tstaterr = _mm_packs_epi32(dd_status, zero);\n \n \t\t/* D.3 copy final 1,2 data to rx_pkts */\n \t\t_mm_storeu_si128\n", "prefixes": [] }