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GET /api/patches/8070/?format=api
{ "id": 8070, "url": "https://patches.dpdk.org/api/patches/8070/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1445950311-20497-2-git-send-email-konstantin.ananyev@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1445950311-20497-2-git-send-email-konstantin.ananyev@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1445950311-20497-2-git-send-email-konstantin.ananyev@intel.com", "date": "2015-10-27T12:51:43", "name": "[dpdk-dev,PATCHv7,1/9] ethdev: add new API to retrieve RX/TX queue information", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "d6e92b020c6671869b4575ca39f5bdf432c33a56", "submitter": { "id": 33, "url": "https://patches.dpdk.org/api/people/33/?format=api", "name": "Ananyev, Konstantin", "email": "konstantin.ananyev@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1445950311-20497-2-git-send-email-konstantin.ananyev@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/8070/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/8070/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 0164F8D3D;\n\tTue, 27 Oct 2015 13:52:29 +0100 (CET)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id CFE046A80\n\tfor <dev@dpdk.org>; Tue, 27 Oct 2015 13:52:22 +0100 (CET)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga103.jf.intel.com with ESMTP; 27 Oct 2015 05:52:22 -0700", "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby fmsmga001.fm.intel.com with ESMTP; 27 Oct 2015 05:52:19 -0700", "from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com\n\t[10.237.217.46])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\tt9RCqIVO028726; Tue, 27 Oct 2015 12:52:18 GMT", "from sivswdev02.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev02.ir.intel.com with ESMTP id t9RCqIe1020559;\n\tTue, 27 Oct 2015 12:52:18 GMT", "(from kananye1@localhost)\n\tby sivswdev02.ir.intel.com with id t9RCqIhK020555;\n\tTue, 27 Oct 2015 12:52:18 GMT" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,205,1444719600\"; d=\"scan'208\";a=\"820471449\"", "From": "Konstantin Ananyev <konstantin.ananyev@intel.com>", "To": "dev@dpdk.org", "Date": "Tue, 27 Oct 2015 12:51:43 +0000", "Message-Id": "<1445950311-20497-2-git-send-email-konstantin.ananyev@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": [ "<1445950311-20497-1-git-send-email-konstantin.ananyev@intel.com>", "<1445515592-25920-2-git-send-email-konstantin.ananyev@intel.com>" ], "References": [ "<1445950311-20497-1-git-send-email-konstantin.ananyev@intel.com>", "<1445515592-25920-2-git-send-email-konstantin.ananyev@intel.com>" ], "Subject": "[dpdk-dev] [PATCHv7 1/9] ethdev: add new API to retrieve RX/TX\n\tqueue information", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add the ability for the upper layer to query RX/TX queue information.\nAdd into rte_eth_dev_info new fields to represent information about\nRX/TX descriptors min/max/alig nnumbers per queue for the device.\n\nAdd new structures:\nstruct rte_eth_rxq_info\nstruct rte_eth_txq_info\n\nnew functions:\nrte_eth_rx_queue_info_get\nrte_eth_tx_queue_info_get\n\ninto rte_etdev API.\n\nLeft extra free space in the queue info structures,\nso extra fields could be added later without ABI breakage.\n\nAdd new fields:\nrx_desc_lim\ntx_desc_lim\ninto rte_eth_dev_info.\n\nSigned-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n lib/librte_ether/rte_ethdev.c | 68 +++++++++++++++++++++++++++\n lib/librte_ether/rte_ethdev.h | 85 +++++++++++++++++++++++++++++++++-\n lib/librte_ether/rte_ether_version.map | 8 ++++\n 3 files changed, 159 insertions(+), 2 deletions(-)", "diff": "diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c\nindex f593f6e..d18ecb5 100644\n--- a/lib/librte_ether/rte_ethdev.c\n+++ b/lib/librte_ether/rte_ethdev.c\n@@ -1447,6 +1447,19 @@ rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,\n \t\treturn -EINVAL;\n \t}\n \n+\tif (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||\n+\t\t\tnb_rx_desc < dev_info.rx_desc_lim.nb_min ||\n+\t\t\tnb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {\n+\n+\t\tPMD_DEBUG_TRACE(\"Invalid value for nb_rx_desc(=%hu), \"\n+\t\t\t\"should be: <= %hu, = %hu, and a product of %hu\\n\",\n+\t\t\tnb_rx_desc,\n+\t\t\tdev_info.rx_desc_lim.nb_max,\n+\t\t\tdev_info.rx_desc_lim.nb_min,\n+\t\t\tdev_info.rx_desc_lim.nb_align);\n+\t\treturn -EINVAL;\n+\t}\n+\n \tif (rx_conf == NULL)\n \t\trx_conf = &dev_info.default_rxconf;\n \n@@ -1786,11 +1799,18 @@ void\n rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)\n {\n \tstruct rte_eth_dev *dev;\n+\tconst struct rte_eth_desc_lim lim = {\n+\t\t.nb_max = UINT16_MAX,\n+\t\t.nb_min = 0,\n+\t\t.nb_align = 1,\n+\t};\n \n \tVALID_PORTID_OR_RET(port_id);\n \tdev = &rte_eth_devices[port_id];\n \n \tmemset(dev_info, 0, sizeof(struct rte_eth_dev_info));\n+\tdev_info->rx_desc_lim = lim;\n+\tdev_info->tx_desc_lim = lim;\n \n \tFUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);\n \t(*dev->dev_ops->dev_infos_get)(dev, dev_info);\n@@ -3221,6 +3241,54 @@ rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,\n }\n \n int\n+rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,\n+\tstruct rte_eth_rxq_info *qinfo)\n+{\n+\tstruct rte_eth_dev *dev;\n+\n+\tVALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n+\n+\tif (qinfo == NULL)\n+\t\treturn -EINVAL;\n+\n+\tdev = &rte_eth_devices[port_id];\n+\tif (queue_id >= dev->data->nb_rx_queues) {\n+\t\tPMD_DEBUG_TRACE(\"Invalid RX queue_id=%d\\n\", queue_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);\n+\n+\tmemset(qinfo, 0, sizeof(*qinfo));\n+\tdev->dev_ops->rxq_info_get(dev, queue_id, qinfo);\n+\treturn 0;\n+}\n+\n+int\n+rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,\n+\tstruct rte_eth_txq_info *qinfo)\n+{\n+\tstruct rte_eth_dev *dev;\n+\n+\tVALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n+\n+\tif (qinfo == NULL)\n+\t\treturn -EINVAL;\n+\n+\tdev = &rte_eth_devices[port_id];\n+\tif (queue_id >= dev->data->nb_tx_queues) {\n+\t\tPMD_DEBUG_TRACE(\"Invalid TX queue_id=%d\\n\", queue_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);\n+\n+\tmemset(qinfo, 0, sizeof(*qinfo));\n+\tdev->dev_ops->txq_info_get(dev, queue_id, qinfo);\n+\treturn 0;\n+}\n+\n+int\n rte_eth_dev_set_mc_addr_list(uint8_t port_id,\n \t\t\t struct ether_addr *mc_addr_set,\n \t\t\t uint32_t nb_mc_addr)\ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex 8a8c82b..4d7b6f2 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -653,6 +653,15 @@ struct rte_eth_txconf {\n };\n \n /**\n+ * A structure contains information about HW descriptor ring limitations.\n+ */\n+struct rte_eth_desc_lim {\n+\tuint16_t nb_max; /**< Max allowed number of descriptors. */\n+\tuint16_t nb_min; /**< Min allowed number of descriptors. */\n+\tuint16_t nb_align; /**< Number of descriptors should be aligned to. */\n+};\n+\n+/**\n * This enum indicates the flow control mode\n */\n enum rte_eth_fc_mode {\n@@ -837,6 +846,8 @@ struct rte_eth_dev_info {\n \tuint16_t vmdq_queue_base; /**< First queue ID for VMDQ pools. */\n \tuint16_t vmdq_queue_num; /**< Queue number for VMDQ pools. */\n \tuint16_t vmdq_pool_base; /**< First ID of VMDQ pools. */\n+\tstruct rte_eth_desc_lim rx_desc_lim; /**< RX descriptors limits */\n+\tstruct rte_eth_desc_lim tx_desc_lim; /**< TX descriptors limits */\n };\n \n /** Maximum name length for extended statistics counters */\n@@ -854,6 +865,26 @@ struct rte_eth_xstats {\n \tuint64_t value;\n };\n \n+/**\n+ * Ethernet device RX queue information structure.\n+ * Used to retieve information about configured queue.\n+ */\n+struct rte_eth_rxq_info {\n+\tstruct rte_mempool *mp; /**< mempool used by that queue. */\n+\tstruct rte_eth_rxconf conf; /**< queue config parameters. */\n+\tuint8_t scattered_rx; /**< scattered packets RX supported. */\n+\tuint16_t nb_desc; /**< configured number of RXDs. */\n+} __rte_cache_aligned;\n+\n+/**\n+ * Ethernet device TX queue information structure.\n+ * Used to retieve information about configured queue.\n+ */\n+struct rte_eth_txq_info {\n+\tstruct rte_eth_txconf conf; /**< queue config parameters. */\n+\tuint16_t nb_desc; /**< configured number of TXDs. */\n+} __rte_cache_aligned;\n+\n struct rte_eth_dev;\n \n struct rte_eth_dev_callback;\n@@ -965,6 +996,12 @@ typedef uint32_t (*eth_rx_queue_count_t)(struct rte_eth_dev *dev,\n typedef int (*eth_rx_descriptor_done_t)(void *rxq, uint16_t offset);\n /**< @internal Check DD bit of specific RX descriptor */\n \n+typedef void (*eth_rxq_info_get_t)(struct rte_eth_dev *dev,\n+\tuint16_t rx_queue_id, struct rte_eth_rxq_info *qinfo);\n+\n+typedef void (*eth_txq_info_get_t)(struct rte_eth_dev *dev,\n+\tuint16_t tx_queue_id, struct rte_eth_txq_info *qinfo);\n+\n typedef int (*mtu_set_t)(struct rte_eth_dev *dev, uint16_t mtu);\n /**< @internal Set MTU. */\n \n@@ -1301,9 +1338,13 @@ struct eth_dev_ops {\n \trss_hash_update_t rss_hash_update;\n \t/** Get current RSS hash configuration. */\n \trss_hash_conf_get_t rss_hash_conf_get;\n-\teth_filter_ctrl_t filter_ctrl; /**< common filter control*/\n+\teth_filter_ctrl_t filter_ctrl;\n+\t/**< common filter control. */\n \teth_set_mc_addr_list_t set_mc_addr_list; /**< set list of mcast addrs */\n-\n+\teth_rxq_info_get_t rxq_info_get;\n+\t/**< retrieve RX queue information. */\n+\teth_txq_info_get_t txq_info_get;\n+\t/**< retrieve TX queue information. */\n \t/** Turn IEEE1588/802.1AS timestamping on. */\n \teth_timesync_enable_t timesync_enable;\n \t/** Turn IEEE1588/802.1AS timestamping off. */\n@@ -3441,6 +3482,46 @@ int rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,\n \t\tstruct rte_eth_rxtx_callback *user_cb);\n \n /**\n+ * Retrieve information about given port's RX queue.\n+ *\n+ * @param port_id\n+ * The port identifier of the Ethernet device.\n+ * @param queue_id\n+ * The RX queue on the Ethernet device for which information\n+ * will be retrieved.\n+ * @param qinfo\n+ * A pointer to a structure of type *rte_eth_rxq_info_info* to be filled with\n+ * the information of the Ethernet device.\n+ *\n+ * @return\n+ * - 0: Success\n+ * - -ENOTSUP: routine is not supported by the device PMD.\n+ * - -EINVAL: The port_id or the queue_id is out of range.\n+ */\n+int rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,\n+\tstruct rte_eth_rxq_info *qinfo);\n+\n+/**\n+ * Retrieve information about given port's TX queue.\n+ *\n+ * @param port_id\n+ * The port identifier of the Ethernet device.\n+ * @param queue_id\n+ * The TX queue on the Ethernet device for which information\n+ * will be retrieved.\n+ * @param qinfo\n+ * A pointer to a structure of type *rte_eth_txq_info_info* to be filled with\n+ * the information of the Ethernet device.\n+ *\n+ * @return\n+ * - 0: Success\n+ * - -ENOTSUP: routine is not supported by the device PMD.\n+ * - -EINVAL: The port_id or the queue_id is out of range.\n+ */\n+int rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,\n+\tstruct rte_eth_txq_info *qinfo);\n+\n+/*\n * Retrieve number of available registers for access\n *\n * @param port_id\ndiff --git a/lib/librte_ether/rte_ether_version.map b/lib/librte_ether/rte_ether_version.map\nindex 8345a6c..1fb4b87 100644\n--- a/lib/librte_ether/rte_ether_version.map\n+++ b/lib/librte_ether/rte_ether_version.map\n@@ -127,3 +127,11 @@ DPDK_2.1 {\n \trte_eth_timesync_read_tx_timestamp;\n \n } DPDK_2.0;\n+\n+DPDK_2.2 {\n+\tglobal:\n+\n+\trte_eth_rx_queue_info_get;\n+\trte_eth_tx_queue_info_get;\n+\n+} DPDK_2.1;\n", "prefixes": [ "dpdk-dev", "PATCHv7", "1/9" ] }