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{
    "id": 8051,
    "url": "https://patches.dpdk.org/api/patches/8051/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1445939209-12783-7-git-send-email-jing.d.chen@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1445939209-12783-7-git-send-email-jing.d.chen@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1445939209-12783-7-git-send-email-jing.d.chen@intel.com",
    "date": "2015-10-27T09:46:39",
    "name": "[dpdk-dev,v3,06/16] fm10k: add Vector RX function",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "3801e11be282f5cc1a6e7c35ae3cd2aaa3306b45",
    "submitter": {
        "id": 40,
        "url": "https://patches.dpdk.org/api/people/40/?format=api",
        "name": "Chen, Jing D",
        "email": "jing.d.chen@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1445939209-12783-7-git-send-email-jing.d.chen@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8051/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8051/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id E8B608DAC;\n\tTue, 27 Oct 2015 10:47:12 +0100 (CET)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id D213C5A56\n\tfor <dev@dpdk.org>; Tue, 27 Oct 2015 10:47:10 +0100 (CET)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga103.jf.intel.com with ESMTP; 27 Oct 2015 02:47:09 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 27 Oct 2015 02:47:09 -0700",
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            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9R9l40u012918; Tue, 27 Oct 2015 17:47:06 +0800",
            "(from jingche2@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9R9l46Z012914; \n\tTue, 27 Oct 2015 17:47:04 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.20,204,1444719600\"; d=\"scan'208\";a=\"804133978\"",
        "From": "\"Chen Jing D(Mark)\" <jing.d.chen@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Tue, 27 Oct 2015 17:46:39 +0800",
        "Message-Id": "<1445939209-12783-7-git-send-email-jing.d.chen@intel.com>",
        "X-Mailer": "git-send-email 1.7.12.2",
        "In-Reply-To": "<1445939209-12783-1-git-send-email-jing.d.chen@intel.com>",
        "References": "<1445507104-22563-2-git-send-email-jing.d.chen@intel.com>\n\t<1445939209-12783-1-git-send-email-jing.d.chen@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 06/16] fm10k: add Vector RX function",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: \"Chen Jing D(Mark)\" <jing.d.chen@intel.com>\n\nAdd func fm10k_recv_raw_pkts_vec to parse raw packets, in which\nincludes possible chained packets.\nAdd func fm10k_recv_pkts_vec to receive single mbuf packet.\n\nSigned-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>\n---\n drivers/net/fm10k/fm10k.h          |    1 +\n drivers/net/fm10k/fm10k_rxtx_vec.c |  201 ++++++++++++++++++++++++++++++++++++\n 2 files changed, 202 insertions(+), 0 deletions(-)",
    "diff": "diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h\nindex 5df7960..f04ba2c 100644\n--- a/drivers/net/fm10k/fm10k.h\n+++ b/drivers/net/fm10k/fm10k.h\n@@ -327,4 +327,5 @@ uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \tuint16_t nb_pkts);\n \n int fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq);\n+uint16_t fm10k_recv_pkts_vec(void *, struct rte_mbuf **, uint16_t);\n #endif\ndiff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c b/drivers/net/fm10k/fm10k_rxtx_vec.c\nindex 581a309..6127cf9 100644\n--- a/drivers/net/fm10k/fm10k_rxtx_vec.c\n+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c\n@@ -281,3 +281,204 @@ fm10k_rxq_rearm(struct fm10k_rx_queue *rxq)\n \t/* Update the tail pointer on the NIC */\n \tFM10K_PCI_REG_WRITE(rxq->tail_ptr, rx_id);\n }\n+\n+static inline uint16_t\n+fm10k_recv_raw_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\tuint16_t nb_pkts, uint8_t *split_packet)\n+{\n+\tvolatile union fm10k_rx_desc *rxdp;\n+\tstruct rte_mbuf **mbufp;\n+\tuint16_t nb_pkts_recd;\n+\tint pos;\n+\tstruct fm10k_rx_queue *rxq = rx_queue;\n+\tuint64_t var;\n+\t__m128i shuf_msk;\n+\t__m128i dd_check, eop_check;\n+\tuint16_t next_dd;\n+\n+\tnext_dd = rxq->next_dd;\n+\n+\t/* Just the act of getting into the function from the application is\n+\t * going to cost about 7 cycles\n+\t */\n+\trxdp = rxq->hw_ring + next_dd;\n+\n+\t_mm_prefetch((const void *)rxdp, _MM_HINT_T0);\n+\n+\t/* See if we need to rearm the RX queue - gives the prefetch a bit\n+\t * of time to act\n+\t */\n+\tif (rxq->rxrearm_nb > RTE_FM10K_RXQ_REARM_THRESH)\n+\t\tfm10k_rxq_rearm(rxq);\n+\n+\t/* Before we start moving massive data around, check to see if\n+\t * there is actually a packet available\n+\t */\n+\tif (!(rxdp->d.staterr & FM10K_RXD_STATUS_DD))\n+\t\treturn 0;\n+\n+\t/* Vecotr RX will process 4 packets at a time, strip the unaligned\n+\t * tails in case it's not multiple of 4.\n+\t */\n+\tnb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_FM10K_DESCS_PER_LOOP);\n+\n+\t/* 4 packets DD mask */\n+\tdd_check = _mm_set_epi64x(0x0000000100000001LL, 0x0000000100000001LL);\n+\n+\t/* 4 packets EOP mask */\n+\teop_check = _mm_set_epi64x(0x0000000200000002LL, 0x0000000200000002LL);\n+\n+\t/* mask to shuffle from desc. to mbuf */\n+\tshuf_msk = _mm_set_epi8(\n+\t\t7, 6, 5, 4,  /* octet 4~7, 32bits rss */\n+\t\t15, 14,      /* octet 14~15, low 16 bits vlan_macip */\n+\t\t13, 12,      /* octet 12~13, 16 bits data_len */\n+\t\t0xFF, 0xFF,  /* skip high 16 bits pkt_len, zero out */\n+\t\t13, 12,      /* octet 12~13, low 16 bits pkt_len */\n+\t\t0xFF, 0xFF,  /* skip high 16 bits pkt_type */\n+\t\t0xFF, 0xFF   /* Skip pkt_type field in shuffle operation */\n+\t\t);\n+\n+\t/* Cache is empty -> need to scan the buffer rings, but first move\n+\t * the next 'n' mbufs into the cache\n+\t */\n+\tmbufp = &rxq->sw_ring[next_dd];\n+\n+\t/* A. load 4 packet in one loop\n+\t * [A*. mask out 4 unused dirty field in desc]\n+\t * B. copy 4 mbuf point from swring to rx_pkts\n+\t * C. calc the number of DD bits among the 4 packets\n+\t * [C*. extract the end-of-packet bit, if requested]\n+\t * D. fill info. from desc to mbuf\n+\t */\n+\tfor (pos = 0, nb_pkts_recd = 0; pos < nb_pkts;\n+\t\t\tpos += RTE_FM10K_DESCS_PER_LOOP,\n+\t\t\trxdp += RTE_FM10K_DESCS_PER_LOOP) {\n+\t\t__m128i descs0[RTE_FM10K_DESCS_PER_LOOP];\n+\t\t__m128i pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;\n+\t\t__m128i zero, staterr, sterr_tmp1, sterr_tmp2;\n+\t\t__m128i mbp1, mbp2; /* two mbuf pointer in one XMM reg. */\n+\n+\t\t/* B.1 load 1 mbuf point */\n+\t\tmbp1 = _mm_loadu_si128((__m128i *)&mbufp[pos]);\n+\n+\t\t/* Read desc statuses backwards to avoid race condition */\n+\t\t/* A.1 load 4 pkts desc */\n+\t\tdescs0[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));\n+\n+\t\t/* B.2 copy 2 mbuf point into rx_pkts  */\n+\t\t_mm_storeu_si128((__m128i *)&rx_pkts[pos], mbp1);\n+\n+\t\t/* B.1 load 1 mbuf point */\n+\t\tmbp2 = _mm_loadu_si128((__m128i *)&mbufp[pos+2]);\n+\n+\t\tdescs0[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));\n+\t\t/* B.1 load 2 mbuf point */\n+\t\tdescs0[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));\n+\t\tdescs0[0] = _mm_loadu_si128((__m128i *)(rxdp));\n+\n+\t\t/* B.2 copy 2 mbuf point into rx_pkts  */\n+\t\t_mm_storeu_si128((__m128i *)&rx_pkts[pos+2], mbp2);\n+\n+\t\t/* avoid compiler reorder optimization */\n+\t\trte_compiler_barrier();\n+\n+\t\tif (split_packet) {\n+\t\t\trte_prefetch0(&rx_pkts[pos]->cacheline1);\n+\t\t\trte_prefetch0(&rx_pkts[pos + 1]->cacheline1);\n+\t\t\trte_prefetch0(&rx_pkts[pos + 2]->cacheline1);\n+\t\t\trte_prefetch0(&rx_pkts[pos + 3]->cacheline1);\n+\t\t}\n+\n+\t\t/* D.1 pkt 3,4 convert format from desc to pktmbuf */\n+\t\tpkt_mb4 = _mm_shuffle_epi8(descs0[3], shuf_msk);\n+\t\tpkt_mb3 = _mm_shuffle_epi8(descs0[2], shuf_msk);\n+\n+\t\t/* C.1 4=>2 filter staterr info only */\n+\t\tsterr_tmp2 = _mm_unpackhi_epi32(descs0[3], descs0[2]);\n+\t\t/* C.1 4=>2 filter staterr info only */\n+\t\tsterr_tmp1 = _mm_unpackhi_epi32(descs0[1], descs0[0]);\n+\n+\t\t/* set ol_flags with vlan packet type */\n+\t\tfm10k_desc_to_olflags_v(descs0, &rx_pkts[pos]);\n+\n+\t\t/* D.1 pkt 1,2 convert format from desc to pktmbuf */\n+\t\tpkt_mb2 = _mm_shuffle_epi8(descs0[1], shuf_msk);\n+\t\tpkt_mb1 = _mm_shuffle_epi8(descs0[0], shuf_msk);\n+\n+\t\t/* C.2 get 4 pkts staterr value  */\n+\t\tzero = _mm_xor_si128(dd_check, dd_check);\n+\t\tstaterr = _mm_unpacklo_epi32(sterr_tmp1, sterr_tmp2);\n+\n+\t\t/* D.3 copy final 3,4 data to rx_pkts */\n+\t\t_mm_storeu_si128((void *)&rx_pkts[pos+3]->rx_descriptor_fields1,\n+\t\t\t\tpkt_mb4);\n+\t\t_mm_storeu_si128((void *)&rx_pkts[pos+2]->rx_descriptor_fields1,\n+\t\t\t\tpkt_mb3);\n+\n+\t\t/* C* extract and record EOP bit */\n+\t\tif (split_packet) {\n+\t\t\t__m128i eop_shuf_mask = _mm_set_epi8(\n+\t\t\t\t\t0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t\t0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t\t0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t\t0x04, 0x0C, 0x00, 0x08\n+\t\t\t\t\t);\n+\n+\t\t\t/* and with mask to extract bits, flipping 1-0 */\n+\t\t\t__m128i eop_bits = _mm_andnot_si128(staterr, eop_check);\n+\t\t\t/* the staterr values are not in order, as the count\n+\t\t\t * count of dd bits doesn't care. However, for end of\n+\t\t\t * packet tracking, we do care, so shuffle. This also\n+\t\t\t * compresses the 32-bit values to 8-bit\n+\t\t\t */\n+\t\t\teop_bits = _mm_shuffle_epi8(eop_bits, eop_shuf_mask);\n+\t\t\t/* store the resulting 32-bit value */\n+\t\t\t*(int *)split_packet = _mm_cvtsi128_si32(eop_bits);\n+\t\t\tsplit_packet += RTE_FM10K_DESCS_PER_LOOP;\n+\n+\t\t\t/* zero-out next pointers */\n+\t\t\trx_pkts[pos]->next = NULL;\n+\t\t\trx_pkts[pos + 1]->next = NULL;\n+\t\t\trx_pkts[pos + 2]->next = NULL;\n+\t\t\trx_pkts[pos + 3]->next = NULL;\n+\t\t}\n+\n+\t\t/* C.3 calc available number of desc */\n+\t\tstaterr = _mm_and_si128(staterr, dd_check);\n+\t\tstaterr = _mm_packs_epi32(staterr, zero);\n+\n+\t\t/* D.3 copy final 1,2 data to rx_pkts */\n+\t\t_mm_storeu_si128((void *)&rx_pkts[pos+1]->rx_descriptor_fields1,\n+\t\t\t\tpkt_mb2);\n+\t\t_mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n+\t\t\t\tpkt_mb1);\n+\n+\t\tfm10k_desc_to_pktype_v(descs0, &rx_pkts[pos]);\n+\n+\t\t/* C.4 calc avaialbe number of desc */\n+\t\tvar = __builtin_popcountll(_mm_cvtsi128_si64(staterr));\n+\t\tnb_pkts_recd += var;\n+\t\tif (likely(var != RTE_FM10K_DESCS_PER_LOOP))\n+\t\t\tbreak;\n+\t}\n+\n+\t/* Update our internal tail pointer */\n+\trxq->next_dd = (uint16_t)(rxq->next_dd + nb_pkts_recd);\n+\trxq->next_dd = (uint16_t)(rxq->next_dd & (rxq->nb_desc - 1));\n+\trxq->rxrearm_nb = (uint16_t)(rxq->rxrearm_nb + nb_pkts_recd);\n+\n+\treturn nb_pkts_recd;\n+}\n+\n+/* vPMD receive routine\n+ *\n+ * Notice:\n+ * - don't support ol_flags for rss and csum err\n+ */\n+uint16_t\n+fm10k_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\tuint16_t nb_pkts)\n+{\n+\treturn fm10k_recv_raw_pkts_vec(rx_queue, rx_pkts, nb_pkts, NULL);\n+}\n",
    "prefixes": [
        "dpdk-dev",
        "v3",
        "06/16"
    ]
}