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GET /api/patches/8026/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 8026,
    "url": "https://patches.dpdk.org/api/patches/8026/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1445877458-31052-9-git-send-email-viktorin@rehivetech.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1445877458-31052-9-git-send-email-viktorin@rehivetech.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1445877458-31052-9-git-send-email-viktorin@rehivetech.com",
    "date": "2015-10-26T16:37:30",
    "name": "[dpdk-dev,v2,08/16] eal/arm: vector memcpy for ARM",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "311e76d305b1555b241cbff1287f6342632400c0",
    "submitter": {
        "id": 292,
        "url": "https://patches.dpdk.org/api/people/292/?format=api",
        "name": "Jan Viktorin",
        "email": "viktorin@rehivetech.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1445877458-31052-9-git-send-email-viktorin@rehivetech.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8026/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8026/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id E0DBD8E7E;\n\tMon, 26 Oct 2015 17:39:41 +0100 (CET)",
            "from wes1-so1.wedos.net (wes1-so1.wedos.net [46.28.106.15])\n\tby dpdk.org (Postfix) with ESMTP id 1EDC18D8C\n\tfor <dev@dpdk.org>; Mon, 26 Oct 2015 17:39:31 +0100 (CET)",
            "from pcviktorin.fit.vutbr.cz (pcviktorin.fit.vutbr.cz\n\t[147.229.13.147])\n\tby wes1-so1.wedos.net (Postfix) with ESMTPSA id 3nl21t73V4z533;\n\tMon, 26 Oct 2015 17:39:30 +0100 (CET)"
        ],
        "From": "Jan Viktorin <viktorin@rehivetech.com>",
        "To": "Thomas Monjalon <thomas.monjalon@6wind.com>,\n\tDavid Hunt <david.hunt@intel.com>, dev@dpdk.org",
        "Date": "Mon, 26 Oct 2015 17:37:30 +0100",
        "Message-Id": "<1445877458-31052-9-git-send-email-viktorin@rehivetech.com>",
        "X-Mailer": "git-send-email 2.6.1",
        "In-Reply-To": "<1445877458-31052-1-git-send-email-viktorin@rehivetech.com>",
        "References": "<1445877458-31052-1-git-send-email-viktorin@rehivetech.com>",
        "Cc": "Vlastimil Kosar <kosar@rehivetech.com>",
        "Subject": "[dpdk-dev] [PATCH v2 08/16] eal/arm: vector memcpy for ARM",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Vlastimil Kosar <kosar@rehivetech.com>\n\nThe SSE based memory copy in DPDK only support x86. This patch\nadds ARM NEON based memory copy functions for ARM architecture.\n\nThe implementation improves memory copy of short or well aligned\ndata buffers. The following measurements show improvements over\nthe libc memcpy on Cortex CPUs.\n\n               by X % faster\nLength (B)   a15    a7     a9\n   1         4.9  15.2    3.2\n   7        56.9  48.2   40.3\n   8        37.3  39.8   29.6\n   9        69.3  38.7   33.9\n  15        60.8  35.3   23.7\n  16        50.6  35.9   35.0\n  17        57.7  35.7   31.1\n  31        16.0  23.3    9.0\n  32        65.9  13.5   21.4\n  33         3.9  10.3   -3.7\n  63         2.0  12.9   -2.0\n  64        66.5   0.0   16.5\n  65         2.7   7.6  -35.6\n 127         0.1   4.5  -18.9\n 128        66.2   1.5  -51.4\n 129        -0.8   3.2  -35.8\n 255        -3.1  -0.9  -69.1\n 256        67.9   1.2    7.2\n 257        -3.6  -1.9  -36.9\n 320        67.7   1.4    0.0\n 384        66.8   1.4  -14.2\n 511       -44.9  -2.3  -41.9\n 512        67.3   1.4   -6.8\n 513       -41.7  -3.0  -36.2\n1023       -82.4  -2.8  -41.2\n1024        68.3   1.4  -11.6\n1025       -80.1  -3.3  -38.1\n1518       -47.3  -5.0  -38.3\n1522       -48.3  -6.0  -37.9\n1600        65.4   1.3  -27.3\n2048        59.5   1.5  -10.9\n3072        52.3   1.5  -12.2\n4096        45.3   1.4  -12.5\n5120        40.6   1.5  -14.5\n6144        35.4   1.4  -13.4\n7168        32.9   1.4  -13.9\n8192        28.2   1.4  -15.1\n\nSigned-off-by: Vlastimil Kosar <kosar@rehivetech.com>\nSigned-off-by: Jan Viktorin <viktorin@rehivetech.com>\n---\n .../common/include/arch/arm/rte_memcpy.h           | 270 +++++++++++++++++++++\n 1 file changed, 270 insertions(+)\n create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy.h",
    "diff": "diff --git a/lib/librte_eal/common/include/arch/arm/rte_memcpy.h b/lib/librte_eal/common/include/arch/arm/rte_memcpy.h\nnew file mode 100644\nindex 0000000..ac885e9\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/arm/rte_memcpy.h\n@@ -0,0 +1,270 @@\n+/*\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2015 RehiveTech. All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of RehiveTech nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_MEMCPY_ARM_H_\n+#define _RTE_MEMCPY_ARM_H_\n+\n+#include <stdint.h>\n+#include <string.h>\n+/* ARM NEON Intrinsics are used to copy data */\n+#include <arm_neon.h>\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \"generic/rte_memcpy.h\"\n+\n+static inline void\n+rte_mov16(uint8_t *dst, const uint8_t *src)\n+{\n+\tvst1q_u8(dst, vld1q_u8(src));\n+}\n+\n+static inline void\n+rte_mov32(uint8_t *dst, const uint8_t *src)\n+{\n+\tasm volatile (\"vld1.8 {d0-d3}, [%[src]]\\n\\t\"\n+\t              \"vst1.8 {d0-d3}, [%[dst]]\\n\\t\"\n+\t              : [src] \"+r\" (src), [dst] \"+r\" (dst)\n+\t              : : \"memory\", \"d0\", \"d1\", \"d2\", \"d3\");\n+}\n+\n+static inline void\n+rte_mov48(uint8_t *dst, const uint8_t *src)\n+{\n+\tasm volatile (\"vld1.8 {d0-d3}, [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d4-d5}, [%[src]]\\n\\t\"\n+\t              \"vst1.8 {d0-d3}, [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d4-d5}, [%[dst]]\\n\\t\"\n+\t              : [src] \"+r\" (src), [dst] \"+r\" (dst)\n+\t              : : \"memory\", \"d0\", \"d1\", \"d2\", \"d3\", \"d4\", \"d5\");\n+}\n+\n+static inline void\n+rte_mov64(uint8_t *dst, const uint8_t *src)\n+{\n+\tasm volatile (\"vld1.8 {d0-d3}, [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d4-d7}, [%[src]]\\n\\t\"\n+\t              \"vst1.8 {d0-d3}, [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d4-d7}, [%[dst]]\\n\\t\"\n+\t              : [src] \"+r\" (src), [dst] \"+r\" (dst)\n+\t              : : \"memory\", \"d0\", \"d1\", \"d2\", \"d3\", \"d4\", \"d5\", \"d6\", \"d7\");\n+}\n+\n+static inline void\n+rte_mov128(uint8_t *dst, const uint8_t *src)\n+{\n+\tasm volatile (\"pld [%[src], #64]\" : : [src] \"r\" (src));\n+\tasm volatile (\"vld1.8 {d0-d3},   [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d4-d7},   [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d8-d11},  [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d12-d15}, [%[src]]\\n\\t\"\n+\t              \"vst1.8 {d0-d3},   [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d4-d7},   [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d8-d11},  [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d12-d15}, [%[dst]]\\n\\t\"\n+\t              : [src] \"+r\" (src), [dst] \"+r\" (dst)\n+\t              : : \"memory\", \"d0\", \"d1\", \"d2\", \"d3\", \"d4\", \"d5\", \"d6\", \"d7\",\n+\t                  \"d8\", \"d9\", \"d10\", \"d11\", \"d12\", \"d13\", \"d14\", \"d15\");\n+}\n+\n+static inline void\n+rte_mov256(uint8_t *dst, const uint8_t *src)\n+{\n+\tasm volatile (\"pld [%[src], #64]\" : : [src] \"r\" (src));\n+\tasm volatile (\"pld [%[src], #128]\" : : [src] \"r\" (src));\n+\tasm volatile (\"pld [%[src], #192]\" : : [src] \"r\" (src));\n+\tasm volatile (\"pld [%[src], #256]\" : : [src] \"r\" (src));\n+\tasm volatile (\"pld [%[src], #320]\" : : [src] \"r\" (src));\n+\tasm volatile (\"pld [%[src], #384]\" : : [src] \"r\" (src));\n+\tasm volatile (\"pld [%[src], #448]\" : : [src] \"r\" (src));\n+\tasm volatile (\"vld1.8 {d0-d3},   [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d4-d7},   [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d8-d11},  [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d12-d15}, [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d16-d19}, [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d20-d23}, [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d24-d27}, [%[src]]!\\n\\t\"\n+\t              \"vld1.8 {d28-d31}, [%[src]]\\n\\t\"\n+\t              \"vst1.8 {d0-d3},   [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d4-d7},   [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d8-d11},  [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d12-d15}, [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d16-d19}, [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d20-d23}, [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d24-d27}, [%[dst]]!\\n\\t\"\n+\t              \"vst1.8 {d28-d31}, [%[dst]]!\\n\\t\"\n+\t              : [src] \"+r\" (src), [dst] \"+r\" (dst)\n+\t              : : \"memory\", \"d0\", \"d1\", \"d2\", \"d3\", \"d4\", \"d5\", \"d6\", \"d7\",\n+\t                  \"d8\", \"d9\", \"d10\", \"d11\", \"d12\", \"d13\", \"d14\", \"d15\",\n+\t                  \"d16\", \"d17\", \"d18\", \"d19\", \"d20\", \"d21\", \"d22\", \"d23\",\n+\t                  \"d24\", \"d25\", \"d26\", \"d27\", \"d28\", \"d29\", \"d30\", \"d31\");\n+}\n+\n+#define rte_memcpy(dst, src, n)              \\\n+\t({ (__builtin_constant_p(n)) ?       \\\n+\tmemcpy((dst), (src), (n)) :          \\\n+\trte_memcpy_func((dst), (src), (n)); })\n+\n+static inline void *\n+rte_memcpy_func(void *dst, const void *src, size_t n)\n+{\n+\tvoid *ret = dst;\n+\n+\t/* We can't copy < 16 bytes using XMM registers so do it manually. */\n+\tif (n < 16) {\n+\t\tif (n & 0x01) {\n+\t\t\t*(uint8_t *)dst = *(const uint8_t *)src;\n+\t\t\tdst = (uint8_t *)dst + 1;\n+\t\t\tsrc = (const uint8_t *)src + 1;\n+\t\t}\n+\t\tif (n & 0x02) {\n+\t\t\t*(uint16_t *)dst = *(const uint16_t *)src;\n+\t\t\tdst = (uint16_t *)dst + 1;\n+\t\t\tsrc = (const uint16_t *)src + 1;\n+\t\t}\n+\t\tif (n & 0x04) {\n+\t\t\t*(uint32_t *)dst = *(const uint32_t *)src;\n+\t\t\tdst = (uint32_t *)dst + 1;\n+\t\t\tsrc = (const uint32_t *)src + 1;\n+\t\t}\n+\t\tif (n & 0x08) {\n+\t\t\t/* ARMv7 can not handle unaligned access to long long\n+\t\t\t * (uint64_t). Therefore two uint32_t operations are used.\n+\t\t\t * TODO: use NEON too?\n+\t\t\t */\n+\t\t\t*(uint32_t *)dst = *(const uint32_t *)src;\n+\t\t\tdst = (uint32_t *)dst + 1;\n+\t\t\tsrc = (const uint32_t *)src + 1;\n+\t\t\t*(uint32_t *)dst = *(const uint32_t *)src;\n+\t\t}\n+\t\treturn ret;\n+\t}\n+\n+\t/* Special fast cases for <= 128 bytes */\n+\tif (n <= 32) {\n+\t\trte_mov16((uint8_t *)dst, (const uint8_t *)src);\n+\t\trte_mov16((uint8_t *)dst - 16 + n,\n+\t\t\t(const uint8_t *)src - 16 + n);\n+\t\treturn ret;\n+\t}\n+\n+\tif (n <= 64) {\n+\t\trte_mov32((uint8_t *)dst, (const uint8_t *)src);\n+\t\trte_mov32((uint8_t *)dst - 32 + n,\n+\t\t\t(const uint8_t *)src - 32 + n);\n+\t\treturn ret;\n+\t}\n+\n+\tif (n <= 128) {\n+\t\trte_mov64((uint8_t *)dst, (const uint8_t *)src);\n+\t\trte_mov64((uint8_t *)dst - 64 + n,\n+\t\t\t(const uint8_t *)src - 64 + n);\n+\t\treturn ret;\n+\t}\n+\n+\t/*\n+\t * For large copies > 128 bytes. This combination of 256, 64 and 16 byte\n+\t * copies was found to be faster than doing 128 and 32 byte copies as\n+\t * well.\n+\t */\n+\tfor ( ; n >= 256; n -= 256) {\n+\t\trte_mov256((uint8_t *)dst, (const uint8_t *)src);\n+\t\tdst = (uint8_t *)dst + 256;\n+\t\tsrc = (const uint8_t *)src + 256;\n+\t}\n+\n+\t/*\n+\t * We split the remaining bytes (which will be less than 256) into\n+\t * 64byte (2^6) chunks.\n+\t * Using incrementing integers in the case labels of a switch statement\n+\t * enourages the compiler to use a jump table. To get incrementing\n+\t * integers, we shift the 2 relevant bits to the LSB position to first\n+\t * get decrementing integers, and then subtract.\n+\t */\n+\tswitch (3 - (n >> 6)) {\n+\tcase 0x00:\n+\t\trte_mov64((uint8_t *)dst, (const uint8_t *)src);\n+\t\tn -= 64;\n+\t\tdst = (uint8_t *)dst + 64;\n+\t\tsrc = (const uint8_t *)src + 64;      /* fallthrough */\n+\tcase 0x01:\n+\t\trte_mov64((uint8_t *)dst, (const uint8_t *)src);\n+\t\tn -= 64;\n+\t\tdst = (uint8_t *)dst + 64;\n+\t\tsrc = (const uint8_t *)src + 64;      /* fallthrough */\n+\tcase 0x02:\n+\t\trte_mov64((uint8_t *)dst, (const uint8_t *)src);\n+\t\tn -= 64;\n+\t\tdst = (uint8_t *)dst + 64;\n+\t\tsrc = (const uint8_t *)src + 64;      /* fallthrough */\n+\tdefault:\n+\t\t;\n+\t}\n+\n+\t/*\n+\t * We split the remaining bytes (which will be less than 64) into\n+\t * 16byte (2^4) chunks, using the same switch structure as above.\n+\t */\n+\tswitch (3 - (n >> 4)) {\n+\tcase 0x00:\n+\t\trte_mov16((uint8_t *)dst, (const uint8_t *)src);\n+\t\tn -= 16;\n+\t\tdst = (uint8_t *)dst + 16;\n+\t\tsrc = (const uint8_t *)src + 16;      /* fallthrough */\n+\tcase 0x01:\n+\t\trte_mov16((uint8_t *)dst, (const uint8_t *)src);\n+\t\tn -= 16;\n+\t\tdst = (uint8_t *)dst + 16;\n+\t\tsrc = (const uint8_t *)src + 16;      /* fallthrough */\n+\tcase 0x02:\n+\t\trte_mov16((uint8_t *)dst, (const uint8_t *)src);\n+\t\tn -= 16;\n+\t\tdst = (uint8_t *)dst + 16;\n+\t\tsrc = (const uint8_t *)src + 16;      /* fallthrough */\n+\tdefault:\n+\t\t;\n+\t}\n+\n+\t/* Copy any remaining bytes, without going beyond end of buffers */\n+\tif (n != 0)\n+\t\trte_mov16((uint8_t *)dst - 16 + n,\n+\t\t\t(const uint8_t *)src - 16 + n);\n+\treturn ret;\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_MEMCPY_ARM_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "08/16"
    ]
}