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GET /api/patches/79674/?format=api
{ "id": 79674, "url": "https://patches.dpdk.org/api/patches/79674/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-57-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201005120910.189343-57-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201005120910.189343-57-jiawenwu@trustnetic.com", "date": "2020-10-05T12:09:10", "name": "[v2,56/56] net/txgbe: add Rx and Tx descriptor status", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "f621e64ba1426de57e6e345f4a432f540b1c2133", "submitter": { "id": 1932, "url": "https://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-57-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 12690, "url": "https://patches.dpdk.org/api/series/12690/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12690", "date": "2020-10-05T12:08:14", "name": "net: txgbe PMD", "version": 2, "mbox": "https://patches.dpdk.org/series/12690/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/79674/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/79674/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 585E3A04B1;\n\tMon, 5 Oct 2020 14:31:50 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7631B1C1D2;\n\tMon, 5 Oct 2020 14:10:19 +0200 (CEST)", "from qq.com (smtpbg467.qq.com [59.36.132.50])\n by dpdk.org (Postfix) with ESMTP id 0D06C1BFBB\n for <dev@dpdk.org>; Mon, 5 Oct 2020 14:09:49 +0200 (CEST)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 05 Oct 2020 20:09:45 +0800 (CST)" ], "X-QQ-mid": "bizesmtp9t1601899785t1h1zxpeo", "X-QQ-SSF": "01400000002000C0C000B00A0000000", "X-QQ-FEAT": "Gxd91G060N2QTicvELU2hzw7XVCia3UjuFmU9abfNfj413YFplpLLT8DqRwl7\n LU3morS0KjUDzLfnrgBeXewc9P3Iu7yPIEzugl9BKVkF5Rf/3Tif61PvYMAbMn79nUc9rvb\n VEnMbi0CEi6o30lmyazJqBEK4wlvYHeCqG2hb0S+Fza5TZNX6Qt0sxQW8286E9wlgkt93oA\n 23zGsVyosT+FxC7bk+Hl9Cs5vrXw8vNVEUlCvBKDLveainA8Fa5ZoLMR0iWUmXMoumn1d9E\n NI3zusYsZkzNu8GL+wH4cA82DQM4RV5F+ohr4KnAtqjhLUI7Yh+/YgkunAXLhoNpsWBg74k\n KSMHBiHqvcKbCdlfK4=", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "jiawenwu <jiawenwu@trustnetic.com>", "Date": "Mon, 5 Oct 2020 20:09:10 +0800", "Message-Id": "<20201005120910.189343-57-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201005120910.189343-1-jiawenwu@trustnetic.com>", "References": "<20201005120910.189343-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgweb:qybgweb14", "Subject": "[dpdk-dev] [PATCH v2 56/56] net/txgbe: add Rx and Tx descriptor\n\tstatus", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: jiawenwu <jiawenwu@trustnetic.com>\n\nSupports check the status of Rx and Tx descriptors.\n\nSigned-off-by: jiawenwu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe.ini | 2 +\n drivers/net/txgbe/txgbe_ethdev.c | 5 +\n drivers/net/txgbe/txgbe_ethdev.h | 8 ++\n drivers/net/txgbe/txgbe_rxtx.c | 182 +++++++++++++++++++++++++++++\n drivers/net/txgbe/txgbe_rxtx.h | 1 +\n 5 files changed, 198 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/txgbe.ini b/doc/guides/nics/features/txgbe.ini\nindex 1684bcc7e..7c457fede 100644\n--- a/doc/guides/nics/features/txgbe.ini\n+++ b/doc/guides/nics/features/txgbe.ini\n@@ -37,6 +37,8 @@ Inner L3 checksum = P\n Inner L4 checksum = P\n Packet type parsing = Y\n Timesync = Y\n+Rx descriptor status = Y\n+Tx descriptor status = Y\n Basic stats = Y\n Extended stats = Y\n Stats per queue = Y\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 15d2bc07c..d127a03bf 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -4211,6 +4211,10 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.rx_queue_intr_enable = txgbe_dev_rx_queue_intr_enable,\n \t.rx_queue_intr_disable = txgbe_dev_rx_queue_intr_disable,\n \t.rx_queue_release = txgbe_dev_rx_queue_release,\n+\t.rx_queue_count = txgbe_dev_rx_queue_count,\n+\t.rx_descriptor_done = txgbe_dev_rx_descriptor_done,\n+\t.rx_descriptor_status = txgbe_dev_rx_descriptor_status,\n+\t.tx_descriptor_status = txgbe_dev_tx_descriptor_status,\n \t.tx_queue_setup = txgbe_dev_tx_queue_setup,\n \t.tx_queue_release = txgbe_dev_tx_queue_release,\n \t.dev_led_on = txgbe_dev_led_on,\n@@ -4247,6 +4251,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.timesync_adjust_time = txgbe_timesync_adjust_time,\n \t.timesync_read_time = txgbe_timesync_read_time,\n \t.timesync_write_time = txgbe_timesync_write_time,\n+\t.tx_done_cleanup = txgbe_dev_tx_done_cleanup,\n };\n \n RTE_PMD_REGISTER_PCI(net_txgbe, rte_txgbe_pmd);\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex 66ba8db39..2f4e9a81d 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -218,6 +218,14 @@ int txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,\n \t\tuint16_t nb_tx_desc, unsigned int socket_id,\n \t\tconst struct rte_eth_txconf *tx_conf);\n \n+uint32_t txgbe_dev_rx_queue_count(struct rte_eth_dev *dev,\n+\t\tuint16_t rx_queue_id);\n+\n+int txgbe_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);\n+\n+int txgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);\n+int txgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);\n+\n int txgbe_dev_rx_init(struct rte_eth_dev *dev);\n \n void txgbe_dev_tx_init(struct rte_eth_dev *dev);\ndiff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c\nindex 12fc49165..2dbd43b46 100644\n--- a/drivers/net/txgbe/txgbe_rxtx.c\n+++ b/drivers/net/txgbe/txgbe_rxtx.c\n@@ -1962,6 +1962,97 @@ txgbe_tx_queue_release_mbufs(struct txgbe_tx_queue *txq)\n \t}\n }\n \n+static int\n+txgbe_tx_done_cleanup_full(struct txgbe_tx_queue *txq, uint32_t free_cnt)\n+{\n+\tstruct txgbe_tx_entry *swr_ring = txq->sw_ring;\n+\tuint16_t i, tx_last, tx_id;\n+\tuint16_t nb_tx_free_last;\n+\tuint16_t nb_tx_to_clean;\n+\tuint32_t pkt_cnt;\n+\n+\t/* Start free mbuf from the next of tx_tail */\n+\ttx_last = txq->tx_tail;\n+\ttx_id = swr_ring[tx_last].next_id;\n+\n+\tif (txq->nb_tx_free == 0 && txgbe_xmit_cleanup(txq))\n+\t\treturn 0;\n+\n+\tnb_tx_to_clean = txq->nb_tx_free;\n+\tnb_tx_free_last = txq->nb_tx_free;\n+\tif (!free_cnt)\n+\t\tfree_cnt = txq->nb_tx_desc;\n+\n+\t/* Loop through swr_ring to count the amount of\n+\t * freeable mubfs and packets.\n+\t */\n+\tfor (pkt_cnt = 0; pkt_cnt < free_cnt; ) {\n+\t\tfor (i = 0; i < nb_tx_to_clean &&\n+\t\t\tpkt_cnt < free_cnt &&\n+\t\t\ttx_id != tx_last; i++) {\n+\t\t\tif (swr_ring[tx_id].mbuf != NULL) {\n+\t\t\t\trte_pktmbuf_free_seg(swr_ring[tx_id].mbuf);\n+\t\t\t\tswr_ring[tx_id].mbuf = NULL;\n+\n+\t\t\t\t/*\n+\t\t\t\t * last segment in the packet,\n+\t\t\t\t * increment packet count\n+\t\t\t\t */\n+\t\t\t\tpkt_cnt += (swr_ring[tx_id].last_id == tx_id);\n+\t\t\t}\n+\n+\t\t\ttx_id = swr_ring[tx_id].next_id;\n+\t\t}\n+\n+\t\tif (pkt_cnt < free_cnt) {\n+\t\t\tif (txgbe_xmit_cleanup(txq))\n+\t\t\t\tbreak;\n+\n+\t\t\tnb_tx_to_clean = txq->nb_tx_free - nb_tx_free_last;\n+\t\t\tnb_tx_free_last = txq->nb_tx_free;\n+\t\t}\n+\t}\n+\n+\treturn (int)pkt_cnt;\n+}\n+\n+static int\n+txgbe_tx_done_cleanup_simple(struct txgbe_tx_queue *txq,\n+\t\t\tuint32_t free_cnt)\n+{\n+\tint i, n, cnt;\n+\n+\tif (free_cnt == 0 || free_cnt > txq->nb_tx_desc)\n+\t\tfree_cnt = txq->nb_tx_desc;\n+\n+\tcnt = free_cnt - free_cnt % txq->tx_free_thresh;\n+\n+\tfor (i = 0; i < cnt; i += n) {\n+\t\tif (txq->nb_tx_desc - txq->nb_tx_free < txq->tx_free_thresh)\n+\t\t\tbreak;\n+\n+\t\tn = txgbe_tx_free_bufs(txq);\n+\n+\t\tif (n == 0)\n+\t\t\tbreak;\n+\t}\n+\n+\treturn i;\n+}\n+\n+int\n+txgbe_dev_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)\n+{\n+\tstruct txgbe_tx_queue *txq = (struct txgbe_tx_queue *)tx_queue;\n+\tif (txq->offloads == 0 &&\n+\t\ttxq->tx_free_thresh >= RTE_PMD_TXGBE_TX_MAX_BURST) {\n+\n+\t\treturn txgbe_tx_done_cleanup_simple(txq, free_cnt);\n+\t}\n+\n+\treturn txgbe_tx_done_cleanup_full(txq, free_cnt);\n+}\n+\n static void __rte_cold\n txgbe_tx_free_swring(struct txgbe_tx_queue *txq)\n {\n@@ -2546,6 +2637,97 @@ txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+uint32_t\n+txgbe_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n+{\n+#define TXGBE_RXQ_SCAN_INTERVAL 4\n+\tvolatile struct txgbe_rx_desc *rxdp;\n+\tstruct txgbe_rx_queue *rxq;\n+\tuint32_t desc = 0;\n+\n+\trxq = dev->data->rx_queues[rx_queue_id];\n+\trxdp = &(rxq->rx_ring[rxq->rx_tail]);\n+\n+\twhile ((desc < rxq->nb_rx_desc) &&\n+\t\t(rxdp->qw1.lo.status &\n+\t\t\trte_cpu_to_le_32(TXGBE_RXD_STAT_DD))) {\n+\t\tdesc += TXGBE_RXQ_SCAN_INTERVAL;\n+\t\trxdp += TXGBE_RXQ_SCAN_INTERVAL;\n+\t\tif (rxq->rx_tail + desc >= rxq->nb_rx_desc)\n+\t\t\trxdp = &(rxq->rx_ring[rxq->rx_tail +\n+\t\t\t\tdesc - rxq->nb_rx_desc]);\n+\t}\n+\n+\treturn desc;\n+}\n+\n+int\n+txgbe_dev_rx_descriptor_done(void *rx_queue, uint16_t offset)\n+{\n+\tvolatile struct txgbe_rx_desc *rxdp;\n+\tstruct txgbe_rx_queue *rxq = rx_queue;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= rxq->nb_rx_desc))\n+\t\treturn 0;\n+\tdesc = rxq->rx_tail + offset;\n+\tif (desc >= rxq->nb_rx_desc)\n+\t\tdesc -= rxq->nb_rx_desc;\n+\n+\trxdp = &rxq->rx_ring[desc];\n+\treturn !!(rxdp->qw1.lo.status &\n+\t\t\trte_cpu_to_le_32(TXGBE_RXD_STAT_DD));\n+}\n+\n+int\n+txgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset)\n+{\n+\tstruct txgbe_rx_queue *rxq = rx_queue;\n+\tvolatile uint32_t *status;\n+\tuint32_t nb_hold, desc;\n+\n+\tif (unlikely(offset >= rxq->nb_rx_desc))\n+\t\treturn -EINVAL;\n+\n+\tnb_hold = rxq->nb_rx_hold;\n+\tif (offset >= rxq->nb_rx_desc - nb_hold)\n+\t\treturn RTE_ETH_RX_DESC_UNAVAIL;\n+\n+\tdesc = rxq->rx_tail + offset;\n+\tif (desc >= rxq->nb_rx_desc)\n+\t\tdesc -= rxq->nb_rx_desc;\n+\n+\tstatus = &rxq->rx_ring[desc].qw1.lo.status;\n+\tif (*status & rte_cpu_to_le_32(TXGBE_RXD_STAT_DD))\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\n+\treturn RTE_ETH_RX_DESC_AVAIL;\n+}\n+\n+int\n+txgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)\n+{\n+\tstruct txgbe_tx_queue *txq = tx_queue;\n+\tvolatile uint32_t *status;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= txq->nb_tx_desc))\n+\t\treturn -EINVAL;\n+\n+\tdesc = txq->tx_tail + offset;\n+\tif (desc >= txq->nb_tx_desc) {\n+\t\tdesc -= txq->nb_tx_desc;\n+\t\tif (desc >= txq->nb_tx_desc)\n+\t\t\tdesc -= txq->nb_tx_desc;\n+\t}\n+\n+\tstatus = &txq->tx_ring[desc].dw3;\n+\tif (*status & rte_cpu_to_le_32(TXGBE_TXD_DD))\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n+\n+\treturn RTE_ETH_TX_DESC_FULL;\n+}\n+\n void __rte_cold\n txgbe_dev_clear_queues(struct rte_eth_dev *dev)\n {\ndiff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h\nindex 958ca2e97..f773357a3 100644\n--- a/drivers/net/txgbe/txgbe_rxtx.h\n+++ b/drivers/net/txgbe/txgbe_rxtx.h\n@@ -402,6 +402,7 @@ struct txgbe_txq_ops {\n void txgbe_set_tx_function(struct rte_eth_dev *dev, struct txgbe_tx_queue *txq);\n \n void txgbe_set_rx_function(struct rte_eth_dev *dev);\n+int txgbe_dev_tx_done_cleanup(void *tx_queue, uint32_t free_cnt);\n \n uint64_t txgbe_get_tx_port_offloads(struct rte_eth_dev *dev);\n uint64_t txgbe_get_rx_queue_offloads(struct rte_eth_dev *dev);\n", "prefixes": [ "v2", "56/56" ] }