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GET /api/patches/79651/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 79651,
    "url": "https://patches.dpdk.org/api/patches/79651/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-33-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201005120910.189343-33-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201005120910.189343-33-jiawenwu@trustnetic.com",
    "date": "2020-10-05T12:08:46",
    "name": "[v2,32/56] net/txgbe: add RX and TX queue info get",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "a1c5ea869540af36c789a56567d1e396c334eefc",
    "submitter": {
        "id": 1932,
        "url": "https://patches.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-33-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 12690,
            "url": "https://patches.dpdk.org/api/series/12690/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12690",
            "date": "2020-10-05T12:08:14",
            "name": "net: txgbe PMD",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/12690/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/79651/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/79651/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BCF81A04B1;\n\tMon,  5 Oct 2020 14:22:56 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6102E1BF1F;\n\tMon,  5 Oct 2020 14:09:44 +0200 (CEST)",
            "from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166])\n by dpdk.org (Postfix) with ESMTP id E82621BD08\n for <dev@dpdk.org>; Mon,  5 Oct 2020 14:09:23 +0200 (CEST)",
            "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 05 Oct 2020 20:09:18 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp9t1601899758ta3xcse1k",
        "X-QQ-SSF": "01400000002000C0C000B00A0000000",
        "X-QQ-FEAT": "ZmZU6NjzbDK9l6rC3fYSGmMZ25xqTTV5Fv4vKSkLWiN5+Ou7vu/lnWl8EHTt6\n qTFHwF1hYwWcyQ5lXfSjLTodEMGAbE6Efrnm9pQleZw6OhabYDJkMhQSOa/owd9vvIzDoKI\n bV4mj5p7rjGWrcI0BblY69WUBA0pSzMvT5UGrHY1VtLfNJHrPJpdsvEFwupSQOEtqil6BqU\n Q+dcI66ob1vJl/+HI1I7LxWo2HQOJIHvHluGlumHrNk/RO2bhuPrPooJs/WUX9uWDf6kT0+\n IV1Du1H2kL9kZvNgzTXcpiOPUvKPFD5ocO5RIuO6NE9R3ue+F/WoiNI+twhQvaja/ZJpliB\n 34HcrsY39jrL9qbO3RQCOcgZK7/6w==",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "jiawenwu <jiawenwu@trustnetic.com>",
        "Date": "Mon,  5 Oct 2020 20:08:46 +0800",
        "Message-Id": "<20201005120910.189343-33-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.18.4",
        "In-Reply-To": "<20201005120910.189343-1-jiawenwu@trustnetic.com>",
        "References": "<20201005120910.189343-1-jiawenwu@trustnetic.com>",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH v2 32/56] net/txgbe: add RX and TX queue info get",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: jiawenwu <jiawenwu@trustnetic.com>\n\nAdd Rx and Tx queue information get operation.\n\nSigned-off-by: jiawenwu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/txgbe_ethdev.c |  2 +\n drivers/net/txgbe/txgbe_ethdev.h |  6 +++\n drivers/net/txgbe/txgbe_rxtx.c   | 78 ++++++++++++++++++++++++++++++++\n 3 files changed, 86 insertions(+)",
    "diff": "diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 9afdf5997..7b2eff2ad 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -1740,6 +1740,8 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.uc_hash_table_set          = txgbe_uc_hash_table_set,\n \t.uc_all_hash_table_set      = txgbe_uc_all_hash_table_set,\n \t.set_mc_addr_list           = txgbe_dev_set_mc_addr_list,\n+\t.rxq_info_get               = txgbe_rxq_info_get,\n+\t.txq_info_get               = txgbe_txq_info_get,\n };\n \n RTE_PMD_REGISTER_PCI(net_txgbe, rte_txgbe_pmd);\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex f47c64ca6..ab1ffe9fc 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -117,6 +117,12 @@ int txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n \n int txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n \n+void txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tstruct rte_eth_rxq_info *qinfo);\n+\n+void txgbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tstruct rte_eth_txq_info *qinfo);\n+\n uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\tuint16_t nb_pkts);\n \ndiff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c\nindex 40aaeb26a..24677651a 100644\n--- a/drivers/net/txgbe/txgbe_rxtx.c\n+++ b/drivers/net/txgbe/txgbe_rxtx.c\n@@ -13,6 +13,7 @@\n #include <unistd.h>\n #include <inttypes.h>\n \n+#include <rte_byteorder.h>\n #include <rte_common.h>\n #include <rte_cycles.h>\n #include <rte_log.h>\n@@ -1958,9 +1959,49 @@ txgbe_dev_tx_queue_release(void *txq)\n \ttxgbe_tx_queue_release(txq);\n }\n \n+/* (Re)set dynamic txgbe_tx_queue fields to defaults */\n+static void __rte_cold\n+txgbe_reset_tx_queue(struct txgbe_tx_queue *txq)\n+{\n+\tstatic const struct txgbe_tx_desc zeroed_desc = {0};\n+\tstruct txgbe_tx_entry *txe = txq->sw_ring;\n+\tuint16_t prev, i;\n+\n+\t/* Zero out HW ring memory */\n+\tfor (i = 0; i < txq->nb_tx_desc; i++) {\n+\t\ttxq->tx_ring[i] = zeroed_desc;\n+\t}\n+\n+\t/* Initialize SW ring entries */\n+\tprev = (uint16_t) (txq->nb_tx_desc - 1);\n+\tfor (i = 0; i < txq->nb_tx_desc; i++) {\n+\t\tvolatile struct txgbe_tx_desc *txd = &txq->tx_ring[i];\n+\n+\t\ttxd->dw3 = rte_cpu_to_le_32(TXGBE_TXD_DD);\n+\t\ttxe[i].mbuf = NULL;\n+\t\ttxe[i].last_id = i;\n+\t\ttxe[prev].next_id = i;\n+\t\tprev = i;\n+\t}\n+\n+\ttxq->tx_next_dd = (uint16_t)(txq->tx_free_thresh - 1);\n+\ttxq->tx_tail = 0;\n+\n+\t/*\n+\t * Always allow 1 descriptor to be un-allocated to avoid\n+\t * a H/W race condition\n+\t */\n+\ttxq->last_desc_cleaned = (uint16_t)(txq->nb_tx_desc - 1);\n+\ttxq->nb_tx_free = (uint16_t)(txq->nb_tx_desc - 1);\n+\ttxq->ctx_curr = 0;\n+\tmemset((void *)&txq->ctx_cache, 0,\n+\t\tTXGBE_CTX_NUM * sizeof(struct txgbe_ctx_info));\n+}\n+\n static const struct txgbe_txq_ops def_txq_ops = {\n \t.release_mbufs = txgbe_tx_queue_release_mbufs,\n \t.free_swring = txgbe_tx_free_swring,\n+\t.reset = txgbe_reset_tx_queue,\n };\n \n /* Takes an ethdev and a queue and sets up the tx function to be used based on\n@@ -3228,3 +3269,40 @@ txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \treturn 0;\n }\n \n+void\n+txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tstruct rte_eth_rxq_info *qinfo)\n+{\n+\tstruct txgbe_rx_queue *rxq;\n+\n+\trxq = dev->data->rx_queues[queue_id];\n+\n+\tqinfo->mp = rxq->mb_pool;\n+\tqinfo->scattered_rx = dev->data->scattered_rx;\n+\tqinfo->nb_desc = rxq->nb_rx_desc;\n+\n+\tqinfo->conf.rx_free_thresh = rxq->rx_free_thresh;\n+\tqinfo->conf.rx_drop_en = rxq->drop_en;\n+\tqinfo->conf.rx_deferred_start = rxq->rx_deferred_start;\n+\tqinfo->conf.offloads = rxq->offloads;\n+}\n+\n+void\n+txgbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tstruct rte_eth_txq_info *qinfo)\n+{\n+\tstruct txgbe_tx_queue *txq;\n+\n+\ttxq = dev->data->tx_queues[queue_id];\n+\n+\tqinfo->nb_desc = txq->nb_tx_desc;\n+\n+\tqinfo->conf.tx_thresh.pthresh = txq->pthresh;\n+\tqinfo->conf.tx_thresh.hthresh = txq->hthresh;\n+\tqinfo->conf.tx_thresh.wthresh = txq->wthresh;\n+\n+\tqinfo->conf.tx_free_thresh = txq->tx_free_thresh;\n+\tqinfo->conf.offloads = txq->offloads;\n+\tqinfo->conf.tx_deferred_start = txq->tx_deferred_start;\n+}\n+\n",
    "prefixes": [
        "v2",
        "32/56"
    ]
}