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GET /api/patches/79648/?format=api
{ "id": 79648, "url": "https://patches.dpdk.org/api/patches/79648/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-32-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201005120910.189343-32-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201005120910.189343-32-jiawenwu@trustnetic.com", "date": "2020-10-05T12:08:45", "name": "[v2,31/56] net/txgbe: support RX interrupt", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "46eba5ce1619c1ae773eb8439780d56a7376ee89", "submitter": { "id": 1932, "url": "https://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-32-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 12690, "url": "https://patches.dpdk.org/api/series/12690/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12690", "date": "2020-10-05T12:08:14", "name": "net: txgbe PMD", "version": 2, "mbox": "https://patches.dpdk.org/series/12690/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/79648/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/79648/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 85808A04B1;\n\tMon, 5 Oct 2020 14:21:54 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F21081BEE7;\n\tMon, 5 Oct 2020 14:09:39 +0200 (CEST)", "from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142])\n by dpdk.org (Postfix) with ESMTP id C610E1BCDE\n for <dev@dpdk.org>; Mon, 5 Oct 2020 14:09:21 +0200 (CEST)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 05 Oct 2020 20:09:17 +0800 (CST)" ], "X-QQ-mid": "bizesmtp9t1601899757t806k0xrz", "X-QQ-SSF": "01400000002000C0C000B00A0000000", "X-QQ-FEAT": "l6IKqkG+NbkJu8oMYLvZ8DnjmG72aEIQ5qZ9pTrKFdbqDDfPT+PlZ0MU4ono8\n p8eQOU4tPExklb0FrFR2tH0nKt1dpdJ8hIR52OSTH+sEdyyykeAKVDIsxCY+CuH2+Pfnuq8\n /qEEl+3hseS8z1ANGABYnzhwJqbPus3Gnf+AiFxY0bA/DGjkLmlYrM7vMJE29t1C1RSc+Mt\n ioolZptRptiuhQG5XoyGB8qIiuFUyfj0xgEMkghdDed4bDQXJv1CoB3hipn3X69uQsHpOT4\n kEfgtL0iroDpkSM4AUnrughJfqC7g+v7SMcl25SRWgdoIges1OoUUGbWWgai1pjPRhfIjeR\n g9ORBMxTke4TwLtz1neYegFQSDJAQ==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "jiawenwu <jiawenwu@trustnetic.com>", "Date": "Mon, 5 Oct 2020 20:08:45 +0800", "Message-Id": "<20201005120910.189343-32-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201005120910.189343-1-jiawenwu@trustnetic.com>", "References": "<20201005120910.189343-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v2 31/56] net/txgbe: support RX interrupt", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: jiawenwu <jiawenwu@trustnetic.com>\n\nSupport rx queue interrupt.\n\nSigned-off-by: jiawenwu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe.ini | 1 +\n doc/guides/nics/txgbe.rst | 1 +\n drivers/net/txgbe/txgbe_ethdev.c | 43 ++++++++++++++++++++++++++++++\n 3 files changed, 45 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/txgbe.ini b/doc/guides/nics/features/txgbe.ini\nindex c8cd58ce2..b2f5f832c 100644\n--- a/doc/guides/nics/features/txgbe.ini\n+++ b/doc/guides/nics/features/txgbe.ini\n@@ -7,6 +7,7 @@\n Speed capabilities = Y\n Link status = Y\n Link status event = Y\n+Rx interrupt = Y\n Queue start/stop = Y\n Jumbo frame = Y\n Scattered Rx = Y\ndiff --git a/doc/guides/nics/txgbe.rst b/doc/guides/nics/txgbe.rst\nindex 101765a6c..1bf4b6b6f 100644\n--- a/doc/guides/nics/txgbe.rst\n+++ b/doc/guides/nics/txgbe.rst\n@@ -17,6 +17,7 @@ Features\n - TSO offload\n - Jumbo frames\n - Link state information\n+- Interrupt mode for RX\n - Scattered and gather for TX and RX\n - LRO\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 11948389a..9afdf5997 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -1557,6 +1557,47 @@ txgbe_uc_all_hash_table_set(struct rte_eth_dev *dev, uint8_t on)\n \treturn 0;\n }\n \n+static int\n+txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n+{\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tuint32_t mask;\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\n+\tif (queue_id < 32) {\n+\t\tmask = rd32(hw, TXGBE_IMS(0));\n+\t\tmask &= (1 << queue_id);\n+\t\twr32(hw, TXGBE_IMS(0), mask);\n+\t} else if (queue_id < 64) {\n+\t\tmask = rd32(hw, TXGBE_IMS(1));\n+\t\tmask &= (1 << (queue_id - 32));\n+\t\twr32(hw, TXGBE_IMS(1), mask);\n+\t}\n+\trte_intr_enable(intr_handle);\n+\n+\treturn 0;\n+}\n+\n+static int\n+txgbe_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n+{\n+\tuint32_t mask;\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\n+\tif (queue_id < 32) {\n+\t\tmask = rd32(hw, TXGBE_IMS(0));\n+\t\tmask &= ~(1 << queue_id);\n+\t\twr32(hw, TXGBE_IMS(0), mask);\n+\t} else if (queue_id < 64) {\n+\t\tmask = rd32(hw, TXGBE_IMS(1));\n+\t\tmask &= ~(1 << (queue_id - 32));\n+\t\twr32(hw, TXGBE_IMS(1), mask);\n+\t}\n+\n+\treturn 0;\n+}\n+\n /**\n * set the IVAR registers, mapping interrupt causes to vectors\n * @param hw\n@@ -1688,6 +1729,8 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.tx_queue_start\t = txgbe_dev_tx_queue_start,\n \t.tx_queue_stop = txgbe_dev_tx_queue_stop,\n \t.rx_queue_setup = txgbe_dev_rx_queue_setup,\n+\t.rx_queue_intr_enable = txgbe_dev_rx_queue_intr_enable,\n+\t.rx_queue_intr_disable = txgbe_dev_rx_queue_intr_disable,\n \t.rx_queue_release = txgbe_dev_rx_queue_release,\n \t.tx_queue_setup = txgbe_dev_tx_queue_setup,\n \t.tx_queue_release = txgbe_dev_tx_queue_release,\n", "prefixes": [ "v2", "31/56" ] }