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GET /api/patches/79647/?format=api
{ "id": 79647, "url": "https://patches.dpdk.org/api/patches/79647/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-30-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201005120910.189343-30-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201005120910.189343-30-jiawenwu@trustnetic.com", "date": "2020-10-05T12:08:43", "name": "[v2,29/56] net/txgbe: add RX and TX data path start and stop", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "63f5d951e8aa5a67be12274dae2c0178606be615", "submitter": { "id": 1932, "url": "https://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-30-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 12690, "url": "https://patches.dpdk.org/api/series/12690/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12690", "date": "2020-10-05T12:08:14", "name": "net: txgbe PMD", "version": 2, "mbox": "https://patches.dpdk.org/series/12690/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/79647/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/79647/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B4E6DA04B1;\n\tMon, 5 Oct 2020 14:21:31 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B50111BCA7;\n\tMon, 5 Oct 2020 14:09:38 +0200 (CEST)", "from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142])\n by dpdk.org (Postfix) with ESMTP id F09BE1BCBF\n for <dev@dpdk.org>; Mon, 5 Oct 2020 14:09:19 +0200 (CEST)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 05 Oct 2020 20:09:15 +0800 (CST)" ], "X-QQ-mid": "bizesmtp9t1601899755tl3hy56mv", "X-QQ-SSF": "01400000002000C0C000B00A0000000", "X-QQ-FEAT": "bj+H3nJpNbUG8VL5Qxkfxr8POOKHELQ32RtCM/TIDP0trUQ5hIFMzUVvEhU3t\n dxcniEa9hU19iVBCv+3CD1SpD6Hpe4K8PyEnXJFflyC1IKnr7900Typ6pcGd4l5oFLo55R7\n by8/uW2ZgeE9tf6Lsgrcglow/j971qhTWuIBZR8eoAosw2fMyVXHPRNo+RfzCe4Om2eIU2E\n STonywbaXFuInNPpGo06B811wl5GeH2Eu/KSk8Q+j8Pl1manHSTT/nkeNEe+48n6M/3iI+D\n u8k3qfcHl0Q5xQY53xlu6rEXQsMYU5IF5a5QZzNuiHlKwmXSjxOOVoKWCqsCfV1rWIuZI8y\n i6mR+zhRzkmjYHM7Rc=", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "jiawenwu <jiawenwu@trustnetic.com>", "Date": "Mon, 5 Oct 2020 20:08:43 +0800", "Message-Id": "<20201005120910.189343-30-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201005120910.189343-1-jiawenwu@trustnetic.com>", "References": "<20201005120910.189343-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign7", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v2 29/56] net/txgbe: add RX and TX data path\n\tstart and stop", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: jiawenwu <jiawenwu@trustnetic.com>\n\nAdd receive and transmit data path start and stop.\n\nSigned-off-by: jiawenwu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/base/txgbe_hw.c | 143 ++++++++++++++++++++++++++++++\n drivers/net/txgbe/base/txgbe_hw.h | 5 ++\n 2 files changed, 148 insertions(+)", "diff": "diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c\nindex 36fad8f33..36e97eb4f 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.c\n+++ b/drivers/net/txgbe/base/txgbe_hw.c\n@@ -552,6 +552,113 @@ s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 *mc_addr_list,\n \treturn 0;\n }\n \n+/**\n+ * txgbe_disable_sec_rx_path - Stops the receive data path\n+ * @hw: pointer to hardware structure\n+ *\n+ * Stops the receive data path and waits for the HW to internally empty\n+ * the Rx security block\n+ **/\n+s32 txgbe_disable_sec_rx_path(struct txgbe_hw *hw)\n+{\n+#define TXGBE_MAX_SECRX_POLL 4000\n+\n+\tint i;\n+\tu32 secrxreg;\n+\n+\tDEBUGFUNC(\"txgbe_disable_sec_rx_path\");\n+\n+\tsecrxreg = rd32(hw, TXGBE_SECRXCTL);\n+\tsecrxreg |= TXGBE_SECRXCTL_XDSA;\n+\twr32(hw, TXGBE_SECRXCTL, secrxreg);\n+\tfor (i = 0; i < TXGBE_MAX_SECRX_POLL; i++) {\n+\t\tsecrxreg = rd32(hw, TXGBE_SECRXSTAT);\n+\t\tif (secrxreg & TXGBE_SECRXSTAT_RDY)\n+\t\t\tbreak;\n+\t\telse\n+\t\t\t/* Use interrupt-safe sleep just in case */\n+\t\t\tusec_delay(10);\n+\t}\n+\n+\t/* For informational purposes only */\n+\tif (i >= TXGBE_MAX_SECRX_POLL)\n+\t\tDEBUGOUT(\"Rx unit being enabled before security \"\n+\t\t\t \"path fully disabled. Continuing with init.\\n\");\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * txgbe_enable_sec_rx_path - Enables the receive data path\n+ * @hw: pointer to hardware structure\n+ *\n+ * Enables the receive data path.\n+ **/\n+s32 txgbe_enable_sec_rx_path(struct txgbe_hw *hw)\n+{\n+\tu32 secrxreg;\n+\n+\tDEBUGFUNC(\"txgbe_enable_sec_rx_path\");\n+\n+\tsecrxreg = rd32(hw, TXGBE_SECRXCTL);\n+\tsecrxreg &= ~TXGBE_SECRXCTL_XDSA;\n+\twr32(hw, TXGBE_SECRXCTL, secrxreg);\n+\ttxgbe_flush(hw);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * txgbe_disable_sec_tx_path - Stops the transmit data path\n+ * @hw: pointer to hardware structure\n+ *\n+ * Stops the transmit data path and waits for the HW to internally empty\n+ * the Tx security block\n+ **/\n+int txgbe_disable_sec_tx_path(struct txgbe_hw *hw)\n+{\n+#define TXGBE_MAX_SECTX_POLL 40\n+\n+\tint i;\n+\tu32 sectxreg;\n+\n+\tsectxreg = rd32(hw, TXGBE_SECTXCTL);\n+\tsectxreg |= TXGBE_SECTXCTL_XDSA;\n+\twr32(hw, TXGBE_SECTXCTL, sectxreg);\n+\tfor (i = 0; i < TXGBE_MAX_SECTX_POLL; i++) {\n+\t\tsectxreg = rd32(hw, TXGBE_SECTXSTAT);\n+\t\tif (sectxreg & TXGBE_SECTXSTAT_RDY)\n+\t\t\tbreak;\n+\t\t/* Use interrupt-safe sleep just in case */\n+\t\tusec_delay(1000);\n+\t}\n+\n+\t/* For informational purposes only */\n+\tif (i >= TXGBE_MAX_SECTX_POLL)\n+\t\tPMD_DRV_LOG(DEBUG, \"Tx unit being enabled before security \"\n+\t\t\t \"path fully disabled. Continuing with init.\");\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * txgbe_enable_sec_tx_path - Enables the transmit data path\n+ * @hw: pointer to hardware structure\n+ *\n+ * Enables the transmit data path.\n+ **/\n+int txgbe_enable_sec_tx_path(struct txgbe_hw *hw)\n+{\n+\tuint32_t sectxreg;\n+\n+\tsectxreg = rd32(hw, TXGBE_SECTXCTL);\n+\tsectxreg &= ~TXGBE_SECTXCTL_XDSA;\n+\twr32(hw, TXGBE_SECTXCTL, sectxreg);\n+\ttxgbe_flush(hw);\n+\n+\treturn 0;\n+}\n+\n /**\n * txgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM\n * @hw: pointer to hardware structure\n@@ -1287,9 +1394,15 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)\n \t/* MAC */\n \tmac->init_hw = txgbe_init_hw;\n \tmac->start_hw = txgbe_start_hw_raptor;\n+\tmac->enable_rx_dma = txgbe_enable_rx_dma_raptor;\n \tmac->get_mac_addr = txgbe_get_mac_addr;\n \tmac->stop_hw = txgbe_stop_hw;\n \tmac->reset_hw = txgbe_reset_hw;\n+\n+\tmac->disable_sec_rx_path = txgbe_disable_sec_rx_path;\n+\tmac->enable_sec_rx_path = txgbe_enable_sec_rx_path;\n+\tmac->disable_sec_tx_path = txgbe_disable_sec_tx_path;\n+\tmac->enable_sec_tx_path = txgbe_enable_sec_tx_path;\n \tmac->get_san_mac_addr = txgbe_get_san_mac_addr;\n \tmac->set_san_mac_addr = txgbe_set_san_mac_addr;\n \tmac->get_device_caps = txgbe_get_device_caps;\n@@ -2132,6 +2245,36 @@ s32 txgbe_start_hw_raptor(struct txgbe_hw *hw)\n \treturn err;\n }\n \n+/**\n+ * txgbe_enable_rx_dma_raptor - Enable the Rx DMA unit\n+ * @hw: pointer to hardware structure\n+ * @regval: register value to write to RXCTRL\n+ *\n+ * Enables the Rx DMA unit\n+ **/\n+s32 txgbe_enable_rx_dma_raptor(struct txgbe_hw *hw, u32 regval)\n+{\n+\n+\tDEBUGFUNC(\"txgbe_enable_rx_dma_raptor\");\n+\n+\t/*\n+\t * Workaround silicon errata when enabling the Rx datapath.\n+\t * If traffic is incoming before we enable the Rx unit, it could hang\n+\t * the Rx DMA unit. Therefore, make sure the security engine is\n+\t * completely disabled prior to enabling the Rx unit.\n+\t */\n+\n+\thw->mac.disable_sec_rx_path(hw);\n+\n+\tif (regval & TXGBE_PBRXCTL_ENA)\n+\t\ttxgbe_enable_rx(hw);\n+\telse\n+\t\ttxgbe_disable_rx(hw);\n+\n+\thw->mac.enable_sec_rx_path(hw);\n+\n+\treturn 0;\n+}\n \n /**\n * txgbe_verify_lesm_fw_enabled_raptor - Checks LESM FW module state.\ndiff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h\nindex 0653efba2..d6fbb0ca4 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.h\n+++ b/drivers/net/txgbe/base/txgbe_hw.h\n@@ -22,6 +22,10 @@ s32 txgbe_init_rx_addrs(struct txgbe_hw *hw);\n s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 *mc_addr_list,\n \t\t\t\t u32 mc_addr_count,\n \t\t\t\t txgbe_mc_addr_itr func, bool clear);\n+s32 txgbe_disable_sec_rx_path(struct txgbe_hw *hw);\n+s32 txgbe_enable_sec_rx_path(struct txgbe_hw *hw);\n+s32 txgbe_disable_sec_tx_path(struct txgbe_hw *hw);\n+s32 txgbe_enable_sec_tx_path(struct txgbe_hw *hw);\n \n s32 txgbe_validate_mac_addr(u8 *mac_addr);\n \n@@ -67,5 +71,6 @@ void txgbe_init_mac_link_ops(struct txgbe_hw *hw);\n s32 txgbe_reset_hw(struct txgbe_hw *hw);\n s32 txgbe_start_hw_raptor(struct txgbe_hw *hw);\n s32 txgbe_init_phy_raptor(struct txgbe_hw *hw);\n+s32 txgbe_enable_rx_dma_raptor(struct txgbe_hw *hw, u32 regval);\n bool txgbe_verify_lesm_fw_enabled_raptor(struct txgbe_hw *hw);\n #endif /* _TXGBE_HW_H_ */\n", "prefixes": [ "v2", "29/56" ] }