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{
    "id": 79623,
    "url": "https://patches.dpdk.org/api/patches/79623/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-7-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201005120910.189343-7-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201005120910.189343-7-jiawenwu@trustnetic.com",
    "date": "2020-10-05T12:08:20",
    "name": "[v2,06/56] net/txgbe: add HW infrastructure and dummy function",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "c9a0e84d19047860beb8d10dca01c7b87dd74a68",
    "submitter": {
        "id": 1932,
        "url": "https://patches.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201005120910.189343-7-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 12690,
            "url": "https://patches.dpdk.org/api/series/12690/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12690",
            "date": "2020-10-05T12:08:14",
            "name": "net: txgbe PMD",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/12690/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/79623/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/79623/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 05B89A04B1;\n\tMon,  5 Oct 2020 14:11:08 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 899891BA45;\n\tMon,  5 Oct 2020 14:08:56 +0200 (CEST)",
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            "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 05 Oct 2020 20:08:45 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp9t1601899726tp03qxdo6",
        "X-QQ-SSF": "01400000002000C0C000B00A0000000",
        "X-QQ-FEAT": "DgJAXuPMHm6bs4RPY37Jip2J2S38PhpedRJfT1+s2bNVyK47IZ1aNLQxB7NLb\n R+4M5lJq3/2s6oaSAHmSEFkOz2mg7gR5cZlcDXw9qWwt1FueiZwhw67lMsdBqWypRl9aimR\n lKzjSM3EESrJWkzYjTosiBTvrQ1WLWzVEw35Fj+u+rK/anANvvsZZ1k1Nq2ssWHhGiP0zS7\n 5eriiOp3xj1dwcTIDAdYZCUgjN530Qm+34iSl2X4d3YNNTz8XflNixKbcrg+bFZPE9TqJC9\n ic1PSo/N+UHIGfu7XTbkaB170Ue85Hj9pw0uclWMBjMx229UUu5Cf/e2agOKdSJJQOCIeHc\n OoBbd2R",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "jiawenwu <jiawenwu@trustnetic.com>",
        "Date": "Mon,  5 Oct 2020 20:08:20 +0800",
        "Message-Id": "<20201005120910.189343-7-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.18.4",
        "In-Reply-To": "<20201005120910.189343-1-jiawenwu@trustnetic.com>",
        "References": "<20201005120910.189343-1-jiawenwu@trustnetic.com>",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH v2 06/56] net/txgbe: add HW infrastructure and\n\tdummy function",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: jiawenwu <jiawenwu@trustnetic.com>\n\nAdd hardware infrastructure and dummy function.\n\nSigned-off-by: jiawenwu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/base/txgbe_dummy.h | 739 +++++++++++++++++++++++++++\n drivers/net/txgbe/base/txgbe_hw.c    |  13 +\n drivers/net/txgbe/base/txgbe_type.h  | 192 ++++++-\n 3 files changed, 943 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/txgbe/base/txgbe_dummy.h",
    "diff": "diff --git a/drivers/net/txgbe/base/txgbe_dummy.h b/drivers/net/txgbe/base/txgbe_dummy.h\nnew file mode 100644\nindex 000000000..2039fa596\n--- /dev/null\n+++ b/drivers/net/txgbe/base/txgbe_dummy.h\n@@ -0,0 +1,739 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2015-2020\n+ */\n+\n+#ifndef _TXGBE_TYPE_DUMMY_H_\n+#define _TXGBE_TYPE_DUMMY_H_\n+\n+#ifdef TUP\n+#elif defined(__GNUC__)\n+#define TUP(x) x##_unused __attribute__((unused))\n+#elif defined(__LCLINT__)\n+#define TUP(x) x /*@unused@*/\n+#else\n+#define TUP(x) x\n+#endif /*TUP*/\n+#define TUP0 TUP(p0)\n+#define TUP1 TUP(p1)\n+#define TUP2 TUP(p2)\n+#define TUP3 TUP(p3)\n+#define TUP4 TUP(p4)\n+#define TUP5 TUP(p5)\n+#define TUP6 TUP(p6)\n+#define TUP7 TUP(p7)\n+#define TUP8 TUP(p8)\n+#define TUP9 TUP(p9)\n+\n+/* struct txgbe_bus_operations */\n+static inline s32 txgbe_bus_get_bus_info_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_bus_set_lan_id_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+/* struct txgbe_rom_operations */\n+static inline s32 txgbe_rom_init_params_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_read16_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_readw_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_readw_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_read32_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_read_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_write16_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_writew_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_writew_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_write32_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_write_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_validate_checksum_dummy(struct txgbe_hw *TUP0, u16 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_update_checksum_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_rom_calc_checksum_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+\n+/* struct txgbe_mac_operations */\n+static inline s32 txgbe_mac_init_hw_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_reset_hw_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_start_hw_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_stop_hw_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_clear_hw_cntrs_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_enable_relaxed_ordering_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline u64 txgbe_mac_get_supported_physical_layer_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_san_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_san_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_device_caps_dummy(struct txgbe_hw *TUP0, u16 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_wwn_prefix_dummy(struct txgbe_hw *TUP0, u16 *TUP1, u16 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_fcoe_boot_status_dummy(struct txgbe_hw *TUP0, u16 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_read_analog_reg8_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_write_analog_reg8_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_setup_sfp_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_enable_rx_dma_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_disable_sec_rx_path_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_enable_sec_rx_path_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_disable_sec_tx_path_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_enable_sec_tx_path_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_acquire_swfw_sync_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_release_swfw_sync_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_init_swfw_sync_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline u64 txgbe_mac_autoc_read_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn 0;\n+}\n+static inline void txgbe_mac_autoc_write_dummy(struct txgbe_hw *TUP0, u64 TUP1)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mac_prot_autoc_read_dummy(struct txgbe_hw *TUP0, bool *TUP1, u64 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_prot_autoc_write_dummy(struct txgbe_hw *TUP0, bool TUP1, u64 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_negotiate_api_version_dummy(struct txgbe_hw *TUP0, int TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_disable_tx_laser_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_enable_tx_laser_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_flap_tx_laser_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mac_setup_link_dummy(struct txgbe_hw *TUP0, u32 TUP1, bool TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_setup_mac_link_dummy(struct txgbe_hw *TUP0, u32 TUP1, bool TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_check_link_dummy(struct txgbe_hw *TUP0, u32 *TUP1, bool *TUP3, bool TUP4)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_link_capabilities_dummy(struct txgbe_hw *TUP0, u32 *TUP1, bool *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_set_rate_select_speed_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_setup_pba_dummy(struct txgbe_hw *TUP0, int TUP1, u32 TUP2, int TUP3)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mac_led_on_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_led_off_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_blink_led_start_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_blink_led_stop_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_init_led_link_act_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_rar_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 *TUP2, u32 TUP3, u32 TUP4)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_uc_addr_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_clear_rar_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_insert_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1, u32 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_vmdq_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_vmdq_san_mac_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_clear_vmdq_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_init_rx_addrs_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_update_uc_addr_list_dummy(struct txgbe_hw *TUP0, u8 *TUP1, u32 TUP2, txgbe_mc_addr_itr TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_update_mc_addr_list_dummy(struct txgbe_hw *TUP0, u8 *TUP1, u32 TUP2, txgbe_mc_addr_itr TUP3, bool TUP4)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_enable_mc_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_disable_mc_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_clear_vfta_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_vfta_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, bool TUP3, bool TUP4)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_vlvf_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, bool TUP3, u32 *TUP4, u32 TUP5, bool TUP6)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_init_uta_tables_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_set_mac_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1, int TUP2)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_set_vlan_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1, int TUP2)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mac_update_xcast_mode_dummy(struct txgbe_hw *TUP0, int TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_set_rlpml_dummy(struct txgbe_hw *TUP0, u16 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_fc_enable_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_setup_fc_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_fc_autoneg_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mac_set_fw_drv_ver_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 TUP3, u8 TUP4, u16 TUP5, const char *TUP6)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_get_thermal_sensor_data_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_init_thermal_sensor_thresh_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_get_rtrup2tc_dummy(struct txgbe_hw *TUP0, u8 *TUP1)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_disable_rx_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_enable_rx_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_set_source_address_pruning_dummy(struct txgbe_hw *TUP0, bool TUP1, unsigned int TUP2)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_set_ethertype_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1, int TUP2)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mac_dmac_update_tcs_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_dmac_config_tcs_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_dmac_config_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_setup_eee_dummy(struct txgbe_hw *TUP0, bool TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_read_iosf_sb_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u32 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mac_write_iosf_sb_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u32 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_mac_disable_mdd_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_enable_mdd_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_mdd_event_dummy(struct txgbe_hw *TUP0, u32 *TUP1)\n+{\n+\treturn;\n+}\n+static inline void txgbe_mac_restore_mdd_vf_dummy(struct txgbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn;\n+}\n+static inline bool txgbe_mac_fw_recovery_mode_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn false;\n+}\n+\n+/* struct txgbe_phy_operations */\n+static inline u32 txgbe_phy_get_media_type_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_identify_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_identify_sfp_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_init_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_reset_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_read_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_write_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_read_reg_mdi_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_write_reg_mdi_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_setup_link_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_setup_internal_link_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_setup_link_speed_dummy(struct txgbe_hw *TUP0, u32 TUP1, bool TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_check_link_dummy(struct txgbe_hw *TUP0, u32 *TUP1, bool *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_get_firmware_version_dummy(struct txgbe_hw *TUP0, u32 *TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_read_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_write_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_read_i2c_sff8472_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_read_i2c_eeprom_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 *TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_write_i2c_eeprom_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline void txgbe_phy_i2c_bus_clear_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_phy_check_overtemp_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_set_phy_power_dummy(struct txgbe_hw *TUP0, bool TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_enter_lplu_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_handle_lasi_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_read_i2c_byte_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_phy_write_i2c_byte_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+\n+/* struct txgbe_link_operations */\n+static inline s32 txgbe_link_read_link_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_link_read_link_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 *TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_link_write_link_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_link_write_link_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+\n+/* struct txgbe_mbx_operations */\n+static inline void txgbe_mbx_init_params_dummy(struct txgbe_hw *TUP0)\n+{\n+\treturn;\n+}\n+static inline s32 txgbe_mbx_read_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mbx_write_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mbx_read_posted_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP3)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mbx_write_posted_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP4)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mbx_check_for_msg_dummy(struct txgbe_hw *TUP0, u16 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mbx_check_for_ack_dummy(struct txgbe_hw *TUP0, u16 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 txgbe_mbx_check_for_rst_dummy(struct txgbe_hw *TUP0, u16 TUP1)\n+{\n+\treturn TXGBE_ERR_OPS_DUMMY;\n+}\n+\n+\n+static inline void txgbe_init_ops_dummy(struct txgbe_hw *hw)\n+{\n+\thw->bus.get_bus_info = txgbe_bus_get_bus_info_dummy;\n+\thw->bus.set_lan_id = txgbe_bus_set_lan_id_dummy;\n+\thw->rom.init_params = txgbe_rom_init_params_dummy;\n+\thw->rom.read16 = txgbe_rom_read16_dummy;\n+\thw->rom.readw_buffer = txgbe_rom_readw_buffer_dummy;\n+\thw->rom.readw_sw = txgbe_rom_readw_sw_dummy;\n+\thw->rom.read32 = txgbe_rom_read32_dummy;\n+\thw->rom.read_buffer = txgbe_rom_read_buffer_dummy;\n+\thw->rom.write16 = txgbe_rom_write16_dummy;\n+\thw->rom.writew_buffer = txgbe_rom_writew_buffer_dummy;\n+\thw->rom.writew_sw = txgbe_rom_writew_sw_dummy;\n+\thw->rom.write32 = txgbe_rom_write32_dummy;\n+\thw->rom.write_buffer = txgbe_rom_write_buffer_dummy;\n+\thw->rom.validate_checksum = txgbe_rom_validate_checksum_dummy;\n+\thw->rom.update_checksum = txgbe_rom_update_checksum_dummy;\n+\thw->rom.calc_checksum = txgbe_rom_calc_checksum_dummy;\n+\thw->mac.init_hw = txgbe_mac_init_hw_dummy;\n+\thw->mac.reset_hw = txgbe_mac_reset_hw_dummy;\n+\thw->mac.start_hw = txgbe_mac_start_hw_dummy;\n+\thw->mac.stop_hw = txgbe_mac_stop_hw_dummy;\n+\thw->mac.clear_hw_cntrs = txgbe_mac_clear_hw_cntrs_dummy;\n+\thw->mac.enable_relaxed_ordering = txgbe_mac_enable_relaxed_ordering_dummy;\n+\thw->mac.get_supported_physical_layer = txgbe_mac_get_supported_physical_layer_dummy;\n+\thw->mac.get_mac_addr = txgbe_mac_get_mac_addr_dummy;\n+\thw->mac.get_san_mac_addr = txgbe_mac_get_san_mac_addr_dummy;\n+\thw->mac.set_san_mac_addr = txgbe_mac_set_san_mac_addr_dummy;\n+\thw->mac.get_device_caps = txgbe_mac_get_device_caps_dummy;\n+\thw->mac.get_wwn_prefix = txgbe_mac_get_wwn_prefix_dummy;\n+\thw->mac.get_fcoe_boot_status = txgbe_mac_get_fcoe_boot_status_dummy;\n+\thw->mac.read_analog_reg8 = txgbe_mac_read_analog_reg8_dummy;\n+\thw->mac.write_analog_reg8 = txgbe_mac_write_analog_reg8_dummy;\n+\thw->mac.setup_sfp = txgbe_mac_setup_sfp_dummy;\n+\thw->mac.enable_rx_dma = txgbe_mac_enable_rx_dma_dummy;\n+\thw->mac.disable_sec_rx_path = txgbe_mac_disable_sec_rx_path_dummy;\n+\thw->mac.enable_sec_rx_path = txgbe_mac_enable_sec_rx_path_dummy;\n+\thw->mac.disable_sec_tx_path = txgbe_mac_disable_sec_tx_path_dummy;\n+\thw->mac.enable_sec_tx_path = txgbe_mac_enable_sec_tx_path_dummy;\n+\thw->mac.acquire_swfw_sync = txgbe_mac_acquire_swfw_sync_dummy;\n+\thw->mac.release_swfw_sync = txgbe_mac_release_swfw_sync_dummy;\n+\thw->mac.init_swfw_sync = txgbe_mac_init_swfw_sync_dummy;\n+\thw->mac.autoc_read = txgbe_mac_autoc_read_dummy;\n+\thw->mac.autoc_write = txgbe_mac_autoc_write_dummy;\n+\thw->mac.prot_autoc_read = txgbe_mac_prot_autoc_read_dummy;\n+\thw->mac.prot_autoc_write = txgbe_mac_prot_autoc_write_dummy;\n+\thw->mac.negotiate_api_version = txgbe_mac_negotiate_api_version_dummy;\n+\thw->mac.disable_tx_laser = txgbe_mac_disable_tx_laser_dummy;\n+\thw->mac.enable_tx_laser = txgbe_mac_enable_tx_laser_dummy;\n+\thw->mac.flap_tx_laser = txgbe_mac_flap_tx_laser_dummy;\n+\thw->mac.setup_link = txgbe_mac_setup_link_dummy;\n+\thw->mac.setup_mac_link = txgbe_mac_setup_mac_link_dummy;\n+\thw->mac.check_link = txgbe_mac_check_link_dummy;\n+\thw->mac.get_link_capabilities = txgbe_mac_get_link_capabilities_dummy;\n+\thw->mac.set_rate_select_speed = txgbe_mac_set_rate_select_speed_dummy;\n+\thw->mac.setup_pba = txgbe_mac_setup_pba_dummy;\n+\thw->mac.led_on = txgbe_mac_led_on_dummy;\n+\thw->mac.led_off = txgbe_mac_led_off_dummy;\n+\thw->mac.blink_led_start = txgbe_mac_blink_led_start_dummy;\n+\thw->mac.blink_led_stop = txgbe_mac_blink_led_stop_dummy;\n+\thw->mac.init_led_link_act = txgbe_mac_init_led_link_act_dummy;\n+\thw->mac.set_rar = txgbe_mac_set_rar_dummy;\n+\thw->mac.set_uc_addr = txgbe_mac_set_uc_addr_dummy;\n+\thw->mac.clear_rar = txgbe_mac_clear_rar_dummy;\n+\thw->mac.insert_mac_addr = txgbe_mac_insert_mac_addr_dummy;\n+\thw->mac.set_vmdq = txgbe_mac_set_vmdq_dummy;\n+\thw->mac.set_vmdq_san_mac = txgbe_mac_set_vmdq_san_mac_dummy;\n+\thw->mac.clear_vmdq = txgbe_mac_clear_vmdq_dummy;\n+\thw->mac.init_rx_addrs = txgbe_mac_init_rx_addrs_dummy;\n+\thw->mac.update_uc_addr_list = txgbe_mac_update_uc_addr_list_dummy;\n+\thw->mac.update_mc_addr_list = txgbe_mac_update_mc_addr_list_dummy;\n+\thw->mac.enable_mc = txgbe_mac_enable_mc_dummy;\n+\thw->mac.disable_mc = txgbe_mac_disable_mc_dummy;\n+\thw->mac.clear_vfta = txgbe_mac_clear_vfta_dummy;\n+\thw->mac.set_vfta = txgbe_mac_set_vfta_dummy;\n+\thw->mac.set_vlvf = txgbe_mac_set_vlvf_dummy;\n+\thw->mac.init_uta_tables = txgbe_mac_init_uta_tables_dummy;\n+\thw->mac.set_mac_anti_spoofing = txgbe_mac_set_mac_anti_spoofing_dummy;\n+\thw->mac.set_vlan_anti_spoofing = txgbe_mac_set_vlan_anti_spoofing_dummy;\n+\thw->mac.update_xcast_mode = txgbe_mac_update_xcast_mode_dummy;\n+\thw->mac.set_rlpml = txgbe_mac_set_rlpml_dummy;\n+\thw->mac.fc_enable = txgbe_mac_fc_enable_dummy;\n+\thw->mac.setup_fc = txgbe_mac_setup_fc_dummy;\n+\thw->mac.fc_autoneg = txgbe_mac_fc_autoneg_dummy;\n+\thw->mac.set_fw_drv_ver = txgbe_mac_set_fw_drv_ver_dummy;\n+\thw->mac.get_thermal_sensor_data = txgbe_mac_get_thermal_sensor_data_dummy;\n+\thw->mac.init_thermal_sensor_thresh = txgbe_mac_init_thermal_sensor_thresh_dummy;\n+\thw->mac.get_rtrup2tc = txgbe_mac_get_rtrup2tc_dummy;\n+\thw->mac.disable_rx = txgbe_mac_disable_rx_dummy;\n+\thw->mac.enable_rx = txgbe_mac_enable_rx_dummy;\n+\thw->mac.set_source_address_pruning = txgbe_mac_set_source_address_pruning_dummy;\n+\thw->mac.set_ethertype_anti_spoofing = txgbe_mac_set_ethertype_anti_spoofing_dummy;\n+\thw->mac.dmac_update_tcs = txgbe_mac_dmac_update_tcs_dummy;\n+\thw->mac.dmac_config_tcs = txgbe_mac_dmac_config_tcs_dummy;\n+\thw->mac.dmac_config = txgbe_mac_dmac_config_dummy;\n+\thw->mac.setup_eee = txgbe_mac_setup_eee_dummy;\n+\thw->mac.read_iosf_sb_reg = txgbe_mac_read_iosf_sb_reg_dummy;\n+\thw->mac.write_iosf_sb_reg = txgbe_mac_write_iosf_sb_reg_dummy;\n+\thw->mac.disable_mdd = txgbe_mac_disable_mdd_dummy;\n+\thw->mac.enable_mdd = txgbe_mac_enable_mdd_dummy;\n+\thw->mac.mdd_event = txgbe_mac_mdd_event_dummy;\n+\thw->mac.restore_mdd_vf = txgbe_mac_restore_mdd_vf_dummy;\n+\thw->mac.fw_recovery_mode = txgbe_mac_fw_recovery_mode_dummy;\n+\thw->phy.get_media_type = txgbe_phy_get_media_type_dummy;\n+\thw->phy.identify = txgbe_phy_identify_dummy;\n+\thw->phy.identify_sfp = txgbe_phy_identify_sfp_dummy;\n+\thw->phy.init = txgbe_phy_init_dummy;\n+\thw->phy.reset = txgbe_phy_reset_dummy;\n+\thw->phy.read_reg = txgbe_phy_read_reg_dummy;\n+\thw->phy.write_reg = txgbe_phy_write_reg_dummy;\n+\thw->phy.read_reg_mdi = txgbe_phy_read_reg_mdi_dummy;\n+\thw->phy.write_reg_mdi = txgbe_phy_write_reg_mdi_dummy;\n+\thw->phy.setup_link = txgbe_phy_setup_link_dummy;\n+\thw->phy.setup_internal_link = txgbe_phy_setup_internal_link_dummy;\n+\thw->phy.setup_link_speed = txgbe_phy_setup_link_speed_dummy;\n+\thw->phy.check_link = txgbe_phy_check_link_dummy;\n+\thw->phy.get_firmware_version = txgbe_phy_get_firmware_version_dummy;\n+\thw->phy.read_i2c_byte = txgbe_phy_read_i2c_byte_dummy;\n+\thw->phy.write_i2c_byte = txgbe_phy_write_i2c_byte_dummy;\n+\thw->phy.read_i2c_sff8472 = txgbe_phy_read_i2c_sff8472_dummy;\n+\thw->phy.read_i2c_eeprom = txgbe_phy_read_i2c_eeprom_dummy;\n+\thw->phy.write_i2c_eeprom = txgbe_phy_write_i2c_eeprom_dummy;\n+\thw->phy.i2c_bus_clear = txgbe_phy_i2c_bus_clear_dummy;\n+\thw->phy.check_overtemp = txgbe_phy_check_overtemp_dummy;\n+\thw->phy.set_phy_power = txgbe_phy_set_phy_power_dummy;\n+\thw->phy.enter_lplu = txgbe_phy_enter_lplu_dummy;\n+\thw->phy.handle_lasi = txgbe_phy_handle_lasi_dummy;\n+\thw->phy.read_i2c_byte_unlocked = txgbe_phy_read_i2c_byte_unlocked_dummy;\n+\thw->phy.write_i2c_byte_unlocked = txgbe_phy_write_i2c_byte_unlocked_dummy;\n+\thw->link.read_link = txgbe_link_read_link_dummy;\n+\thw->link.read_link_unlocked = txgbe_link_read_link_unlocked_dummy;\n+\thw->link.write_link = txgbe_link_write_link_dummy;\n+\thw->link.write_link_unlocked = txgbe_link_write_link_unlocked_dummy;\n+\thw->mbx.init_params = txgbe_mbx_init_params_dummy;\n+\thw->mbx.read = txgbe_mbx_read_dummy;\n+\thw->mbx.write = txgbe_mbx_write_dummy;\n+\thw->mbx.read_posted = txgbe_mbx_read_posted_dummy;\n+\thw->mbx.write_posted = txgbe_mbx_write_posted_dummy;\n+\thw->mbx.check_for_msg = txgbe_mbx_check_for_msg_dummy;\n+\thw->mbx.check_for_ack = txgbe_mbx_check_for_ack_dummy;\n+\thw->mbx.check_for_rst = txgbe_mbx_check_for_rst_dummy;\n+}\n+\n+#endif /* _TXGBE_TYPE_DUMMY_H_ */\n+\ndiff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c\nindex 3d8968eb4..113ce352c 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.c\n+++ b/drivers/net/txgbe/base/txgbe_hw.c\n@@ -32,6 +32,18 @@ void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw)\n \t\tbus->func = bus->lan_id;\n }\n \n+/**\n+ *  txgbe_init_shared_code - Initialize the shared code\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  This will assign function pointers and assign the MAC type and PHY code.\n+ *  Does not touch the hardware. This function must be called prior to any\n+ *  other function in the shared code. The txgbe_hw structure should be\n+ *  memset to 0 prior to calling this function.  The following fields in\n+ *  hw structure should be filled in prior to calling this function:\n+ *  hw_addr, back, device_id, vendor_id, subsystem_device_id,\n+ *  subsystem_vendor_id, and revision_id\n+ **/\n s32 txgbe_init_shared_code(struct txgbe_hw *hw)\n {\n \ts32 status;\n@@ -43,6 +55,7 @@ s32 txgbe_init_shared_code(struct txgbe_hw *hw)\n \t */\n \ttxgbe_set_mac_type(hw);\n \n+\ttxgbe_init_ops_dummy(hw);\n \tswitch (hw->mac.type) {\n \tcase txgbe_mac_raptor:\n \t\tstatus = txgbe_init_ops_pf(hw);\ndiff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h\nindex 1bd3e45cd..3f62e2598 100644\n--- a/drivers/net/txgbe/base/txgbe_type.h\n+++ b/drivers/net/txgbe/base/txgbe_type.h\n@@ -144,8 +144,153 @@ struct txgbe_bus_info {\n \tu8 lan_id;\n \tu16 instance_id;\n };\n+/* iterator type for walking multicast address lists */\n+typedef u8* (*txgbe_mc_addr_itr) (struct txgbe_hw *hw, u8 **mc_addr_ptr,\n+\t\t\t\t  u32 *vmdq);\n+\n+struct txgbe_link_info {\n+\ts32 (*read_link)(struct txgbe_hw *, u8 addr, u16 reg, u16 *val);\n+\ts32 (*read_link_unlocked)(struct txgbe_hw *, u8 addr, u16 reg,\n+\t\t\t\t  u16 *val);\n+\ts32 (*write_link)(struct txgbe_hw *, u8 addr, u16 reg, u16 val);\n+\ts32 (*write_link_unlocked)(struct txgbe_hw *, u8 addr, u16 reg,\n+\t\t\t\t   u16 val);\n+\n+\tu8 addr;\n+};\n+\n+struct txgbe_rom_info {\n+\ts32 (*init_params)(struct txgbe_hw *);\n+\ts32 (*read16)(struct txgbe_hw *, u32, u16 *);\n+\ts32 (*readw_sw)(struct txgbe_hw *, u32, u16 *);\n+\ts32 (*readw_buffer)(struct txgbe_hw *, u32, u32, void *);\n+\ts32 (*read32)(struct txgbe_hw *, u32, u32 *);\n+\ts32 (*read_buffer)(struct txgbe_hw *, u32, u32, void *);\n+\ts32 (*write16)(struct txgbe_hw *, u32, u16);\n+\ts32 (*writew_sw)(struct txgbe_hw *, u32, u16);\n+\ts32 (*writew_buffer)(struct txgbe_hw *, u32, u32, void *);\n+\ts32 (*write32)(struct txgbe_hw *, u32, u32);\n+\ts32 (*write_buffer)(struct txgbe_hw *, u32, u32, void *);\n+\ts32 (*validate_checksum)(struct txgbe_hw *, u16 *);\n+\ts32 (*update_checksum)(struct txgbe_hw *);\n+\ts32 (*calc_checksum)(struct txgbe_hw *);\n+\n+};\n+\n+struct txgbe_flash_info {\n+\ts32 (*init_params)(struct txgbe_hw *);\n+\ts32 (*read_buffer)(struct txgbe_hw *, u32, u32, u32 *);\n+\ts32 (*write_buffer)(struct txgbe_hw *, u32, u32, u32 *);\n+\tu32 semaphore_delay;\n+\tu32 dword_size;\n+\tu16 address_bits;\n+};\n \n struct txgbe_mac_info {\n+\ts32 (*init_hw)(struct txgbe_hw *);\n+\ts32 (*reset_hw)(struct txgbe_hw *);\n+\ts32 (*start_hw)(struct txgbe_hw *);\n+\ts32 (*stop_hw)(struct txgbe_hw *);\n+\ts32 (*clear_hw_cntrs)(struct txgbe_hw *);\n+\tvoid (*enable_relaxed_ordering)(struct txgbe_hw *);\n+\tu64 (*get_supported_physical_layer)(struct txgbe_hw *);\n+\ts32 (*get_mac_addr)(struct txgbe_hw *, u8 *);\n+\ts32 (*get_san_mac_addr)(struct txgbe_hw *, u8 *);\n+\ts32 (*set_san_mac_addr)(struct txgbe_hw *, u8 *);\n+\ts32 (*get_device_caps)(struct txgbe_hw *, u16 *);\n+\ts32 (*get_wwn_prefix)(struct txgbe_hw *, u16 *, u16 *);\n+\ts32 (*get_fcoe_boot_status)(struct txgbe_hw *, u16 *);\n+\ts32 (*read_analog_reg8)(struct txgbe_hw*, u32, u8*);\n+\ts32 (*write_analog_reg8)(struct txgbe_hw*, u32, u8);\n+\ts32 (*setup_sfp)(struct txgbe_hw *);\n+\ts32 (*enable_rx_dma)(struct txgbe_hw *, u32);\n+\ts32 (*disable_sec_rx_path)(struct txgbe_hw *);\n+\ts32 (*enable_sec_rx_path)(struct txgbe_hw *);\n+\ts32 (*disable_sec_tx_path)(struct txgbe_hw *);\n+\ts32 (*enable_sec_tx_path)(struct txgbe_hw *);\n+\ts32 (*acquire_swfw_sync)(struct txgbe_hw *, u32);\n+\tvoid (*release_swfw_sync)(struct txgbe_hw *, u32);\n+\tvoid (*init_swfw_sync)(struct txgbe_hw *);\n+\tu64 (*autoc_read)(struct txgbe_hw *);\n+\tvoid (*autoc_write)(struct txgbe_hw *, u64);\n+\ts32 (*prot_autoc_read)(struct txgbe_hw *, bool *, u64 *);\n+\ts32 (*prot_autoc_write)(struct txgbe_hw *, bool, u64);\n+\ts32 (*negotiate_api_version)(struct txgbe_hw *hw, int api);\n+\n+\t/* Link */\n+\tvoid (*disable_tx_laser)(struct txgbe_hw *);\n+\tvoid (*enable_tx_laser)(struct txgbe_hw *);\n+\tvoid (*flap_tx_laser)(struct txgbe_hw *);\n+\ts32 (*setup_link)(struct txgbe_hw *, u32, bool);\n+\ts32 (*setup_mac_link)(struct txgbe_hw *, u32, bool);\n+\ts32 (*check_link)(struct txgbe_hw *, u32 *, bool *, bool);\n+\ts32 (*get_link_capabilities)(struct txgbe_hw *, u32 *,\n+\t\t\t\t     bool *);\n+\tvoid (*set_rate_select_speed)(struct txgbe_hw *, u32);\n+\n+\t/* Packet Buffer manipulation */\n+\tvoid (*setup_pba)(struct txgbe_hw *, int, u32, int);\n+\n+\t/* LED */\n+\ts32 (*led_on)(struct txgbe_hw *, u32);\n+\ts32 (*led_off)(struct txgbe_hw *, u32);\n+\ts32 (*blink_led_start)(struct txgbe_hw *, u32);\n+\ts32 (*blink_led_stop)(struct txgbe_hw *, u32);\n+\ts32 (*init_led_link_act)(struct txgbe_hw *);\n+\n+\t/* RAR, Multicast, VLAN */\n+\ts32 (*set_rar)(struct txgbe_hw *, u32, u8 *, u32, u32);\n+\ts32 (*set_uc_addr)(struct txgbe_hw *, u32, u8 *);\n+\ts32 (*clear_rar)(struct txgbe_hw *, u32);\n+\ts32 (*insert_mac_addr)(struct txgbe_hw *, u8 *, u32);\n+\ts32 (*set_vmdq)(struct txgbe_hw *, u32, u32);\n+\ts32 (*set_vmdq_san_mac)(struct txgbe_hw *, u32);\n+\ts32 (*clear_vmdq)(struct txgbe_hw *, u32, u32);\n+\ts32 (*init_rx_addrs)(struct txgbe_hw *);\n+\ts32 (*update_uc_addr_list)(struct txgbe_hw *, u8 *, u32,\n+\t\t\t\t   txgbe_mc_addr_itr);\n+\ts32 (*update_mc_addr_list)(struct txgbe_hw *, u8 *, u32,\n+\t\t\t\t   txgbe_mc_addr_itr, bool clear);\n+\ts32 (*enable_mc)(struct txgbe_hw *);\n+\ts32 (*disable_mc)(struct txgbe_hw *);\n+\ts32 (*clear_vfta)(struct txgbe_hw *);\n+\ts32 (*set_vfta)(struct txgbe_hw *, u32, u32, bool, bool);\n+\ts32 (*set_vlvf)(struct txgbe_hw *, u32, u32, bool, u32 *, u32,\n+\t\t\tbool);\n+\ts32 (*init_uta_tables)(struct txgbe_hw *);\n+\tvoid (*set_mac_anti_spoofing)(struct txgbe_hw *, bool, int);\n+\tvoid (*set_vlan_anti_spoofing)(struct txgbe_hw *, bool, int);\n+\ts32 (*update_xcast_mode)(struct txgbe_hw *, int);\n+\ts32 (*set_rlpml)(struct txgbe_hw *, u16);\n+\n+\t/* Flow Control */\n+\ts32 (*fc_enable)(struct txgbe_hw *);\n+\ts32 (*setup_fc)(struct txgbe_hw *);\n+\tvoid (*fc_autoneg)(struct txgbe_hw *);\n+\n+\t/* Manageability interface */\n+\ts32 (*set_fw_drv_ver)(struct txgbe_hw *, u8, u8, u8, u8, u16,\n+\t\t\t      const char *);\n+\ts32 (*get_thermal_sensor_data)(struct txgbe_hw *);\n+\ts32 (*init_thermal_sensor_thresh)(struct txgbe_hw *hw);\n+\tvoid (*get_rtrup2tc)(struct txgbe_hw *hw, u8 *map);\n+\tvoid (*disable_rx)(struct txgbe_hw *hw);\n+\tvoid (*enable_rx)(struct txgbe_hw *hw);\n+\tvoid (*set_source_address_pruning)(struct txgbe_hw *, bool,\n+\t\t\t\t\t   unsigned int);\n+\tvoid (*set_ethertype_anti_spoofing)(struct txgbe_hw *, bool, int);\n+\ts32 (*dmac_update_tcs)(struct txgbe_hw *hw);\n+\ts32 (*dmac_config_tcs)(struct txgbe_hw *hw);\n+\ts32 (*dmac_config)(struct txgbe_hw *hw);\n+\ts32 (*setup_eee)(struct txgbe_hw *hw, bool enable_eee);\n+\ts32 (*read_iosf_sb_reg)(struct txgbe_hw *, u32, u32, u32 *);\n+\ts32 (*write_iosf_sb_reg)(struct txgbe_hw *, u32, u32, u32);\n+\tvoid (*disable_mdd)(struct txgbe_hw *hw);\n+\tvoid (*enable_mdd)(struct txgbe_hw *hw);\n+\tvoid (*mdd_event)(struct txgbe_hw *hw, u32 *vf_bitmap);\n+\tvoid (*restore_mdd_vf)(struct txgbe_hw *hw, u32 vf);\n+\tbool (*fw_recovery_mode)(struct txgbe_hw *hw);\n+\n \tenum txgbe_mac_type type;\n \tu8 perm_addr[ETH_ADDR_LEN];\n \tu32 num_rar_entries;\n@@ -153,18 +298,61 @@ struct txgbe_mac_info {\n };\n \n struct txgbe_phy_info {\n+\tu32 (*get_media_type)(struct txgbe_hw *);\n+\ts32 (*identify)(struct txgbe_hw *);\n+\ts32 (*identify_sfp)(struct txgbe_hw *);\n+\ts32 (*init)(struct txgbe_hw *);\n+\ts32 (*reset)(struct txgbe_hw *);\n+\ts32 (*read_reg)(struct txgbe_hw *, u32, u32, u16 *);\n+\ts32 (*write_reg)(struct txgbe_hw *, u32, u32, u16);\n+\ts32 (*read_reg_mdi)(struct txgbe_hw *, u32, u32, u16 *);\n+\ts32 (*write_reg_mdi)(struct txgbe_hw *, u32, u32, u16);\n+\ts32 (*setup_link)(struct txgbe_hw *);\n+\ts32 (*setup_internal_link)(struct txgbe_hw *);\n+\ts32 (*setup_link_speed)(struct txgbe_hw *, u32, bool);\n+\ts32 (*check_link)(struct txgbe_hw *, u32 *, bool *);\n+\ts32 (*get_firmware_version)(struct txgbe_hw *, u32 *);\n+\ts32 (*read_i2c_byte)(struct txgbe_hw *, u8, u8, u8 *);\n+\ts32 (*write_i2c_byte)(struct txgbe_hw *, u8, u8, u8);\n+\ts32 (*read_i2c_sff8472)(struct txgbe_hw *, u8, u8 *);\n+\ts32 (*read_i2c_eeprom)(struct txgbe_hw *, u8, u8 *);\n+\ts32 (*write_i2c_eeprom)(struct txgbe_hw *, u8, u8);\n+\tvoid (*i2c_bus_clear)(struct txgbe_hw *);\n+\ts32 (*check_overtemp)(struct txgbe_hw *);\n+\ts32 (*set_phy_power)(struct txgbe_hw *, bool on);\n+\ts32 (*enter_lplu)(struct txgbe_hw *);\n+\ts32 (*handle_lasi)(struct txgbe_hw *hw);\n+\ts32 (*read_i2c_byte_unlocked)(struct txgbe_hw *, u8 offset, u8 addr,\n+\t\t\t\t      u8 *value);\n+\ts32 (*write_i2c_byte_unlocked)(struct txgbe_hw *, u8 offset, u8 addr,\n+\t\t\t\t       u8 value);\n+\n \tenum txgbe_phy_type type;\n \tenum txgbe_sfp_type sfp_type;\n \tu32 media_type;\n };\n \n+struct txgbe_mbx_info {\n+\tvoid (*init_params)(struct txgbe_hw *hw);\n+\ts32  (*read)(struct txgbe_hw *, u32 *, u16,  u16);\n+\ts32  (*write)(struct txgbe_hw *, u32 *, u16, u16);\n+\ts32  (*read_posted)(struct txgbe_hw *, u32 *, u16,  u16);\n+\ts32  (*write_posted)(struct txgbe_hw *, u32 *, u16, u16);\n+\ts32  (*check_for_msg)(struct txgbe_hw *, u16);\n+\ts32  (*check_for_ack)(struct txgbe_hw *, u16);\n+\ts32  (*check_for_rst)(struct txgbe_hw *, u16);\n+};\n+\n struct txgbe_hw {\n \tvoid IOMEM *hw_addr;\n \tvoid *back;\n \tstruct txgbe_mac_info mac;\n \tstruct txgbe_phy_info phy;\n-\n+\tstruct txgbe_link_info link;\n+\tstruct txgbe_rom_info rom;\n+\tstruct txgbe_flash_info flash;\n \tstruct txgbe_bus_info bus;\n+\tstruct txgbe_mbx_info mbx;\n \tu16 device_id;\n \tu16 vendor_id;\n \tu16 subsystem_device_id;\n@@ -177,4 +365,6 @@ struct txgbe_hw {\n };\n \n #include \"txgbe_regs.h\"\n+#include \"txgbe_dummy.h\"\n+\n #endif /* _TXGBE_TYPE_H_ */\n",
    "prefixes": [
        "v2",
        "06/56"
    ]
}