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GET /api/patches/78718/?format=api
{ "id": 78718, "url": "https://patches.dpdk.org/api/patches/78718/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1600949555-28043-43-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1600949555-28043-43-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1600949555-28043-43-git-send-email-arybchenko@solarflare.com", "date": "2020-09-24T12:12:17", "name": "[v3,42/60] common/sfc_efx/base: choose smallest Rx prefix on Riverhead", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2535c22efa9d9668043aa2259f0235d17586b62d", "submitter": { "id": 607, "url": "https://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1600949555-28043-43-git-send-email-arybchenko@solarflare.com/mbox/", "series": [ { "id": 12473, "url": "https://patches.dpdk.org/api/series/12473/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12473", "date": "2020-09-24T12:11:40", "name": "common/sfc_efx: support Riverhead NIC family", "version": 3, "mbox": "https://patches.dpdk.org/series/12473/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/78718/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/78718/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 814A9A04B1;\n\tThu, 24 Sep 2020 14:20:18 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EEB051DF97;\n\tThu, 24 Sep 2020 14:14:01 +0200 (CEST)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 59AEB1DE2B\n for <dev@dpdk.org>; Thu, 24 Sep 2020 14:13:03 +0200 (CEST)", "from mx1-us1.ppe-hosted.com (unknown [10.7.65.64])\n by dispatch1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id\n D7BDD60052 for <dev@dpdk.org>; Thu, 24 Sep 2020 12:13:02 +0000 (UTC)", "from us4-mdac16-2.ut7.mdlocal (unknown [10.7.65.70])\n by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id D6F1D2009B\n for <dev@dpdk.org>; Thu, 24 Sep 2020 12:13:02 +0000 (UTC)", "from mx1-us1.ppe-hosted.com (unknown [10.7.65.174])\n by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id\n 47ADA22004F\n for <dev@dpdk.org>; Thu, 24 Sep 2020 12:13:02 +0000 (UTC)", "from webmail.solarflare.com (uk.solarflare.com [193.34.186.16])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n (No client certificate requested)\n by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id\n F1F631C0068\n for <dev@dpdk.org>; Thu, 24 Sep 2020 12:13:01 +0000 (UTC)", "from ukex01.SolarFlarecom.com (10.17.10.4) by\n ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id\n 15.0.1497.2; Thu, 24 Sep 2020 13:12:47 +0100", "from opal.uk.solarflarecom.com (10.17.10.1) by\n ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server id\n 15.0.1497.2 via Frontend Transport; Thu, 24 Sep 2020 13:12:47 +0100", "from ukv-loginhost.uk.solarflarecom.com\n (ukv-loginhost.uk.solarflarecom.com [10.17.10.39])\n by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id 08OCCljn026050\n for <dev@dpdk.org>; Thu, 24 Sep 2020 13:12:47 +0100", "from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1])\n by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id DC9501613AB\n for <dev@dpdk.org>; Thu, 24 Sep 2020 13:12:47 +0100 (BST)" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "Date": "Thu, 24 Sep 2020 13:12:17 +0100", "Message-ID": "<1600949555-28043-43-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1600949555-28043-1-git-send-email-arybchenko@solarflare.com>", "References": "<1600764594-14752-1-git-send-email-arybchenko@solarflare.com>\n <1600949555-28043-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-TM-AS-Product-Ver": "SMEX-12.5.0.1300-8.6.1012-25674.003", "X-TM-AS-Result": "No-6.374300-8.000000-10", "X-TMASE-MatchedRID": "jsC3uNckhg4ij1rXhFZBDNB/IoRhBzVHSoCG4sefl8Q7OtcKFS0EBBb/\n j4AKLa01VZ/zZu2XjbKRW72+zOTrrr3VqvDjHOXN4h8r8l3l4eZvV3/OnMClWhQUOSCpbPwOaXM\n mCtN+yuTZccnQviM4hCz/fUbMqROxCKGbCJcIygY/ApMPW/xhXkyQ5fRSh265AqmSGaN08VCJmy\n WBjMsxkBfb/g6/AVAtueD2AKNg3y6D66TlvUkVYODN5dBHl70NA96VLx8Kcq68YDH/UBNnmzUee\n vPcUyNZJBrWAcLM7pB6pBzYp496ZuKU/rnfWHv6CWlWR223da5SQLJ/PYofeDbpMgyAfh26cOQF\n qW7TulVYaCfj+DnsCOWjw11a7ymC9KnJ9ZqX1X3MbQu1fPiCD0NWaKIdBIV4MAmzHUrPkB5OzKQ\n Ys+5RjoZsgRXKjrxDU+XXDdnqpV7LkQcFIcXJTX84FZpy/6JVfXRAc+s3RFd1+BANR76ZZ22L9P\n qwEA2bMEiQlkRQZB1HBaYvF0hxKHUxqy9pUmSjyl2yL95kDWN9LQinZ4QefMdVaUMTROUqJdW0G\n bI6Iq6OhzOa6g8Kra0jvZMGDW1pK4Md0GDzOcLhmcfLMEu5oI+CWj5H8dgtXg9mK8GW8ypDDKa3\n G4nrLQ==", "X-TM-AS-User-Approved-Sender": "Yes", "X-TM-AS-User-Blocked-Sender": "No", "X-TMASE-Result": "10--6.374300-8.000000", "X-TMASE-Version": "SMEX-12.5.0.1300-8.6.1012-25674.003", "X-MDID": "1600949582-6wdXdH0HVwJ7", "Subject": "[dpdk-dev] [PATCH v3 42/60] common/sfc_efx/base: choose smallest Rx\n\tprefix on Riverhead", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Riverhead supports many Rx prefixes. The Rx prefix may be chosen\nbased on which information is required.\n\nTo have better performance choose the smallest Rx prefix which\nmeets our requirements.\n\nRight now there is no way to specify requirements on Rx queue\ncreation, but it could be added in the future.\n\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\nReviewed-by: Andy Moreton <amoreton@xilinx.com>\n---\n drivers/common/sfc_efx/base/efx_impl.h | 1 +\n drivers/common/sfc_efx/base/efx_mcdi.c | 10 +-\n drivers/common/sfc_efx/base/rhead_rx.c | 333 ++++++++++++++++++++++++-\n 3 files changed, 338 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h\nindex c373192554..fc0a654f80 100644\n--- a/drivers/common/sfc_efx/base/efx_impl.h\n+++ b/drivers/common/sfc_efx/base/efx_impl.h\n@@ -1439,6 +1439,7 @@ typedef struct efx_mcdi_init_rxq_params_s {\n \tuint32_t\tes_max_dma_len;\n \tuint32_t\tes_buf_stride;\n \tuint32_t\thol_block_timeout;\n+\tuint32_t\tprefix_id;\n } efx_mcdi_init_rxq_params_t;\n \n LIBEFX_INTERNAL\ndiff --git a/drivers/common/sfc_efx/base/efx_mcdi.c b/drivers/common/sfc_efx/base/efx_mcdi.c\nindex aa19c7c759..b8e45b458d 100644\n--- a/drivers/common/sfc_efx/base/efx_mcdi.c\n+++ b/drivers/common/sfc_efx/base/efx_mcdi.c\n@@ -2692,8 +2692,8 @@ efx_mcdi_init_rxq(\n {\n \tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n \tefx_mcdi_req_t req;\n-\tEFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V4_IN_LEN,\n-\t\tMC_CMD_INIT_RXQ_V4_OUT_LEN);\n+\tEFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V5_IN_LEN,\n+\t\tMC_CMD_INIT_RXQ_V5_OUT_LEN);\n \tint npages = efx_rxq_nbufs(enp, ndescs);\n \tint i;\n \tefx_qword_t *dma_addr;\n@@ -2747,9 +2747,9 @@ efx_mcdi_init_rxq(\n \n \treq.emr_cmd = MC_CMD_INIT_RXQ;\n \treq.emr_in_buf = payload;\n-\treq.emr_in_length = MC_CMD_INIT_RXQ_V4_IN_LEN;\n+\treq.emr_in_length = MC_CMD_INIT_RXQ_V5_IN_LEN;\n \treq.emr_out_buf = payload;\n-\treq.emr_out_length = MC_CMD_INIT_RXQ_V4_OUT_LEN;\n+\treq.emr_out_length = MC_CMD_INIT_RXQ_V5_OUT_LEN;\n \n \tMCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);\n \tMCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, eep->ee_index);\n@@ -2787,6 +2787,8 @@ efx_mcdi_init_rxq(\n \t\tMCDI_IN_SET_DWORD(req, INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES,\n \t\t params->buf_size);\n \n+\tMCDI_IN_SET_DWORD(req, INIT_RXQ_V5_IN_RX_PREFIX_ID, params->prefix_id);\n+\n \tdma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);\n \taddr = EFSYS_MEM_ADDR(esmp);\n \ndiff --git a/drivers/common/sfc_efx/base/rhead_rx.c b/drivers/common/sfc_efx/base/rhead_rx.c\nindex 38c905444a..d683f280ce 100644\n--- a/drivers/common/sfc_efx/base/rhead_rx.c\n+++ b/drivers/common/sfc_efx/base/rhead_rx.c\n@@ -10,6 +10,12 @@\n \n #if EFSYS_OPT_RIVERHEAD\n \n+/*\n+ * Maximum number of Rx prefixes supported by Rx prefix choice to be\n+ * returned from firmware.\n+ */\n+#define\tRHEAD_RX_PREFIX_IDS_MAX\t\t16\n+\n /*\n * Default Rx prefix layout on Riverhead if FW does not support Rx\n * prefix choice using MC_CMD_GET_RX_PREFIX_ID and query its layout\n@@ -265,6 +271,312 @@ rhead_rx_qenable(\n \t_NOTE(ARGUNUSED(erp))\n }\n \n+static\t__checkReturn\tefx_rc_t\n+efx_mcdi_get_rx_prefix_ids(\n+\t__in\t\t\t\t\tefx_nic_t *enp,\n+\t__in\t\t\t\t\tuint32_t mcdi_fields_mask,\n+\t__in\t\t\t\t\tunsigned int max_ids,\n+\t__out\t\t\t\t\tunsigned int *nids,\n+\t__out_ecount_part(max_ids, *nids)\tuint32_t *idsp)\n+{\n+\tefx_mcdi_req_t req;\n+\tEFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_RX_PREFIX_ID_IN_LEN,\n+\t\tMC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX);\n+\tefx_rc_t rc;\n+\tuint32_t num;\n+\n+\treq.emr_cmd = MC_CMD_GET_RX_PREFIX_ID;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_GET_RX_PREFIX_ID_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX;\n+\n+\tMCDI_IN_SET_DWORD(req, GET_RX_PREFIX_ID_IN_FIELDS, mcdi_fields_mask);\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\tif (req.emr_rc != 0) {\n+\t\trc = req.emr_rc;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif (req.emr_out_length_used < MC_CMD_GET_RX_PREFIX_ID_OUT_LENMIN) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail2;\n+\t}\n+\n+\tnum = MCDI_OUT_DWORD(req, GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS);\n+\n+\tif (req.emr_out_length_used != MC_CMD_GET_RX_PREFIX_ID_OUT_LEN(num)) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail3;\n+\t}\n+\n+\t*nids = MIN(num, max_ids);\n+\n+\tEFX_STATIC_ASSERT(sizeof (idsp[0]) ==\n+\t MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_LEN);\n+\tmemcpy(idsp,\n+\t MCDI_OUT2(req, uint32_t, GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID),\n+\t *nids * sizeof (idsp[0]));\n+\n+\treturn (0);\n+\n+fail3:\n+\tEFSYS_PROBE(fail3);\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t__checkReturn\tefx_rx_prefix_field_t\n+efx_mcdi_rx_prefix_field_map(unsigned int mcdi_idx)\n+{\n+\tstatic const efx_rx_prefix_field_t efx_mcdi_to_rx_prefix_field[] = {\n+#define\tEFX_MCDI_TO_RX_PREFIX_FIELD(_field) \\\n+\t[RX_PREFIX_FIELD_INFO_ ## _field] = EFX_RX_PREFIX_FIELD_ ## _field\n+\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(LENGTH),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(RSS_HASH_VALID),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(USER_FLAG),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(CLASS),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(PARTIAL_TSTAMP),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(RSS_HASH),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(USER_MARK),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(INGRESS_VPORT),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(CSUM_FRAME),\n+\t\tEFX_MCDI_TO_RX_PREFIX_FIELD(VLAN_STRIP_TCI),\n+\n+#undef\tEFX_MCDI_TO_RX_PREFIX_FIELD\n+\t};\n+\n+\tif (mcdi_idx >= EFX_ARRAY_SIZE(efx_mcdi_to_rx_prefix_field))\n+\t\treturn (EFX_RX_PREFIX_NFIELDS);\n+\n+\treturn (efx_mcdi_to_rx_prefix_field[mcdi_idx]);\n+}\n+\n+static\t__checkReturn\tint\n+efx_rx_prefix_field_map_to_mcdi(\n+\t__in\t\tefx_rx_prefix_field_t field)\n+{\n+\tstatic const int efx_rx_prefix_field_to_mcdi[] = {\n+\t\t[EFX_RX_PREFIX_FIELD_LENGTH] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH),\n+\t\t[EFX_RX_PREFIX_FIELD_ORIG_LENGTH] = -1,\n+\t\t[EFX_RX_PREFIX_FIELD_CLASS] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_CLASS),\n+\t\t[EFX_RX_PREFIX_FIELD_RSS_HASH] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH),\n+\t\t[EFX_RX_PREFIX_FIELD_RSS_HASH_VALID] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID),\n+\t\t[EFX_RX_PREFIX_FIELD_PARTIAL_TSTAMP] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP),\n+\t\t[EFX_RX_PREFIX_FIELD_VLAN_STRIP_TCI] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI),\n+\t\t[EFX_RX_PREFIX_FIELD_INNER_VLAN_STRIP_TCI] = -1,\n+\t\t[EFX_RX_PREFIX_FIELD_USER_FLAG] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG),\n+\t\t[EFX_RX_PREFIX_FIELD_USER_MARK] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK),\n+\t\t[EFX_RX_PREFIX_FIELD_USER_MARK_VALID] = -1,\n+\t\t[EFX_RX_PREFIX_FIELD_CSUM_FRAME] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME),\n+\t\t[EFX_RX_PREFIX_FIELD_INGRESS_VPORT] =\n+\t\t\tEFX_LOW_BIT(MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT),\n+\t};\n+\n+\tif (field >= EFX_ARRAY_SIZE(efx_rx_prefix_field_to_mcdi))\n+\t\treturn (-1);\n+\n+\treturn (efx_rx_prefix_field_to_mcdi[field]);\n+}\n+\n+static\t__checkReturn\tefx_rc_t\n+efx_rx_prefix_fields_mask_to_mcdi(\n+\t__in\t\tuint32_t fields_mask,\n+\t__out\t\tuint32_t *mcdi_fields_maskp)\n+{\n+\tuint32_t mcdi_fields_mask = 0;\n+\tunsigned int i;\n+\n+\tfor (i = 0; i < EFX_RX_PREFIX_NFIELDS; ++i) {\n+\t\tif (fields_mask & (1U << i)) {\n+\t\t\tint mcdi_field = efx_rx_prefix_field_map_to_mcdi(i);\n+\n+\t\t\tif (mcdi_field < 0)\n+\t\t\t\treturn (EINVAL);\n+\n+\t\t\tmcdi_fields_mask |= (1U << mcdi_field);\n+\t\t}\n+\t}\n+\n+\t*mcdi_fields_maskp = mcdi_fields_mask;\n+\treturn (0);\n+}\n+\n+static\t__checkReturn\tefx_rc_t\n+efx_mcdi_query_rx_prefix_id(\n+\t__in\t\tefx_nic_t *enp,\n+\t__in\t\tuint32_t prefix_id,\n+\t__out\t\tefx_rx_prefix_layout_t *erplp)\n+{\n+\tefx_mcdi_req_t req;\n+\tEFX_MCDI_DECLARE_BUF(payload, MC_CMD_QUERY_RX_PREFIX_ID_IN_LEN,\n+\t\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX);\n+\tefx_rc_t rc;\n+\tsize_t response_len;\n+\tconst efx_dword_t *resp;\n+\tconst efx_dword_t *finfo;\n+\tunsigned int num_fields;\n+\tunsigned int mcdi_field;\n+\tefx_rx_prefix_field_t field;\n+\tunsigned int i;\n+\n+\treq.emr_cmd = MC_CMD_QUERY_RX_PREFIX_ID;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_QUERY_RX_PREFIX_ID_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX;\n+\n+\tMCDI_IN_SET_DWORD(req, QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID, prefix_id);\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\tif (req.emr_rc != 0) {\n+\t\trc = req.emr_rc;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif (req.emr_out_length_used < MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMIN) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail2;\n+\t}\n+\n+\tif (MCDI_OUT_BYTE(req, QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE) !=\n+\t MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_FIXED) {\n+\t\trc = ENOTSUP;\n+\t\tgoto fail3;\n+\t}\n+\n+\tEFX_STATIC_ASSERT(MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMIN >=\n+\t MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_OFST);\n+\tresponse_len = req.emr_out_length_used -\n+\t MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_OFST;\n+\n+\tif (response_len < RX_PREFIX_FIXED_RESPONSE_LENMIN) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail4;\n+\t}\n+\n+\tresp = MCDI_OUT2(req, efx_dword_t, QUERY_RX_PREFIX_ID_OUT_RESPONSE);\n+\n+\tmemset(erplp, 0, sizeof (*erplp));\n+\terplp->erpl_id = prefix_id;\n+\terplp->erpl_length =\n+\t EFX_DWORD_FIELD(*resp, RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES);\n+\tnum_fields =\n+\t EFX_DWORD_FIELD(*resp, RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT);\n+\n+\tif (response_len < RX_PREFIX_FIXED_RESPONSE_LEN(num_fields)) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail5;\n+\t}\n+\n+\tfinfo = (const efx_dword_t *)((const uint8_t *)resp +\n+\t RX_PREFIX_FIXED_RESPONSE_FIELDS_OFST);\n+\n+\tfor (i = 0; i < num_fields; ++i, ++finfo) {\n+\t\tmcdi_field = EFX_DWORD_FIELD(*finfo, RX_PREFIX_FIELD_INFO_TYPE);\n+\n+\t\tfield = efx_mcdi_rx_prefix_field_map(mcdi_field);\n+\t\tif (field >= EFX_RX_PREFIX_NFIELDS)\n+\t\t\tcontinue;\n+\n+\t\terplp->erpl_fields[field].erpfi_offset_bits =\n+\t\t EFX_DWORD_FIELD(*finfo, RX_PREFIX_FIELD_INFO_OFFSET_BITS);\n+\t\terplp->erpl_fields[field].erpfi_width_bits =\n+\t\t EFX_DWORD_FIELD(*finfo, RX_PREFIX_FIELD_INFO_WIDTH_BITS);\n+\t}\n+\n+\treturn (0);\n+\n+fail5:\n+\tEFSYS_PROBE(fail5);\n+fail4:\n+\tEFSYS_PROBE(fail4);\n+fail3:\n+\tEFSYS_PROBE(fail3);\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t__checkReturn\tefx_rc_t\n+rhead_rx_choose_prefix_id(\n+\t__in\t\tefx_nic_t *enp,\n+\t__in\t\tuint32_t fields_mask,\n+\t__out\t\tefx_rx_prefix_layout_t *erplp)\n+{\n+\tefx_rx_prefix_layout_t erpl;\n+\tuint32_t prefix_ids[RHEAD_RX_PREFIX_IDS_MAX];\n+\tuint32_t mcdi_fields_mask;\n+\tunsigned int num = 0;\n+\tunsigned int i;\n+\tefx_rc_t rc;\n+\n+\trc = efx_rx_prefix_fields_mask_to_mcdi(fields_mask, &mcdi_fields_mask);\n+\tif (rc != 0)\n+\t\tgoto fail1;\n+\n+\tmemset(erplp, 0, sizeof (*erplp));\n+\n+\trc = efx_mcdi_get_rx_prefix_ids(enp, mcdi_fields_mask,\n+\t EFX_ARRAY_SIZE(prefix_ids), &num, prefix_ids);\n+\tif (rc == ENOTSUP) {\n+\t\t/* Not supported MCDI, use default prefix ID */\n+\t\t*erplp = rhead_default_rx_prefix_layout;\n+\t\tgoto done;\n+\t}\n+\tif (rc != 0)\n+\t\tgoto fail2;\n+\n+\tif (num == 0) {\n+\t\trc = ENOTSUP;\n+\t\tgoto fail3;\n+\t}\n+\n+\tfor (i = 0; i < num; ++i) {\n+\t\trc = efx_mcdi_query_rx_prefix_id(enp, prefix_ids[i], &erpl);\n+\t\tif (rc != 0)\n+\t\t\tgoto fail4;\n+\n+\t\t/* Choose the smallest prefix which meets our requirements */\n+\t\tif (i == 0 || erpl.erpl_length < erplp->erpl_length)\n+\t\t\t*erplp = erpl;\n+\t}\n+\n+done:\n+\treturn (0);\n+\n+fail4:\n+\tEFSYS_PROBE(fail4);\n+fail3:\n+\tEFSYS_PROBE(fail3);\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n \t__checkReturn\tefx_rc_t\n rhead_rx_qcreate(\n \t__in\t\tefx_nic_t *enp,\n@@ -281,6 +593,7 @@ rhead_rx_qcreate(\n {\n \tconst efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);\n \tefx_mcdi_init_rxq_params_t params;\n+\tefx_rx_prefix_layout_t erpl;\n \tefx_rc_t rc;\n \n \t_NOTE(ARGUNUSED(id))\n@@ -310,6 +623,20 @@ rhead_rx_qcreate(\n \telse\n \t\tparams.disable_scatter = encp->enc_rx_disable_scatter_supported;\n \n+\t/*\n+\t * LENGTH is required in EF100 host interface, as receive events\n+\t * do not include the packet length.\n+\t * NOTE: Required fields are hard-wired now. Future designs will\n+\t * want to allow the client (driver) code to have control over\n+\t * which fields are required or may be allow to request so-called\n+\t * default Rx prefix (which ID is equal to 0).\n+\t */\n+\tif ((rc = rhead_rx_choose_prefix_id(enp,\n+\t (1U << EFX_RX_PREFIX_FIELD_LENGTH), &erpl)) != 0)\n+\t\tgoto fail3;\n+\n+\tparams.prefix_id = erpl.erpl_id;\n+\n \t/*\n \t * Ignore EFX_RXQ_FLAG_INNER_CLASSES since in accordance with\n \t * EF100 host interface both inner and outer classes are provided\n@@ -318,15 +645,17 @@ rhead_rx_qcreate(\n \n \tif ((rc = efx_mcdi_init_rxq(enp, ndescs, eep, label, index,\n \t\t esmp, ¶ms)) != 0)\n-\t\tgoto fail3;\n+\t\tgoto fail4;\n \n \terp->er_eep = eep;\n \terp->er_label = label;\n \terp->er_buf_size = params.buf_size;\n-\terp->er_prefix_layout = rhead_default_rx_prefix_layout;\n+\terp->er_prefix_layout = erpl;\n \n \treturn (0);\n \n+fail4:\n+\tEFSYS_PROBE(fail4);\n fail3:\n \tEFSYS_PROBE(fail3);\n fail2:\n", "prefixes": [ "v3", "42/60" ] }