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GET /api/patches/78342/?format=api
{ "id": 78342, "url": "https://patches.dpdk.org/api/patches/78342/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1600767288-12109-12-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1600767288-12109-12-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1600767288-12109-12-git-send-email-arybchenko@solarflare.com", "date": "2020-09-22T09:33:59", "name": "[v2,11/60] common/sfc_efx/base: factor out helper to get board config", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f9ce39929bb5e8008a0652c8f995024b925ba0af", "submitter": { "id": 607, "url": "https://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1600767288-12109-12-git-send-email-arybchenko@solarflare.com/mbox/", "series": [ { "id": 12402, "url": "https://patches.dpdk.org/api/series/12402/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12402", "date": "2020-09-22T09:33:53", "name": "common/sfc_efx: support Riverhead NIC family", "version": 2, "mbox": "https://patches.dpdk.org/series/12402/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/78342/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/78342/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7072EA04E1;\n\tTue, 22 Sep 2020 11:37:29 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0D9EB1DD16;\n\tTue, 22 Sep 2020 11:35:35 +0200 (CEST)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 14B341DB0F\n for <dev@dpdk.org>; Tue, 22 Sep 2020 11:35:05 +0200 (CEST)", "from mx1-us1.ppe-hosted.com (unknown [10.110.50.143])\n by dispatch1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id\n B3ECC20073 for <dev@dpdk.org>; Tue, 22 Sep 2020 09:35:04 +0000 (UTC)", "from us4-mdac16-70.at1.mdlocal (unknown [10.110.50.188])\n by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id B3AF98009B\n for <dev@dpdk.org>; Tue, 22 Sep 2020 09:35:04 +0000 (UTC)", "from mx1-us1.ppe-hosted.com (unknown [10.110.49.30])\n by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 53C4940061\n for <dev@dpdk.org>; Tue, 22 Sep 2020 09:35:04 +0000 (UTC)", "from webmail.solarflare.com (uk.solarflare.com [193.34.186.16])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n (No client certificate requested)\n by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id\n 1CC9E140053\n for <dev@dpdk.org>; Tue, 22 Sep 2020 09:35:04 +0000 (UTC)", "from ukex01.SolarFlarecom.com (10.17.10.4) by\n ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id\n 15.0.1497.2; Tue, 22 Sep 2020 10:34:56 +0100", "from opal.uk.solarflarecom.com (10.17.10.1) by\n ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server id\n 15.0.1497.2 via Frontend Transport; Tue, 22 Sep 2020 10:34:56 +0100", "from ukv-loginhost.uk.solarflarecom.com\n (ukv-loginhost.uk.solarflarecom.com [10.17.10.39])\n by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id 08M9Yu5O026893\n for <dev@dpdk.org>; Tue, 22 Sep 2020 10:34:56 +0100", "from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1])\n by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id E7E621613AB\n for <dev@dpdk.org>; Tue, 22 Sep 2020 10:34:55 +0100 (BST)" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "Date": "Tue, 22 Sep 2020 10:33:59 +0100", "Message-ID": "<1600767288-12109-12-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1600767288-12109-1-git-send-email-arybchenko@solarflare.com>", "References": "<1600764594-14752-1-git-send-email-arybchenko@solarflare.com>\n <1600767288-12109-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-TM-AS-Product-Ver": "SMEX-12.5.0.1300-8.6.1012-25674.003", "X-TM-AS-Result": "No-8.416300-8.000000-10", "X-TMASE-MatchedRID": "eeVHkMty8lE5PRWUmNF+caiUivh0j2PvhVDnkfzD7uYHZBaLwEXlKGlF\n 7OhYLlctHtuwZY240Du/8jMSbu6lMCna+PB+11hbqjZ865FPtpr1+9bO3CCbk5l8NETW6pKCLc3\n 8cMV8W6FqAqjCIaEokjOu7wnfeWbBK2VeMHEJ1H1l2ityh8f8aVxo0H+7nJCrqRCprJ0QRqqfUD\n MAh2QVUaE4LbjX68fnZqMyw7Q88r/SfkI8LIozO3IA6GYWLWr2ovA/6ONsv0rg91xayX4L8waz/\n 6EiDu5BAXrxBHD6hC58lH8ne06sf4ikzRQzGgG34WAObM1VUqhqYquCrLrVwtEsTITobgNEoQYq\n Gb1tpo1FQ7qCGsajLtNmtwt9Zo4K9eHb3QfYqDaeAiCmPx4NwJuJ+Pb8n/VxMhmTylWIkjEqtq5\n d3cxkNVThLx7T+YcqyX+ibX6LgMLpp70PitZXFpDuceJJBygQNv3A3pZ/x4wdFAy0ck3R2+9Rlq\n 0Fz89HhQ7Ry9RAky1opJ1z8l+yzBvYBa3bs26wI6KkAL2A5kcMtYrw9BuTwqSmSPRgKSZMuowvJ\n dIWQm5DDKa3G4nrLQ==", "X-TM-AS-User-Approved-Sender": "Yes", "X-TM-AS-User-Blocked-Sender": "No", "X-TMASE-Result": "10--8.416300-8.000000", "X-TMASE-Version": "SMEX-12.5.0.1300-8.6.1012-25674.003", "X-MDID": "1600767304-lh89d7aNUW_B", "Subject": "[dpdk-dev] [PATCH v2 11/60] common/sfc_efx/base: factor out helper\n\tto get board config", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The helper will be used on Riverhead.\n\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\nReviewed-by: Andy Moreton <amoreton@xilinx.com>\n---\n drivers/common/sfc_efx/base/ef10_nic.c | 213 ++++++++++++++-----------\n 1 file changed, 117 insertions(+), 96 deletions(-)", "diff": "diff --git a/drivers/common/sfc_efx/base/ef10_nic.c b/drivers/common/sfc_efx/base/ef10_nic.c\nindex f7c4601819..47329ff8dc 100644\n--- a/drivers/common/sfc_efx/base/ef10_nic.c\n+++ b/drivers/common/sfc_efx/base/ef10_nic.c\n@@ -1758,60 +1758,9 @@ ef10_external_port_mapping(\n }\n \n static\t__checkReturn\tefx_rc_t\n-ef10_set_workaround_bug26807(\n-\t__in\t\tefx_nic_t *enp)\n-{\n-\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n-\tuint32_t flags;\n-\tefx_rc_t rc;\n-\n-\t/*\n-\t * If the bug26807 workaround is enabled, then firmware has enabled\n-\t * support for chained multicast filters. Firmware will reset (FLR)\n-\t * functions which have filters in the hardware filter table when the\n-\t * workaround is enabled/disabled.\n-\t *\n-\t * We must recheck if the workaround is enabled after inserting the\n-\t * first hardware filter, in case it has been changed since this check.\n-\t */\n-\trc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG26807,\n-\t B_TRUE, &flags);\n-\tif (rc == 0) {\n-\t\tencp->enc_bug26807_workaround = B_TRUE;\n-\t\tif (flags & (1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN)) {\n-\t\t\t/*\n-\t\t\t * Other functions had installed filters before the\n-\t\t\t * workaround was enabled, and they have been reset\n-\t\t\t * by firmware.\n-\t\t\t */\n-\t\t\tEFSYS_PROBE(bug26807_workaround_flr_done);\n-\t\t\t/* FIXME: bump MC warm boot count ? */\n-\t\t}\n-\t} else if (rc == EACCES) {\n-\t\t/*\n-\t\t * Unprivileged functions cannot enable the workaround in older\n-\t\t * firmware.\n-\t\t */\n-\t\tencp->enc_bug26807_workaround = B_FALSE;\n-\t} else if ((rc == ENOTSUP) || (rc == ENOENT)) {\n-\t\tencp->enc_bug26807_workaround = B_FALSE;\n-\t} else {\n-\t\tgoto fail1;\n-\t}\n-\n-\treturn (0);\n-\n-fail1:\n-\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n-\n-\treturn (rc);\n-}\n-\n-static\t__checkReturn\tefx_rc_t\n-ef10_nic_board_cfg(\n+efx_mcdi_nic_board_cfg(\n \t__in\t\tefx_nic_t *enp)\n {\n-\tconst efx_nic_ops_t *enop = enp->en_enop;\n \tefx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);\n \tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n \tef10_link_state_t els;\n@@ -1892,7 +1841,6 @@ ef10_nic_board_cfg(\n \t}\n \n \tencp->enc_board_type = board_type;\n-\tencp->enc_clk_mult = 1; /* not used for EF10 */\n \n \t/* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */\n \tif ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)\n@@ -1923,15 +1871,128 @@ ef10_nic_board_cfg(\n \tif ((rc = ef10_get_datapath_caps(enp)) != 0)\n \t\tgoto fail9;\n \n+\t/* Get interrupt vector limits */\n+\tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n+\t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n+\t\t\tgoto fail10;\n+\n+\t\t/* Ignore error (cannot query vector limits from a VF). */\n+\t\tbase = 0;\n+\t\tnvec = 1024;\n+\t}\n+\tencp->enc_intr_vec_base = base;\n+\tencp->enc_intr_limit = nvec;\n+\n+\t/*\n+\t * Get the current privilege mask. Note that this may be modified\n+\t * dynamically, so this value is informational only. DO NOT use\n+\t * the privilege mask to check for sufficient privileges, as that\n+\t * can result in time-of-check/time-of-use bugs.\n+\t */\n+\tif ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)\n+\t\tgoto fail11;\n+\tencp->enc_privilege_mask = mask;\n+\n+\treturn (0);\n+\n+fail11:\n+\tEFSYS_PROBE(fail11);\n+fail10:\n+\tEFSYS_PROBE(fail10);\n+fail9:\n+\tEFSYS_PROBE(fail9);\n+fail8:\n+\tEFSYS_PROBE(fail8);\n+fail7:\n+\tEFSYS_PROBE(fail7);\n+fail6:\n+\tEFSYS_PROBE(fail6);\n+fail5:\n+\tEFSYS_PROBE(fail5);\n+fail4:\n+\tEFSYS_PROBE(fail4);\n+fail3:\n+\tEFSYS_PROBE(fail3);\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t__checkReturn\tefx_rc_t\n+ef10_set_workaround_bug26807(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tuint32_t flags;\n+\tefx_rc_t rc;\n+\n+\t/*\n+\t * If the bug26807 workaround is enabled, then firmware has enabled\n+\t * support for chained multicast filters. Firmware will reset (FLR)\n+\t * functions which have filters in the hardware filter table when the\n+\t * workaround is enabled/disabled.\n+\t *\n+\t * We must recheck if the workaround is enabled after inserting the\n+\t * first hardware filter, in case it has been changed since this check.\n+\t */\n+\trc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG26807,\n+\t B_TRUE, &flags);\n+\tif (rc == 0) {\n+\t\tencp->enc_bug26807_workaround = B_TRUE;\n+\t\tif (flags & (1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN)) {\n+\t\t\t/*\n+\t\t\t * Other functions had installed filters before the\n+\t\t\t * workaround was enabled, and they have been reset\n+\t\t\t * by firmware.\n+\t\t\t */\n+\t\t\tEFSYS_PROBE(bug26807_workaround_flr_done);\n+\t\t\t/* FIXME: bump MC warm boot count ? */\n+\t\t}\n+\t} else if (rc == EACCES) {\n+\t\t/*\n+\t\t * Unprivileged functions cannot enable the workaround in older\n+\t\t * firmware.\n+\t\t */\n+\t\tencp->enc_bug26807_workaround = B_FALSE;\n+\t} else if ((rc == ENOTSUP) || (rc == ENOENT)) {\n+\t\tencp->enc_bug26807_workaround = B_FALSE;\n+\t} else {\n+\t\tgoto fail1;\n+\t}\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t__checkReturn\tefx_rc_t\n+ef10_nic_board_cfg(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tconst efx_nic_ops_t *enop = enp->en_enop;\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tefx_rc_t rc;\n+\n+\tif ((rc = efx_mcdi_nic_board_cfg(enp)) != 0)\n+\t\tgoto fail1;\n+\n \t/*\n \t * Huntington RXDP firmware inserts a 0 or 14 byte prefix.\n \t * We only support the 14 byte prefix here.\n \t */\n \tif (encp->enc_rx_prefix_size != 14) {\n \t\trc = ENOTSUP;\n-\t\tgoto fail10;\n+\t\tgoto fail2;\n \t}\n \n+\tencp->enc_clk_mult = 1; /* not used for EF10 */\n+\n \t/* Alignment for WPTR updates */\n \tencp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;\n \n@@ -1957,56 +2018,16 @@ ef10_nic_board_cfg(\n \n \tencp->enc_buftbl_limit = UINT32_MAX;\n \n-\t/* Get interrupt vector limits */\n-\tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n-\t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail11;\n-\n-\t\t/* Ignore error (cannot query vector limits from a VF). */\n-\t\tbase = 0;\n-\t\tnvec = 1024;\n-\t}\n-\tencp->enc_intr_vec_base = base;\n-\tencp->enc_intr_limit = nvec;\n-\n-\t/*\n-\t * Get the current privilege mask. Note that this may be modified\n-\t * dynamically, so this value is informational only. DO NOT use\n-\t * the privilege mask to check for sufficient privileges, as that\n-\t * can result in time-of-check/time-of-use bugs.\n-\t */\n-\tif ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)\n-\t\tgoto fail12;\n-\tencp->enc_privilege_mask = mask;\n-\n \tif ((rc = ef10_set_workaround_bug26807(enp)) != 0)\n-\t\tgoto fail11;\n+\t\tgoto fail3;\n \n \t/* Get remaining controller-specific board config */\n \tif ((rc = enop->eno_board_cfg(enp)) != 0)\n \t\tif (rc != EACCES)\n-\t\t\tgoto fail13;\n+\t\t\tgoto fail4;\n \n \treturn (0);\n \n-fail13:\n-\tEFSYS_PROBE(fail13);\n-fail12:\n-\tEFSYS_PROBE(fail12);\n-fail11:\n-\tEFSYS_PROBE(fail11);\n-fail10:\n-\tEFSYS_PROBE(fail10);\n-fail9:\n-\tEFSYS_PROBE(fail9);\n-fail8:\n-\tEFSYS_PROBE(fail8);\n-fail7:\n-\tEFSYS_PROBE(fail7);\n-fail6:\n-\tEFSYS_PROBE(fail6);\n-fail5:\n-\tEFSYS_PROBE(fail5);\n fail4:\n \tEFSYS_PROBE(fail4);\n fail3:\n", "prefixes": [ "v2", "11/60" ] }